736c56dedf
doing Power PC.
* config/powerpc/tm-ppc-nw.h: Define GDB_TARGET_POWERPC.
* config/i386/i386lynx.mh, config/m68k/m68klynx.mh,
config/rs6000/rs6000lynx.mh, config/sparc/sparclynx.mh: Enable
ser-tcp.
* nlm/Makefile.in: Get rid of NWSOURCE.
* nlm/alpha-io.S (inVti, outVti): Remove extraneous ldha's.
* nlm/gdbserve.o: Add dummy __main routine.
* nlm/gdbserve.def: Turn on debug.
150 lines
3.3 KiB
ArmAsm
150 lines
3.3 KiB
ArmAsm
/*
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* Copyright (C) 1993, 1994 by
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* Digital Equipment Corporation, Maynard, Massachusetts.
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* All rights reserved.
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*
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* This software is furnished under a license and may be used and copied
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* only in accordance of the terms of such license and with the
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* inclusion of the above copyright notice. This software or any other
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* copies thereof may not be provided or otherwise made available to any
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* other person. No title to and ownership of the software is hereby
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* transferred.
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*
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* The information in this software is subject to change without notice
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* and should not be construed as a commitment by Digital Equipment
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* Corporation.
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*
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* Digital assumes no responsibility for the use or reliability of its
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* software on equipment which is not supplied by Digital.
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*
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*/
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#include "alpha-regdef.h"
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#define LEAF_ENTRY(NAME) .text ; .align 4 ; .globl NAME ; .ent NAME, 0 ; NAME: ; .frame sp, 0, ra ; .prologue 0 ;
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LEAF_ENTRY(flush_i_cache)
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call_pal 0x86 /* IMB */
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ret zero, (ra) /* return */
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.end flush_i_cache
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/* ++
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*
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* VOID
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* outVti(
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* ULONG Port
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* ULONG Data
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* )
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*
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* Routine Description:
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*
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* This Function Uses The 64-Bit Super-Page To Write Data To A Port
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* Of The On-Board VTI Combo Chip For JENSEN.
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*
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* Arguments:
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*
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* Port (A0) - Port Number On VTI Chip To Which To Write Data
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* data (a1) - data to write to the port, only low byte is significant
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* To The VTI
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*
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* Return Value:
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*
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* None.
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*
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*/
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LEAF_ENTRY(outVti)
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/*
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* generate super-page address of vti, base address
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* N.B. - Upper Bits Must Be Sign Extension Of Bit 42
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* va<42:41> = 10 (binary) for super-page address
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*/
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lda t0, 0xc01c(zero) /* t0 = ffff ffff ffff c01c */
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sll t0, 28, t0 /* t0 = ffff fc01 c000 0000 */
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/*
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* Shift In The Port Number To Generate The Port Address We
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* wish to access
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* N.B. - Access Width Is Always Zero = Byte Access For VTI
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*/
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sll a0, 9, a0 /* a0 << 9 */
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bis t0, a0, t0 /* T0 = Address Of VTI Port */
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/*
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* Do The Port Write, Guarantee That Subsequent Writes (And Reads)
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* are ordered with respect to this write and return to caller
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*/
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stl a1, 0(t0) /* write data to port */
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mb /* guarantee write ordering */
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ret zero, (ra) /* return */
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.end outVti
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/*
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*
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* ULONG
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* inVti(
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* ULONG Port
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* )
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*
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* Routine Description:
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*
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* This Function Uses The 64-Bit Super-Page To Read Data From A Port
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* Of The On-Board VTI Combo Chip For JENSEN.
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*
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* Arguments:
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*
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* Port (A0) - Port Number On VTI Chip To Which To Write Data
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*
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* Return Value:
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*
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* Data (V0) - The Data Read From The VTI Chip, Only The Low Byte Will
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* be valid
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*
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*/
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LEAF_ENTRY(inVti)
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/*
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* generate super-page address of vti, base address
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* N.B. - Upper Bits Must Be Sign Extension Of Bit 42
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* va<42:41> = 10 (binary) for super-page address
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*/
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lda t0, 0xc01c(zero) /* t0 = ffff ffff ffff c01c */
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sll t0, 28, t0 /* t0 = ffff fc01 c000 0000 */
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/*
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* Shift In The Port Number To Generate The Port Address We
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* wish to access
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* N.B. - Access Width For VTI Is Always 0 = Byte Access
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*/
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sll a0, 9, a0 /* a0 << 9 */
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bis t0, a0, t0 /* T0 = Address Of VTI Port */
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/*
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* Do The Super-Page I/O Access And Return Data To Caller
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*/
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ldl v0, 0(t0) /* read data from port */
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and v0, 0xff, v0
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ret zero, (ra) /* return */
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.end inVti
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