63978407cb
sim: * Makefile.in (interp.o): Depends on ppi.c . (ppi.c): New rule. * gencode.c (printonmatch, think, genopc): Deleted. (MAX_NR_STUFF): Now 42. (tab): Add SH-DSP CPU instructions. Amalgamate ldc / stc / lds / sts instructions with similar bit patterns. Fix opcodes of stc Rm_BANK,@-<REG_N>. Fix semantics of lds.l @<REG_N>+,MACH (no sign extend). (movsxy_tab): New array. For movs, change MMMM field to GGGG, and mmmm field to MMMM. Added entries for movx, movy and parallel processing insns. (ppi_tab): New array. (qfunc): Stabilize sort. (expand_opcode): Handle [01][01]NN, [01][01]xx and [01][01]yy. Handle 'M', 'G' 's' 'X', 'a', 'Y' and 'A'. (dumptable): Now takes three arguments. Changed all callers. Emit just one contigous jump table. (filltable): Now takes an argument. Changed all callers. Make index static. (ppi_moves, expand_ppi_code, ppi_filltable, ppi_gensim): New functions. (gensim_caselist): New function, broken out of gensim. Handle opcode fields 'x', 'y', 's', 'M', 'G', 'X', 'a', and 'Y'. Handle ref '9'. (gensim): Handle 'N' in code field and '8' in refs field. Call gensim_caselist - twice. (ppi_index): New static variable. (main): Unsupport default action. Add dsp support for -x / -s option. Add -p option. * interp.c (sh_jump_table, sh_dsp_table, ppi_table): Declare. (saved_state_type): Rearrange to allow amalgamated ldc / stc / lds / sts to work efficiently. (target_dsp): New static variable. (GBR, VBR, SSR, SPC, MACH, MACL): Reflect saved_state_type change. (FPUL, Rn_BANK, SET_Rn_BANK, M, Q, S, T, SR_BL, SR_RB): Likewise. (SR_MD, SR_RC, SET_SR_BIT, GET_SR, SET_RC, GET_FPSCR): Likewise. (RS, RE, MOD, MOD_ME, DSP_R): Likewise. (set_fpscr1): Likewise. Use target_dsp to check for dsp. (MOD_MSi, SIG_BUS_FETCH): Deleted. (CREG, SREG, PR, SR_MASK_DMY, SR_MASK_DMX, SR_DMY): New macros. (SR_DMX, DSR, MOD_DELTA, GET_DSP_GRD): Likewise. (SET_MOD): Reflect saved_state_type change. Set MOD_DELTA instead of MOD_MS, and encode SR_DMY / SR_DMX into high word of MOD_ME. (set_sr): Reflect saved_state_type change. Fix SR_RB handling. Use SET_MOD. (MA, L, TL, TB): Now controlled by ACE_FAST. (SEXT32): Just cast to int. (SIGN32): Fixed to only shift by 31. (CHECK_INSN_PTR): SIGBUS at insn fetch now represented by insn_end 0. (ppi_insn): Declare. (ppi.c): Include. (init_dsp): Set target_dsp. When it changes, switch end of sh_jump_table with sh_dsp_table. (sim_resume) Don't declare sh_jump_table0. Use sh_jump_table instead. Don't Declare PR if it's #defined. Fix single-stepping (Was broken in Mar 6 16:59:10 patch). (sim_store_register, sim_read_register): Translate accesses to reflect saved_state_type change. * interp.c (set_sr): Set sr. (SET_RC, MOD, MOD_MS, MOD_ME, SET_MOD, MOD_MS, MOD_ME): New macros. (set_fpscr1): Don't bank-switch fpu registers when simulating sh-dsp. (DSP_R): Fix definition. (sim_resume): Remove outdated SET_SR use. * interp.c (saved_state): New members for struct member asregs: rs, re, insn_end, xram_start, yram_start. (struct loop_bounds): New struct. (SKIP_INSN): New macro. (get_loop_bounds): New function. (endianw): Renamed to global_endianw. (maskw): negated bits. (PC): Now insn_ptr. (SR_MASK_RC, SR_RC_INCREMENT, SR_RC, RAISE_EXCEPTION): New macros. (RS, RE, DSP_R, DSP_GRD, A1, A0, X0, X1, Y0, Y1, M0, A1G): Likewise. (M1, A0G, RIAT, PT2H, PH2T, SET_NIP, CHECK_INSN_PTR): Likewise. (SIG_BUS_FETCH): Likewise (raise_exception, riat_fast): New functions. (raise_buserror, sim_stop): Use raise_exception. (PROCESS_SPECIAL_ADDRESS): Use xram_start / yram_start. (BUSERROR, WRITE_BUSERROR, READ_BUSERROR): Reverse sense of mask argument. (FP_OP, set_dr): Use RAISE_EXCEPTION. (wlat_fast, wwat_fast, wbat_fast, rlat_fast, rwat_fast, rbat_fast): Declare. Remove redundant masking. (wwat_fast, rwat_fast): Add argument endianw. Changed callers. (MA): Updated for change pc -> PC. (Delay_Slot): Use RIAT. (empty): Deleted. (trap): Remove argument little_endian. Add argument endianw. Changed all callers. Use raise_exception. (macw): Add argument endainw. Changed all callers. (init_dsp): New function, extended after broken out of init_pointers. (sim_resume): Replace pc with insn_ptr. Replace little_endian with endianw. Replace nia with nip. Reverse sense of maskb / maskw / maskl. Implement logic for zero-overhead loops. Don't try to interpret garbage when getting a SIGBUS at insn fetch. (sim_open): Call init_dsp. * gencode.c (tab): Use SET_NIP instead of nia = . Use PH2T / PT2H / RAISE_EXCEPTION where appropriate. Add extra cycles for brai, braf , bsr, bsrf, jmp, jsr. * interp.c (sim_store_register, sim_fetch_register): Do proper endianness switch. * interp.c (saved_state_type): New members for struct member asregs: xymem_select, xmem, ymem, xmem_offset, ymem_offset. (special_address): Delete. (BUSERROR): Now a two-argument predicate. (PROCESS_SPECIAL_ADDRESS, WRITE_BUSERROR, READ_BUSERROR): New macros. (wlat_little, wwat_little, wbat_any, wlat_big, wwat_big): Delete. (process_wlat_addr, process_wwat_addr): New functions. (process_wbat_addr, process_rlat_addr, process_rwat_addr): Likewise. (process_rbat_addr): Likewise. (wlat_fast, wwat_fast, wbat_fast): Use WRITE_BUSERROR. (rlat_little, rwat_little, rbat_any, rlat_big, rwat_big): Delete. (rlat_fast, rwat_fast, rbat_fast): Use READ_BUSERROR. (RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Delete SLOW versions. (do_rdat, trap): Delete SLOW code. (SEXT32, SIGN32): New macros. (swap, swap16): Now integer in - integer out. Changed all callers. (strswaplen, strnswap): Delete SLOW versions. (init_pointers): Initialize dsp memory selection (preliminary). (sim_store_register, sim_fetch_register): Use swap instead of big / little endian read / write functions. * interp.c (maskl): Deleted. (endianw, endianb): New variables. (special_address): Now inline. (bp_holder): Put raising of buserror there, rename to: (raise_buserror). (BUSERROR): Now yields a value. Changed all users. (wbat_big): Delete. (wlat_fast, wwat_fast, wbat_fast): New functions. (rlat_fast, rwat_fast, rbat_fast): Likewise. (RWAT, RLAT, RBAT, WWAT, WLAT, WBAT): Use new functions. (do_rdat, do_wdat): Likewise. Take maskl argument instead of little_endian one. Changed caller macros. (swap, swap16): Use w[rw]lat_big / w[rw]lat_little directly. (strswaplen, strnswap): New functions. (trap): Use them to fix up endian mismatches; disable SYS_execve and SYS_execv; fix double address translation for SYS_pipe and SYS_stat. (sym_write, sym_read): Add endianness translation. (sym_store_register, sym_fetch_register): Add maskl local variable. (sim_open): Set endianw and endianb. gdb: * sh-tdep.c (sh_dsp_reg_names, sh3_dsp_reg_names): New arrays. (sh_processor_type_table): Add entries for bfd_mach_sh_dsp and bfd_mach_sh3_dsp. (sh_show_regs): Floating point registers are called fr0-fr15. For sh4, display fpul, fpscr and fr0-fr15 / dr0-dr14 as appropriate. Handle sh-dsp and sh3-dsp. config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): sh-dsp / sh3-dsp don't have floating point registers. (DSR_REGNUM, A0G_REGNUM, A0_REGNUM, A1G_REGNUM, A1_REGNUM): Define. (M0_REGNUM, M1_REGNUM, X0_REGNUM, X1_REGNUM, Y0_REGNUM): Likewise. (Y1_REGNUM, MOD_REGNUM, RS_REGNUM, RE_REGNUM, R0B_REGNUM): Likewise.
294 lines
9.5 KiB
C
294 lines
9.5 KiB
C
/* Target-specific definition for a Hitachi Super-H.
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Copyright (C) 1993 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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/* Contributed by Steve Chamberlain sac@cygnus.com */
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struct frame_info;
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struct frame_saved_regs;
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struct value;
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struct type;
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#define GDB_TARGET_IS_SH
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#define IEEE_FLOAT (1)
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/* Define the bit, byte, and word ordering of the machine. */
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#define TARGET_BYTE_ORDER_SELECTABLE
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/* Offset from address of function to start of its code.
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Zero on most machines. */
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#define FUNCTION_START_OFFSET 0
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/* Advance PC across any function entry prologue instructions
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to reach some "real" code. */
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extern CORE_ADDR sh_skip_prologue PARAMS ((CORE_ADDR));
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#define SKIP_PROLOGUE(ip) (sh_skip_prologue (ip))
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/* Immediately after a function call, return the saved pc.
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Can't always go through the frames for this because on some machines
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the new frame is not set up until the new function executes
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some instructions.
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The return address is the value saved in the PR register + 4 */
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#define SAVED_PC_AFTER_CALL(frame) (ADDR_BITS_REMOVE(read_register(PR_REGNUM)))
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/* Stack grows downward. */
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#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
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/* Illegal instruction - used by the simulator for breakpoint
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detection */
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#define BREAKPOINT {0xc3, 0xc3} /* 0xc3c3 is trapa #c3, and it works in big
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and little endian modes */
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#define BIG_REMOTE_BREAKPOINT { 0xc3, 0x20 }
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#define LITTLE_REMOTE_BREAKPOINT { 0x20, 0xc3 }
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/* If your kernel resets the pc after the trap happens you may need to
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define this before including this file. */
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#define DECR_PC_AFTER_BREAK 0
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/* Say how long registers are. */
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#define REGISTER_TYPE long
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/* Say how much memory is needed to store a copy of the register set */
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#define REGISTER_BYTES (NUM_REGS*4)
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/* Index within `registers' of the first byte of the space for
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register N. */
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#define REGISTER_BYTE(N) ((N)*4)
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/* Number of bytes of storage in the actual machine representation
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for register N. */
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#define REGISTER_RAW_SIZE(N) 4
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#define REGISTER_VIRTUAL_SIZE(N) 4
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/* Largest value REGISTER_RAW_SIZE can have. */
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#define MAX_REGISTER_RAW_SIZE 4
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/* Largest value REGISTER_VIRTUAL_SIZE can have. */
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#define MAX_REGISTER_VIRTUAL_SIZE 4
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/* Return the GDB type object for the "standard" data type
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of data in register N. */
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#define REGISTER_VIRTUAL_TYPE(N) \
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(((((N) >= FP0_REGNUM && (N) <= FP15_REGNUM) \
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|| (N) == FPUL_REGNUM) \
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&& TARGET_ARCHITECTURE->mach != bfd_mach_sh_dsp \
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&& TARGET_ARCHITECTURE->mach != bfd_mach_sh3_dsp) \
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? builtin_type_float : builtin_type_int)
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/* Initializer for an array of names of registers.
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Entries beyond the first NUM_REGS are ignored. */
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extern char **sh_register_names;
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#define REGISTER_NAME(i) sh_register_names[i]
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#define NUM_REGS 59
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/* Register numbers of various important registers. Note that some of
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these values are "real" register numbers, and correspond to the
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general registers of the machine, and some are "phony" register
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numbers which are too large to be actual register numbers as far as
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the user is concerned but do serve to get the desired values when
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passed to read_register. */
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#define R0_REGNUM 0
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#define STRUCT_RETURN_REGNUM 2
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#define ARG0_REGNUM 4
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#define ARGLAST_REGNUM 7
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#define FP_REGNUM 14
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#define SP_REGNUM 15
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#define PC_REGNUM 16
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#define PR_REGNUM 17
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#define GBR_REGNUM 18
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#define VBR_REGNUM 19
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#define MACH_REGNUM 20
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#define MACL_REGNUM 21
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#define SR_REGNUM 22
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#define FPUL_REGNUM 23
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#define FPSCR_REGNUM 24
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#define DSR_REGNUM 24
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#define FP0_REGNUM 25
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#define FP15_REGNUM 40
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#define A0G_REGNUM 25
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#define A0_REGNUM 26
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#define A1G_REGNUM 27
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#define A1_REGNUM 28
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#define M0_REGNUM 29
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#define M1_REGNUM 30
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#define X0_REGNUM 31
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#define X1_REGNUM 32
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#define Y0_REGNUM 33
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#define Y1_REGNUM 34
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#define MOD_REGNUM 40
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#define SSR_REGNUM 41
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#define SPC_REGNUM 42
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#define R0B0_REGNUM 43
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#define R0B1_REGNUM 51
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#define RS_REGNUM 43
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#define RE_REGNUM 44
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#define R0B_REGNUM 51
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#define NUM_REALREGS 59
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/* Store the address of the place in which to copy the structure the
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subroutine will return. This is called from call_function.
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We store structs through a pointer passed in R0 */
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#define STORE_STRUCT_RETURN(ADDR, SP) \
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{ write_register (STRUCT_RETURN_REGNUM, (ADDR)); }
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extern use_struct_convention_fn sh_use_struct_convention;
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#define USE_STRUCT_CONVENTION(gcc_p, type) sh_use_struct_convention (gcc_p, type)
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/* Extract from an array REGBUF containing the (raw) register state
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a function return value of type TYPE, and copy that, in virtual format,
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into VALBUF. */
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extern void sh_extract_return_value PARAMS ((struct type *, void *, void *));
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#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
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sh_extract_return_value (TYPE, REGBUF, VALBUF)
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/* Write into appropriate registers a function return value
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of type TYPE, given in virtual format.
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Things always get returned in R0/R1 */
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#define STORE_RETURN_VALUE(TYPE,VALBUF) \
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write_register_bytes (REGISTER_BYTE(0), VALBUF, TYPE_LENGTH (TYPE))
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/* Extract from an array REGBUF containing the (raw) register state
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the address in which a function should return its structure value,
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as a CORE_ADDR (or an expression that can be used as one). */
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#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
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extract_address (REGBUF, REGISTER_RAW_SIZE (0))
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/* Define other aspects of the stack frame.
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we keep a copy of the worked out return pc lying around, since it
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is a useful bit of info */
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#define EXTRA_FRAME_INFO \
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CORE_ADDR return_pc; \
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int leaf_function; \
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int f_offset;
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#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
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sh_init_extra_frame_info(fromleaf, fi)
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extern void sh_init_extra_frame_info PARAMS ((int, struct frame_info *));
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/* A macro that tells us whether the function invocation represented
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by FI does not have a frame on the stack associated with it. If it
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does not, FRAMELESS is set to 1, else 0. */
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#define FRAMELESS_FUNCTION_INVOCATION(FI) \
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(frameless_look_for_prologue(FI))
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#define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc)
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#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
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#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
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/* Set VAL to the number of args passed to frame described by FI.
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Can set VAL to -1, meaning no way to tell. */
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/* We can't tell how many args there are */
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#define FRAME_NUM_ARGS(fi) (-1)
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/* Return number of bytes at start of arglist that are not really args. */
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#define FRAME_ARGS_SKIP 0
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extern void sh_frame_find_saved_regs PARAMS ((struct frame_info * fi,
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struct frame_saved_regs * fsr));
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/* Put here the code to store, into a struct frame_saved_regs,
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the addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special:
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the address we return for it IS the sp for the next frame. */
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#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
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sh_frame_find_saved_regs(frame_info, &(frame_saved_regs))
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typedef unsigned short INSN_WORD;
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extern CORE_ADDR sh_push_arguments PARAMS ((int nargs,
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struct value ** args,
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CORE_ADDR sp,
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unsigned char struct_return,
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CORE_ADDR struct_addr));
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#define USE_GENERIC_DUMMY_FRAMES 1
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#define CALL_DUMMY {0}
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#define CALL_DUMMY_LENGTH (0)
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#define CALL_DUMMY_START_OFFSET (0)
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#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
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#define FIX_CALL_DUMMY(DUMMY, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP)
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#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
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#define CALL_DUMMY_ADDRESS() entry_point_address ()
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extern CORE_ADDR sh_push_return_address PARAMS ((CORE_ADDR, CORE_ADDR));
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#define PUSH_RETURN_ADDRESS(PC, SP) sh_push_return_address (PC, SP)
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extern CORE_ADDR sh_frame_chain PARAMS ((struct frame_info *));
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#define FRAME_CHAIN(FRAME) sh_frame_chain(FRAME)
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#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
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#define FRAME_CHAIN_VALID(FP, FRAME) generic_file_frame_chain_valid (FP, FRAME)
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#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
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#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
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(sh_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
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/* override the standard get_saved_register function with
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one that takes account of generic CALL_DUMMY frames */
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#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
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generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
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/* Discard from the stack the innermost frame, restoring all saved
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registers. */
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extern void sh_pop_frame PARAMS ((void));
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#define POP_FRAME sh_pop_frame();
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#define NOP {0x20, 0x0b}
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#define REGISTER_SIZE 4
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#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1)
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#define BELIEVE_PCC_PROMOTION 1
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/* Need this for WinGDB. See gdb/mswin/{regdoc.h, gdbwin.c, gui.cpp}. */
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#define TARGET_SH
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