246 lines
6.3 KiB
C
246 lines
6.3 KiB
C
/* Print mips instructions for GDB, the GNU debugger, or for objdump.
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Copyright 1989, 1991, 1992 Free Software Foundation, Inc.
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Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include <ansidecl.h>
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opcode/mips.h"
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/* FIXME: we need direct access to the swapping functions. */
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#include "libbfd.h"
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/* Mips instructions are never longer than this many bytes. */
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#define MAXLEN 4
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/* FIXME: This should be shared with gdb somehow. */
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#define REGISTER_NAMES \
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{ "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
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"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
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"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \
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"sr", "lo", "hi", "bad", "cause","pc", \
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\
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"fsr", "fir", "fp", "inx", "rand", "tlblo","ctxt", "tlbhi",\
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"epc", "prid"\
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}
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static CONST char * CONST reg_names[] = REGISTER_NAMES;
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/* subroutine */
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static void
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print_insn_arg (d, l, pc, info)
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char *d;
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register unsigned long int l;
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bfd_vma pc;
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struct disassemble_info *info;
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{
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int delta;
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switch (*d)
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{
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case ',':
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case '(':
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case ')':
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(*info->fprintf_func) (info->stream, "%c", *d);
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break;
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case 's':
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case 'b':
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case 'r':
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case 'v':
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(*info->fprintf_func) (info->stream, "$%s",
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reg_names[(l >> OP_SH_RS) & OP_MASK_RS]);
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break;
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case 't':
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case 'w':
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(*info->fprintf_func) (info->stream, "$%s",
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reg_names[(l >> OP_SH_RT) & OP_MASK_RT]);
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break;
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case 'i':
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case 'u':
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(*info->fprintf_func) (info->stream, "%d",
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(l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
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break;
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case 'j': /* same as i, but sign-extended */
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case 'o':
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delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
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if (delta & 0x8000)
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delta |= ~0xffff;
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(*info->fprintf_func) (info->stream, "%d",
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delta);
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break;
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case 'a':
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(*info->print_address_func)
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(((pc & 0xF0000000) | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2)),
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info);
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break;
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case 'p':
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/* sign extend the displacement */
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delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
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if (delta & 0x8000)
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delta |= ~0xffff;
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(*info->print_address_func)
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((delta << 2) + pc + 4,
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info);
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break;
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case 'd':
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(*info->fprintf_func) (info->stream, "$%s",
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reg_names[(l >> OP_SH_RD) & OP_MASK_RD]);
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break;
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case '<':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_SHAMT) & OP_MASK_SHAMT);
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break;
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case 'c':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_CODE) & OP_MASK_CODE);
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break;
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case 'C':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_COPZ) & OP_MASK_COPZ);
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break;
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case 'B':
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(*info->fprintf_func) (info->stream, "0x%x",
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(l >> OP_SH_SYSCALL) & OP_MASK_SYSCALL);
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break;
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case 'S':
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case 'V':
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(*info->fprintf_func) (info->stream, "$f%d",
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(l >> OP_SH_FS) & OP_MASK_FS);
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break;
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case 'T':
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case 'W':
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(*info->fprintf_func) (info->stream, "$f%d",
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(l >> OP_SH_FT) & OP_MASK_FT);
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break;
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case 'D':
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(*info->fprintf_func) (info->stream, "$f%d",
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(l >> OP_SH_FD) & OP_MASK_FD);
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break;
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case 'E':
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(*info->fprintf_func) (info->stream, "$%d",
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(l >> OP_SH_RT) & OP_MASK_RT);
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break;
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case 'G':
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(*info->fprintf_func) (info->stream, "$%d",
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(l >> OP_SH_RD) & OP_MASK_RD);
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break;
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default:
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(*info->fprintf_func) (info->stream,
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"# internal error, undefined modifier(%c)", *d);
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break;
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}
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}
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/* Print the mips instruction at address MEMADDR in debugged memory,
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on using INFO. Returns length of the instruction, in bytes, which is
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always 4. BIGENDIAN must be 1 if this is big-endian code, 0 if
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this is little-endian code. */
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int
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_print_insn_mips (memaddr, word, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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unsigned long int word;
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{
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register int i;
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register char *d;
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for (i = 0; i < NUMOPCODES; i++)
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{
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if (mips_opcodes[i].pinfo != INSN_MACRO)
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{
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register unsigned int match = mips_opcodes[i].match;
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register unsigned int mask = mips_opcodes[i].mask;
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if ((word & mask) == match)
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break;
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}
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}
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/* Handle undefined instructions. */
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if (i == NUMOPCODES)
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{
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(*info->fprintf_func) (info->stream, "0x%x", word);
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return 4;
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}
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(*info->fprintf_func) (info->stream, "%s", mips_opcodes[i].name);
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if (!(d = mips_opcodes[i].args))
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return 4;
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(*info->fprintf_func) (info->stream, " ");
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while (*d)
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print_insn_arg (d++, word, memaddr, info);
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return 4;
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}
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int
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print_insn_big_mips (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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bfd_byte buffer[4];
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int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
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if (status == 0)
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return _print_insn_mips (memaddr, _do_getb32 (buffer), info);
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else
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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}
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int
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print_insn_little_mips (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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bfd_byte buffer[4];
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int status = (*info->read_memory_func) (memaddr, buffer, 4, info);
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if (status == 0)
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return _print_insn_mips (memaddr, _do_getl32 (buffer), info);
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else
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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}
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