old-cross-binutils/opcodes
Matthew Wahab 35822b3812 [AArch64] Let aliased instructions be their preferred form.
Although the AArch64 backend supports aliased instructions, the aliasing
forms are always preferred over the real instruction. This makes it
awkward to handle instructions which have aliases but which are their
own preferred form.

This patch includes the instruction being aliased in the list of
alternatives which is searched when considering which form to use.

opcodes/
2015-11-27  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-dis.c: Weaken assert.
	* aarch64-gen.c: Include the instruction in the list of its
	possible aliases.

Change-Id: I1f23eb25fccef76a64d3d732d58761bd25fad94e
2015-11-27 15:05:09 +00:00
..
po Update translations. 2015-11-20 12:35:43 +00:00
.gitignore
aarch64-asm-2.c [AArch64] Let aliased instructions be their preferred form. 2015-11-27 15:05:09 +00:00
aarch64-asm.c
aarch64-asm.h
aarch64-dis-2.c [AArch64] Let aliased instructions be their preferred form. 2015-11-27 15:05:09 +00:00
aarch64-dis.c [AArch64] Let aliased instructions be their preferred form. 2015-11-27 15:05:09 +00:00
aarch64-dis.h
aarch64-gen.c [AArch64] Let aliased instructions be their preferred form. 2015-11-27 15:05:09 +00:00
aarch64-opc-2.c
aarch64-opc.c [Aarch64] Support an ARMv8.2 system register. 2015-11-27 13:44:10 +00:00
aarch64-opc.h
aarch64-tbl.h
aclocal.m4
alpha-dis.c
alpha-opc.c
arc-dis.c
arc-dis.h
arc-ext.c
arc-ext.h
arc-fxi.h
arc-opc.c
arc-regs.h
arc-tbl.h
arm-dis.c opcodes: handle mach-o for thumb/arm disambiguation. 2015-11-23 15:50:29 +01:00
avr-dis.c
bfin-dis.c
cgen-asm.c
cgen-asm.in
cgen-bitset.c
cgen-dis.c
cgen-dis.in
cgen-ibld.in
cgen-opc.c
cgen.sh
ChangeLog [AArch64] Let aliased instructions be their preferred form. 2015-11-27 15:05:09 +00:00
ChangeLog-0001
ChangeLog-0203
ChangeLog-2004
ChangeLog-2005
ChangeLog-2006
ChangeLog-2007
ChangeLog-2008
ChangeLog-2009
ChangeLog-2010
ChangeLog-2011
ChangeLog-2012
ChangeLog-2013
ChangeLog-2014
ChangeLog-9297
ChangeLog-9899
config.in
configure Bump version to 2.26.51 2015-11-14 16:24:39 -08:00
configure.ac
configure.com
cr16-dis.c
cr16-opc.c
cris-dis.c
cris-opc.c
crx-dis.c
crx-opc.c
d10v-dis.c
d10v-opc.c
d30v-dis.c
d30v-opc.c
dep-in.sed
dis-buf.c
dis-init.c
disassemble.c
dlx-dis.c
epiphany-asm.c
epiphany-desc.c
epiphany-desc.h
epiphany-dis.c
epiphany-ibld.c
epiphany-opc.c
epiphany-opc.h
fr30-asm.c
fr30-desc.c
fr30-desc.h
fr30-dis.c
fr30-ibld.c
fr30-opc.c
fr30-opc.h
frv-asm.c
frv-desc.c
frv-desc.h
frv-dis.c
frv-ibld.c
frv-opc.c
frv-opc.h
ft32-dis.c
ft32-opc.c
h8300-dis.c Remove a if-clause that is redundant because the same test has been performed earlier on. 2015-11-20 14:16:30 +00:00
h8500-dis.c
h8500-opc.h
hppa-dis.c
i370-dis.c
i370-opc.c
i386-dis-evex.h
i386-dis.c
i386-gen.c
i386-init.h
i386-opc.c
i386-opc.h
i386-opc.tbl
i386-reg.tbl
i386-tbl.h
i860-dis.c
i960-dis.c
ia64-asmtab.c
ia64-asmtab.h
ia64-dis.c
ia64-gen.c
ia64-ic.tbl
ia64-opc-a.c
ia64-opc-b.c
ia64-opc-d.c
ia64-opc-f.c
ia64-opc-i.c
ia64-opc-m.c
ia64-opc-x.c
ia64-opc.c
ia64-opc.h
ia64-raw.tbl
ia64-war.tbl
ia64-waw.tbl
ip2k-asm.c
ip2k-desc.c
ip2k-desc.h
ip2k-dis.c
ip2k-ibld.c
ip2k-opc.c
ip2k-opc.h
iq2000-asm.c
iq2000-desc.c
iq2000-desc.h
iq2000-dis.c
iq2000-ibld.c
iq2000-opc.c
iq2000-opc.h
lm32-asm.c
lm32-desc.c
lm32-desc.h
lm32-dis.c
lm32-ibld.c
lm32-opc.c
lm32-opc.h
lm32-opinst.c
m32c-asm.c
m32c-desc.c
m32c-desc.h
m32c-dis.c
m32c-ibld.c
m32c-opc.c
m32c-opc.h
m32r-asm.c
m32r-desc.c
m32r-desc.h
m32r-dis.c
m32r-ibld.c
m32r-opc.c
m32r-opc.h
m32r-opinst.c
m68hc11-dis.c
m68hc11-opc.c
m68k-dis.c
m68k-opc.c
m88k-dis.c
m10200-dis.c
m10200-opc.c
m10300-dis.c
m10300-opc.c
MAINTAINERS
Makefile.am
Makefile.in
makefile.vms
mcore-dis.c
mcore-opc.h
mep-asm.c
mep-desc.c
mep-desc.h
mep-dis.c
mep-ibld.c
mep-opc.c
mep-opc.h
metag-dis.c
microblaze-dis.c
microblaze-dis.h
microblaze-opc.h
microblaze-opcm.h
micromips-opc.c
mips-dis.c
mips-formats.h
mips-opc.c Move copy_u.w to MSA64 ASE, remove copy_u.d. 2015-11-09 08:49:10 +00:00
mips16-opc.c
mmix-dis.c
mmix-opc.c
moxie-dis.c
moxie-opc.c
msp430-decode.c
msp430-decode.opc
msp430-dis.c
mt-asm.c
mt-desc.c
mt-desc.h
mt-dis.c
mt-ibld.c
mt-opc.c
mt-opc.h
nds32-asm.c
nds32-asm.h
nds32-dis.c
nds32-opc.h
nios2-dis.c
nios2-opc.c
ns32k-dis.c
opc2c.c
opintl.h
or1k-asm.c
or1k-desc.c
or1k-desc.h
or1k-dis.c
or1k-ibld.c
or1k-opc.c
or1k-opc.h
or1k-opinst.c
pdp11-dis.c
pdp11-opc.c
pj-dis.c
pj-opc.c
ppc-dis.c Add assembler, disassembler and linker support for power9. 2015-11-11 19:52:52 -06:00
ppc-opc.c Add assembler, disassembler and linker support for power9. 2015-11-11 19:52:52 -06:00
rl78-decode.c Fix RL78 disassembly of DE+offset addressing to always show the offset, even when zero. 2015-10-27 15:24:40 +00:00
rl78-decode.opc Fix RL78 disassembly of DE+offset addressing to always show the offset, even when zero. 2015-10-27 15:24:40 +00:00
rl78-dis.c
rx-decode.c Disassemble RX NOP instructions as such. 2015-11-02 14:37:33 +00:00
rx-decode.opc Disassemble RX NOP instructions as such. 2015-11-02 14:37:33 +00:00
rx-dis.c Fix the disassembly of conditional instructions will illegal condition selections. 2015-11-17 11:37:14 +00:00
s390-dis.c
s390-mkopc.c
s390-opc.c
s390-opc.txt
score-dis.c
score-opc.h
score7-dis.c
sh-dis.c
sh-opc.h
sh64-dis.c
sh64-opc.c
sh64-opc.h
sparc-dis.c
sparc-opc.c
spu-dis.c
spu-opc.c
stamp-h.in
sysdep.h
tic4x-dis.c
tic6x-dis.c
tic30-dis.c
tic54x-dis.c
tic54x-opc.c
tic80-dis.c
tic80-opc.c
tilegx-dis.c
tilegx-opc.c
tilepro-dis.c
tilepro-opc.c
v850-dis.c
v850-opc.c
vax-dis.c
visium-dis.c
visium-opc.c
w65-dis.c
w65-opc.h
xc16x-asm.c
xc16x-desc.c
xc16x-desc.h
xc16x-dis.c
xc16x-ibld.c
xc16x-opc.c
xc16x-opc.h
xgate-dis.c
xgate-opc.c
xstormy16-asm.c
xstormy16-desc.c
xstormy16-desc.h
xstormy16-dis.c
xstormy16-ibld.c
xstormy16-opc.c
xstormy16-opc.h
xtensa-dis.c
z8k-dis.c
z8k-opc.h
z8kgen.c
z80-dis.c