74541ad4c0
* elf-bfd.h (struct elf_link_hash_table): Reorder. Add
text_index_section and data_index_section.
(struct elf_backend_data): Add elf_backend_init_index_section.
(_bfd_elf_init_1_index_section): Declare.
(_bfd_elf_init_2_index_sections): Declare.
* elfxx-target.h (elf_backend_init_index_section): Define.
(elfNN_bed): Init new field.
* elflink.c (_bfd_elf_link_omit_section_dynsym): Keep first tls
section and text_index_section plus data_index_section.
(_bfd_elf_link_renumber_dynsyms): Clear dynindx on omitted sections.
(_bfd_elf_init_1_index_section): New function.
(_bfd_elf_init_2_index_sections): New function.
(bfd_elf_size_dynsym_hash_dynstr): Call elf_backend_init_index_section.
(elf_link_input_bfd): When emitting relocs, use text_index_section
and data_index_section for removed sections.
* elf-m10300.c (elf_backend_omit_section_dynsym): Define.
* elf32-i386.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-sh.c: Likewise.
* elf32-xstormy16.c: Likewise.
* elf32-xtensa.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-hppa.c: Likewise.
* elf64-mmix.c: Likewise.
* elf64-sh64.c: Likewise.
* elfxx-ia64.c: Likewise.
* elf32-arm.c (elf32_arm_final_link_relocate): Use text_index_section
and data_index_section sym for relocs against sections with no dynamic
section sym.
(elf_backend_init_index_section): Define.
* elf32-cris.c: Similarly.
* elf32-hppa.c: Similarly.
* elf32-i370.c: Similarly.
* elf32-m68k.c: Similarly.
* elf32-mips.c: Similarly.
* elf32-ppc.c: Similarly.
* elf32-s390.c: Similarly.
* elf32-sparc.c: Similarly.
* elf32-vax.c: Similarly.
* elf64-mips.c: Similarly.
* elf64-ppc.c: Similarly.
* elf64-s390.c: Similarly.
* elf64-sparc.c: Similarly.
* elf64-x86-64.c: Similarly.
* elfn32-mips.c: Similarly.
* elfxx-mips.c: Similarly.
* elfxx-sparc.c: Similarly.
* linker.c (fix_syms): Base symbols in removed sections on
previous section in preference to using absolute section.
ld/
* ldlang.c (strip_excluded_output_sections): Do strip sections
that define syms, but don't ignore them.
* ld.texinfo (Output Section Discarding): Revise.
* emultempl/armcoff.em (gld${EMULATION_NAME}_finish): Always call
finish_default.
ld/testsuite/
Update for section sym changes.
58 lines
1.4 KiB
Makefile
58 lines
1.4 KiB
Makefile
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.*: file format elf32-tradbigmips
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Disassembly of section .text:
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.* <__start>:
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.*: 3c1c0fc0 lui gp,0xfc0
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.*: 279c7bc0 addiu gp,gp,31680
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.*: 0399e021 addu gp,gp,t9
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.*: 27bdfff0 addiu sp,sp,-16
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.*: afbe0008 sw s8,8\(sp\)
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.*: 03a0f021 move s8,sp
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.*: afbc0000 sw gp,0\(sp\)
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.*: 8f99802c lw t9,-32724\(gp\)
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.*: 27848038 addiu a0,gp,-32712
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.*: 0320f809 jalr t9
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.*: 00000000 nop
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.*: 8fdc0000 lw gp,0\(s8\)
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.*: 00000000 nop
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.*: 8f99802c lw t9,-32724\(gp\)
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.*: 27848048 addiu a0,gp,-32696
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.*: 0320f809 jalr t9
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.*: 00000000 nop
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.*: 8fdc0000 lw gp,0\(s8\)
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.*: 00000000 nop
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.*: 8f99802c lw t9,-32724\(gp\)
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.*: 27848030 addiu a0,gp,-32720
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.*: 0320f809 jalr t9
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.*: 00000000 nop
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.*: 8fdc0000 lw gp,0\(s8\)
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.*: 00401021 move v0,v0
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.*: 3c030000 lui v1,0x0
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.*: 24638000 addiu v1,v1,-32768
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.*: 00621821 addu v1,v1,v0
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.*: 7c02283b rdhwr v0,\$5
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.*: 8f838044 lw v1,-32700\(gp\)
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.*: 00000000 nop
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.*: 00621821 addu v1,v1,v0
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.*: 8f838040 lw v1,-32704\(gp\)
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.*: 00000000 nop
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.*: 00621821 addu v1,v1,v0
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.*: 7c02283b rdhwr v0,\$5
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.*: 3c030000 lui v1,0x0
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.*: 24639004 addiu v1,v1,-28668
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.*: 00621821 addu v1,v1,v0
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.*: 03c0e821 move sp,s8
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.*: 8fbe0008 lw s8,8\(sp\)
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.*: 03e00008 jr ra
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.*: 27bd0010 addiu sp,sp,16
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.* <__tls_get_addr>:
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.*: 03e00008 jr ra
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.*: 00000000 nop
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...
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Disassembly of section .MIPS.stubs:
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.* <.MIPS.stubs>:
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...
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