ed187aa442
* binutils-all/mips/mixed-mips16.d: Update accordingly.
30 lines
927 B
Makefile
30 lines
927 B
Makefile
#PROG: objcopy
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#objdump: -dr --prefix-addresses --show-raw-insn
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#name: Mixed MIPS and MIPS16 disassembly
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#as: -32 -mips2
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# Test mixed-mode disassembly in overlapping sections.
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.*: +file format .*mips.*
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Disassembly of section \.text\.foo:
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[0-9a-f]+ <[^>]*> 27bdffe0 addiu sp,sp,-32
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[0-9a-f]+ <[^>]*> afbf001c sw ra,28\(sp\)
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[0-9a-f]+ <[^>]*> 0c000000 jal 00000000 <.*>
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[ ]*[0-9a-f]+: R_MIPS_26 baz
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[0-9a-f]+ <[^>]*> 00000000 nop
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[0-9a-f]+ <[^>]*> 8fbf001c lw ra,28\(sp\)
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[0-9a-f]+ <[^>]*> 03e00008 jr ra
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[0-9a-f]+ <[^>]*> 27bd0020 addiu sp,sp,32
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\.\.\.
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Disassembly of section \.text\.bar:
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[0-9a-f]+ <[^>]*> 63fc addiu sp,-32
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[0-9a-f]+ <[^>]*> 6207 sw ra,28\(sp\)
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[0-9a-f]+ <[^>]*> 1800 0000 jal 00000000 <.*>
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[ ]*[0-9a-f]+: R_MIPS16_26 baz
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[0-9a-f]+ <[^>]*> 6500 nop
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[0-9a-f]+ <[^>]*> 9707 lw a3,28\(sp\)
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[0-9a-f]+ <[^>]*> ef00 jr a3
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[0-9a-f]+ <[^>]*> 6304 addiu sp,32
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\.\.\.
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