d45a4bef83
2005-10-06 Jim Blandy <jimb@redhat.com> Add simulator for Renesas M32C and M16C. * m32c: New directory. * configure.ac: Add entry for Renesas M32C. * configure: Regenerate. sim/m32c/ChangeLog: 2005-10-06 Jim Blandy <jimb@redhat.com> Simulator for Renesas M32C and M16C, by DJ Delorie <dj@redhat.com>, with further work from Jim Blandy <jimb@redhat.com> and Kevin Buettner <kevinb@redhat.com>. * ChangeLog: New. * Makefile.in: New. * blinky.S: New. * config.in: New. * configure: New. * configure.in: New. * cpu.h: New. * gdb-if.c: New. * gloss.S: New. * int.c: New. * int.h: New. * load.c: New. * load.h: New. * m32c.opc: New. * main.c: New. * mem.c: New. * mem.h: New. * misc.c: New. * misc.h: New. * opc2c.c: New. * r8c.opc: New. * reg.c: New. * safe-fgets.c: New. * safe-fgets.h: New. * sample.S: New. * sample.ld: New. * sample2.c: New. * srcdest.c: New. * syscalls.c: New. * syscalls.h: New. * trace.c: New. * trace.h: New.
43 lines
1.2 KiB
Text
43 lines
1.2 KiB
Text
/* sample2.ld --- linker script for sample2.x
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Copyright (C) 2005 Free Software Foundation, Inc.
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Contributed by Red Hat, Inc.
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This file is part of the GNU simulators.
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The GNU simulators are free software; you can redistribute them and/or
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modify them under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU simulators are distributed in the hope that they will be
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useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with the GNU simulators; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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02110-1301, USA */
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/* See the 'sample2.x' target in Makefile.in. */
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ENTRY(_start)
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MEMORY {
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RAM1 (w) : ORIGIN = 0xc800, LENGTH = 0x0200
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RAM2 (w) : ORIGIN = 0xca56, LENGTH = 0x1000
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ROM (w) : ORIGIN = 0x30000, LENGTH = 0x1000
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}
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SECTIONS {
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.data : {
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*(.data*)
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} > RAM1
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.text : {
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*(.text*)
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} > RAM2
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.fardata : {
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*(.fardata*)
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} > ROM
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}
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