1e1e3b618f
* *Modified Files: * .Sanitize ChangeLog *Added Files: * Makefile.in README.Cygnus config.in configure configure.in * device.c device.h dma.c dma.h engine-sky.c gencode.c gpuif.c * gpuif.h hardware.c hardware.h interp.c m16.igen mdmx.igen * mips.dc mips.igen pke0.c pke0.h pke1.c pke1.h r5900.igen * sim-main.h tconfig.in vr5400.igen vu0.c vu0.h vu1.c vu1.h
17 lines
654 B
Text
17 lines
654 B
Text
/* mips target configuration file. */
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/* Define this if the simulator supports profiling.
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See the mips simulator for an example.
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This enables the `-p foo' and `-s bar' options.
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The target is required to provide sim_set_profile{,_size}. */
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#define SIM_HAVE_PROFILE
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/* Define this if the simulator uses an instruction cache.
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See the h8/300 simulator for an example.
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This enables the `-c size' option to set the size of the cache.
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The target is required to provide sim_set_simcache_size. */
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/* #define SIM_HAVE_SIMCACHE */
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/* Define this if the target cpu is bi-endian
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and the simulator supports it. */
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#define SIM_HAVE_BIENDIAN
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