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old-cross-binutils/gdb/config/sparc/tm-sparclite.h
Michael Snyder 5af923b0f0 2000-05-10 Michael Snyder <msnyder@seadog.cygnus.com> 
Make Sparc a Multi-Arch target.  Discard PARAMS macro (require ANSI).
	* sparc-tdep.c: include arch-utils.h.
	(SPARC_HAS_FPU, FP_REGISTER_BYTES, FP_MAX_REG NUM, SPARC_INTREG_SIZE,
	DUMMY_REG_SAVE_OFFSET): provide multi-arch-compatible definitions.
	(GDB_TARGET_IS_SPARC64): make into a runtime test.
	(struct frame_extra_info): Define, use instead of the macro.
	(Many places): Use alloca instead of statically allocated buffers
	that depend on a multi-arch variable such as MAX_REGISTER_RAW_SIZE.
	(sparc_extract_struct_value_address): Accept a pointer arg instead
	of an array sized by REGISTER_BYTES.
	(examine_prologue): Accept a pointer to an array of CORE_ADDR,
	instead of the defunct struct frame_saved_regs.  Recognize new
	Sparc64 store instructions as part of the prologue.  Ignore the
	destination of a frame store when parsing the prologue (so long
	as it's on the stack).
	(sparc_push_dummy_frame): Fix incorrect buffer offset for PSTATE.
	(sparc_frame_find_saved_regs): Accept a ptr to an array of CORE_ADDR
	instead of the defunct struct frame_saved_regs.
	(supply_gregset): Discard unnecessary 'zerobuf': just send NULL to
	supply_register.  Provide 4-byte offset to compensate for diff
	between size of the prgreg_t elements on a 64-bit host and size
	of the registers for a 32-bit target.  Fill all inaccessible regs
	with zero so they won't keep being requested again and again.
	(fill_gregset): Handle 32/64 size difference between registers
	and prgreg_t.  Handle as many new 64-bit regs as possible.
	(supply_fpregset, fill_fpregset): Attempt to handle 64-bit world.
	(sparc_push_arguments): Rename to sparc32_push_arguments.
	Copy arguments into registers as well as onto stack, so that the
	CALL_DUMMY (code pushed onto the target stack) is not required.
	(sparc_extract_return_value): Rename to sparc32_extract_return_value.
	(sparc_store_return_value): Use memset instead of bzero.
	Use write_register_gen instead of write_register_bytes.
	(sparclet_store_return_value): New function.
	(_initialize_sparc_tdep): Call register_gdbarch_init to activate
	the gdbarch multi-architecture system.
	(sp64_push_arguments): Rename to sparc64_push_arguments.
	Extend to store arguments in general registers as well as on stack.
	(sparc64_extract_return_value): Rename to sp64_extract_return_value.
	Use as a private function, to be called by the new external function
	sparc64_extract_return_value.
	(sparclet_extract_return_value): New function.
	(sparc32_stack_align, sparc64_stack_align, sparc32_register_name,
	sparc64_register_name, sparc_print_extra_frame_info,
	sparclite_register_name, sparclet_register_name,
	sparc_push_return_address, sparc64_use_struct_convention,
	sparc32_store_struct_return, sparc64_store_struct_return,
	sparc32_register_virtual_type, sparc64_register_virtual_type,
	sparc32_register_size, sparc64_register_size,
	sparc32_register_byte, sparc64_register_byte,
	sparc_gdbarch_skip_prologue, sparc_convert_to_virtual,
	sparc_convert_to_raw, sparc_frame_init_saved_regs,
	sparc_frame_address, sparc_gdbarch_fix_call_dummy,
	sparc_coerce_float_to_double, sparc_call_dummy_address,
	sparc_y_regnum, sparc_reg_struct_has_addr, sparc_intreg_size,
	sparc_return_value_on_stack): New functions supporting multi-arch.
	(sparc_gdbarch_init): New function; initialize multi-arch.
	(struct gdbarch_tdep): Define, use for private multi-arch data.
	* config/sparc/tm-sparc.h: Move definitions around, enclose with
	#ifdef GDB_MULTI_ARCH tests, provide some multi-arch alternate
	definitions.  Add enums for register names, to help debugging gdb.
	This header file must work for non-multi-arch and for multi-arch.
	* config/sparc/tm-sp64.h: Add GDB_MULTI_ARCH configuration.  Also add
	AT_ENTRY_POINT definitions for CALL_DUMMY, for non-multi-arch case.
	Define GDB_MULTI_ARCH.
	* config/sparc/tm-sparclet.h: Add GDB_MULTI_ARCH configuration.
	Do not define GDB_MULTI_ARCH (bfd does not correctly identify target).
	* config/sparc/tm-sparclite.h: Ditto.
	* config/sparc/tm-sun4sol2.h: Define GDB_MULTI_ARCH.
	* sparclet-rom.c (sparclet_regnames): Initialize explicitly, to
	avoid using deprecated REGISTER_NAMES macro.
	* Makefile.in: Let sparc-tdep.c depend on arch-utils.h.
2000-05-10 20:07:25 +00:00

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/* Macro definitions for GDB for a Fujitsu SPARClite.
Copyright 1993 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TARGET_SPARCLITE 1 /* Still needed for non-multi-arch case */
#include "sparc/tm-sparc.h"
/* Note: we are not defining GDB_MULTI_ARCH for the sparclet target
at this time, because we have not figured out how to detect the
sparclet target from the bfd structure. */
/* Sparclite regs, for debugging purposes */
enum {
DIA1_REGNUM = 72, /* debug instr address register 1 */
DIA2_REGNUM = 73, /* debug instr address register 2 */
DDA1_REGNUM = 74, /* debug data address register 1 */
DDA2_REGNUM = 75, /* debug data address register 2 */
DDV1_REGNUM = 76, /* debug data value register 1 */
DDV2_REGNUM = 77, /* debug data value register 2 */
DCR_REGNUM = 78, /* debug control register */
DSR_REGNUM = 79 /* debug status regsiter */
};
/* overrides of tm-sparc.h */
#undef TARGET_BYTE_ORDER
#define TARGET_BYTE_ORDER_SELECTABLE
/* Select the sparclite disassembler. Slightly different instruction set from
the V8 sparc. */
#undef TM_PRINT_INSN_MACH
#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclite
/* Amount PC must be decremented by after a hardware instruction breakpoint.
This is often the number of bytes in BREAKPOINT
but not always. */
#define DECR_PC_AFTER_HW_BREAK 4
#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
/*
* The following defines must go away for MULTI_ARCH.
*/
#undef FRAME_CHAIN_VALID
#define FRAME_CHAIN_VALID(FP,FI) func_frame_chain_valid (FP, FI)
#undef NUM_REGS
#define NUM_REGS 80
#undef REGISTER_BYTES
#define REGISTER_BYTES (32*4+32*4+8*4+8*4)
#undef REGISTER_NAMES
#define REGISTER_NAMES \
{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
\
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
\
"y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr", \
"dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr" }
#define DIA1_REGNUM 72 /* debug instr address register 1 */
#define DIA2_REGNUM 73 /* debug instr address register 2 */
#define DDA1_REGNUM 74 /* debug data address register 1 */
#define DDA2_REGNUM 75 /* debug data address register 2 */
#define DDV1_REGNUM 76 /* debug data value register 1 */
#define DDV2_REGNUM 77 /* debug data value register 2 */
#define DCR_REGNUM 78 /* debug control register */
#define DSR_REGNUM 79 /* debug status regsiter */
#endif /* GDB_MULTI_ARCH */
#define TARGET_HW_BREAK_LIMIT 2
#define TARGET_HW_WATCH_LIMIT 2
/* Enable watchpoint macro's */
#define TARGET_HAS_HARDWARE_WATCHPOINTS
#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
sparclite_check_watch_resources (type, cnt, ot)
/* When a hardware watchpoint fires off the PC will be left at the
instruction which caused the watchpoint. It will be necessary for
GDB to step over the watchpoint. ***
#define STOPPED_BY_WATCHPOINT(W) \
((W).kind == TARGET_WAITKIND_STOPPED \
&& (W).value.sig == TARGET_SIGNAL_TRAP \
&& ((int) read_register (IPSW_REGNUM) & 0x00100000))
*/
/* Use these macros for watchpoint insertion/deletion. */
#define target_insert_watchpoint(addr, len, type) sparclite_insert_watchpoint (addr, len, type)
#define target_remove_watchpoint(addr, len, type) sparclite_remove_watchpoint (addr, len, type)
#define target_insert_hw_breakpoint(addr, len) sparclite_insert_hw_breakpoint (addr, len)
#define target_remove_hw_breakpoint(addr, len) sparclite_remove_hw_breakpoint (addr, len)
#define target_stopped_data_address() sparclite_stopped_data_address()
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