293 lines
7.1 KiB
C
293 lines
7.1 KiB
C
# Simulator main loop for CRIS. -*- C -*-
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# Copyright (C) 2004-2015 Free Software Foundation, Inc.
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# Contributed by Axis Communications.
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#
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# This file is part of the GNU simulators.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# Based on the fr30 file.
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# Syntax:
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# /bin/sh mainloop.in command
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#
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# Command is one of:
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#
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# init
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# support
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# extract-{simple,scache,pbb}
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# {full,fast}-exec-{simple,scache,pbb}
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#
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# A target need only provide a "full" version of one of simple,scache,pbb.
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# If the target wants it can also provide a fast version of same.
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# It can't provide more than this, however for illustration's sake the CRIS
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# port provides examples of all.
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# ??? After a few more ports are done, revisit.
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# Will eventually need to machine generate a lot of this.
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case "x$1" in
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xsupport)
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cat <<EOF
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/* It seems we don't have a templated header file corresponding to
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cris-tmpl.c, so we have to get out declarations the hackish way. */
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extern void @cpu@_specific_init (SIM_CPU *current_cpu);
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static INLINE const IDESC *
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extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf,
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int fast_p)
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{
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const IDESC *id = @cpu@_decode (current_cpu, pc, insn,
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#if CGEN_INT_INSN_P
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insn,
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#endif
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abuf);
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@cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p);
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if (! fast_p)
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{
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int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
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int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
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@cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p);
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}
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return id;
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}
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static INLINE SEM_PC
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execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p)
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{
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SEM_PC vpc;
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if (fast_p)
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{
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#if ! WITH_SEM_SWITCH_FAST
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#if WITH_SCACHE
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vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc);
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#else
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vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf);
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#endif
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#else
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abort ();
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#endif /* WITH_SEM_SWITCH_FAST */
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}
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else
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{
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#if ! WITH_SEM_SWITCH_FULL
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ARGBUF *abuf = &sc->argbuf;
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const IDESC *idesc = abuf->idesc;
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#if WITH_SCACHE_PBB
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int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL);
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#else
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int virtual_p = 0;
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#endif
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if (! virtual_p)
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{
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/* FIXME: call x-before */
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if (ARGBUF_PROFILE_P (abuf))
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PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num);
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/* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */
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if (PROFILE_MODEL_P (current_cpu)
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&& ARGBUF_PROFILE_P (abuf))
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@cpu@_model_insn_before (current_cpu, 1 /*first_p*/);
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TRACE_INSN_INIT (current_cpu, abuf, 1);
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TRACE_INSN (current_cpu, idesc->idata,
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(const struct argbuf *) abuf, abuf->addr);
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}
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#if WITH_SCACHE
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vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc);
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#else
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vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf);
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#endif
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if (! virtual_p)
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{
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/* FIXME: call x-after */
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if (PROFILE_MODEL_P (current_cpu)
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&& ARGBUF_PROFILE_P (abuf))
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{
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int cycles;
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cycles = (*idesc->timing->model_fn) (current_cpu, sc);
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@cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles);
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}
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TRACE_INSN_FINI (current_cpu, abuf, 1);
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}
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#else
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abort ();
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#endif /* WITH_SEM_SWITCH_FULL */
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}
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return vpc;
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}
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EOF
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;;
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xinit)
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cat <<EOF
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/* This seemed the only sane location to emit a call to a
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model-specific init function. It may not work for all simulator
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types. FIXME: Introduce a model-init hook. */
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/* We use the same condition as the code that's expected to follow, so
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GCC can consolidate the code with only one conditional. */
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if (! CPU_IDESC_SEM_INIT_P (current_cpu))
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@cpu@_specific_init (current_cpu);
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EOF
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;;
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xextract-simple | xextract-scache)
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# Inputs: current_cpu, vpc, sc, FAST_P
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# Outputs: sc filled in
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cat <<EOF
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{
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CGEN_INSN_INT insn = GETIMEMUHI (current_cpu, vpc);
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extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P);
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}
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EOF
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;;
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xextract-pbb)
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# Inputs: current_cpu, pc, sc, max_insns, FAST_P
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# Outputs: sc, pc
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# sc must be left pointing past the last created entry.
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# pc must be left pointing past the last created entry.
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# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called
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# to record the vpc of the cti insn.
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# SET_INSN_COUNT(n) must be called to record number of real insns.
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cat <<EOF
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{
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const IDESC *idesc;
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int icount = 0;
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/* Make sure the buffer doesn't overflow for profiled insns if
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max_insns happens to not be a multiple of 3. */
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if (!FAST_P)
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max_insns -= 2 + 3;
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else
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/* There might be two real insns handled per loop. */
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max_insns--;
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while (max_insns > 0)
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{
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UHI insn = GETIMEMUHI (current_cpu, pc);
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int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
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int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
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int befaft_p = profile_p || trace_p;
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if (befaft_p)
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{
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@cpu@_emit_before (current_cpu, sc, pc, 1);
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++sc;
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sc->argbuf.trace_p = trace_p;
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sc->argbuf.profile_p = profile_p;
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--max_insns;
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}
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idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
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++sc;
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--max_insns;
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++icount;
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if (befaft_p)
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{
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@cpu@_emit_after (current_cpu, sc, pc);
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++sc;
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--max_insns;
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}
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pc += idesc->length;
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if (IDESC_CTI_P (idesc))
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{
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SET_CTI_VPC (sc - 1);
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/* Delay slot? Ignore for zero-instructions (bcc .+2) since
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those are treated as exit insns to avoid runaway sessions
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for invalid programs. */
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if (insn != 0 && CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT))
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{
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UHI insn;
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trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc);
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profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc);
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befaft_p = profile_p || trace_p;
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if (befaft_p)
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{
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@cpu@_emit_before (current_cpu, sc, pc, 1);
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++sc;
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sc->argbuf.trace_p = trace_p;
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sc->argbuf.profile_p = profile_p;
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--max_insns;
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}
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insn = GETIMEMUHI (current_cpu, pc);
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idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P);
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++sc;
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--max_insns;
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++icount;
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if (befaft_p)
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{
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@cpu@_emit_after (current_cpu, sc, pc);
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++sc;
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--max_insns;
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}
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pc += idesc->length;
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}
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break;
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}
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}
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Finish:
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SET_INSN_COUNT (icount);
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}
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EOF
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;;
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xfull-exec-* | xfast-exec-*)
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# Inputs: current_cpu, sc, FAST_P
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# Outputs: vpc
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# vpc contains the address of the next insn to execute
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cat <<EOF
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{
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#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST)
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#define DEFINE_SWITCH
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#include "sem@cpu@-switch.c"
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#else
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vpc = execute (current_cpu, vpc, FAST_P);
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#endif
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}
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EOF
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;;
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*)
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echo "Invalid argument to mainloop.in: $1" >&2
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exit 1
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;;
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esac
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