36e6c1400b
BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest one-instruction addressing for TLS LE model when tls size is smaller 4K. Linker need to make sure there is no TLS offset overflow. 2015-06-01 Jiong Wang <jiong.wang@arm.com> bfd/ * elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12. * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all potential high overflowed bits. ld/testsuite/ * ld-aarch64/tprel_add_lo12_overflow.s: New testcase. * ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file. * ld-aarch64/aarch64-elf.exp: Run new testcase.
23 lines
390 B
ArmAsm
23 lines
390 B
ArmAsm
.cpu generic
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.global ff
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.section .tdata,"awT",%progbits
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.align 2
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.type ff, %object
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# Maximum 12bit - 16byte TCB header is the upper limit
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# for tprel_add_lo12
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.size ff, 4096 - 16
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ff:
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.zero 4096 - 16
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.global i
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.type i, %object
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.size i, 4
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i:
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.zero 4
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.text
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.align 2
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.global main
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.type main, %function
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main:
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add x0, x0, #:tprel_lo12:i
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ret
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.size main, .-main
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