39b41c9ca8
bfd/ * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. (check_use_blx): New function. (bfd_elf32_arm_process_before_allocation): Don't allocate glue if using BLX. (elf32_arm_final_link_relocate): Perform bl<->blx conversion for R_ARM_CALL and R_ARM_THM. (elf32_arm_get_eabi_attr_int): New function. (elf32_arm_size_dynamic_sections): Call check_use_blx. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. gas/ * config/tc-arm.c (do_branch): Generate EABI branch relocations. (do_bl): New function. (do_blx): Generate BFD_RELOC_ARM_PCREL_CALL relocation. (do_t_blx): Generate BFD_RELOC_THUMB_PCREL_BRANCH23. (insns): Use do_bl. (md_pcrel_from_section): Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. (md_apply_fix): Merge BFD_RELOC_ARM_PCREL_BRANCH and BFD_RELOC_ARM_PCREL_BLX cases. Handle BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. (tc_gen_reloc): Handle BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP. gas/testsuite/ * gas/arm/pic.d: Allow R_ARM_CALL relocations. include/elf/ * arm.h (elf32_arm_get_eabi_attr_int): Add prototype. ld/testsuite/ * ld-arm/arm-call.d: New test. * ld-arm/arm-call1.s: New file. * ld-arm/arm-call1.s: New file. * ld-arm/arm-elf.exp: Add arm-call and mixed-app-v5. * ld-arm/arm.ld: Add .glue_7 and .ARM.attribues. * ld-arm/mixed-app-v5.d: New file. * ld-arm/mixed-app.r: Tweak expected output.
56 lines
1.5 KiB
Makefile
56 lines
1.5 KiB
Makefile
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tmpdir/mixed-app-v5: file format elf32-(little|big)arm
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architecture: arm, flags 0x00000112:
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EXEC_P, HAS_SYMS, D_PAGED
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start address 0x.*
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Disassembly of section .plt:
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.* <.plt>:
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.*: e52de004 str lr, \[sp, #-4\]!
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x20>
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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Disassembly of section .text:
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.* <_start>:
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
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.*: eb000004 bl .* <app_func>
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.*: e89d6800 ldmia sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e1a00000 nop \(mov r0,r0\)
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.*: e1a00000 nop \(mov r0,r0\)
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.*: e1a00000 nop \(mov r0,r0\)
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.* <app_func>:
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
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.*: ebfffff. bl .*
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.*: e89d6800 ldmia sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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.*: e1a00000 nop \(mov r0,r0\)
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.*: e1a00000 nop \(mov r0,r0\)
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.*: e1a00000 nop \(mov r0,r0\)
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.* <app_func2>:
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.*: e12fff1e bx lr
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.*: e1a00000 nop \(mov r0,r0\)
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.*: e1a00000 nop \(mov r0,r0\)
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.*: e1a00000 nop \(mov r0,r0\)
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.* <app_tfunc>:
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.*: b500 push {lr}
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.*: f7ff efc. blx .* <_start-0x..>
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.*: bd00 pop {pc}
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.*: 4770 bx lr
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.*: 46c0 nop \(mov r8, r8\)
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.*: 46c0 nop \(mov r8, r8\)
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.*: 46c0 nop \(mov r8, r8\)
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