d747e0af3d
* All GDB files that #include defs.h: Removed stdio.h. (defs.h): #include stdio.h. This has been tested by building GDBs for all targets hosted on Sun4. None of the build problems were related to stdio.h inclusion. (n.b. many configurations don't build for other reasons.)
311 lines
7.7 KiB
C
311 lines
7.7 KiB
C
/* Print Convex instructions for GDB, the GNU debugger.
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Copyright 1989, 1991 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "symtab.h"
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/* reg (fmt_field, inst_field) --
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the {first,second,third} operand of instruction as fmt_field = [ijk]
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gets the value of the field from the [ijk] position of the instruction */
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#define reg(a,b) ((char (*)[3])(op[fmt->a]))[inst.f0.b]
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/* lit (fmt_field) -- field [ijk] is a literal (PSW, VL, eg) */
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#define lit(i) op[fmt->i]
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/* aj[j] -- name for A register j */
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#define aj ((char (*)[3])(op[A]))
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union inst {
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struct {
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unsigned : 7;
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unsigned i : 3;
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unsigned j : 3;
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unsigned k : 3;
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unsigned : 16;
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unsigned : 32;
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} f0;
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struct {
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unsigned : 8;
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unsigned indir : 1;
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unsigned len : 1;
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unsigned j : 3;
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unsigned k : 3;
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unsigned : 16;
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unsigned : 32;
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} f1;
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unsigned char byte[8];
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unsigned short half[4];
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char signed_byte[8];
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short signed_half[4];
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};
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struct opform {
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int mask; /* opcode mask */
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int shift; /* opcode align */
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struct formstr *formstr[3]; /* ST, E0, E1 */
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};
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struct formstr {
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unsigned lop:8, rop:5; /* opcode */
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unsigned fmt:5; /* inst format */
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unsigned i:5, j:5, k:2; /* operand formats */
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};
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#include "convx-opcode.h"
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unsigned char formdecode [] = {
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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4,4,4,4,4,4,4,4,5,5,5,5,6,6,7,8,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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};
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struct opform opdecode[] = {
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0x7e00, 9, format0, e0_format0, e1_format0,
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0x3f00, 8, format1, e0_format1, e1_format1,
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0x1fc0, 6, format2, e0_format2, e1_format2,
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0x0fc0, 6, format3, e0_format3, e1_format3,
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0x0700, 8, format4, e0_format4, e1_format4,
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0x03c0, 6, format5, e0_format5, e1_format5,
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0x01f8, 3, format6, e0_format6, e1_format6,
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0x00f8, 3, format7, e0_format7, e1_format7,
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0x0000, 0, formatx, formatx, formatx,
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0x0f80, 7, formatx, formatx, formatx,
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0x0f80, 7, formatx, formatx, formatx,
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};
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/* Print the instruction at address MEMADDR in debugged memory,
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on STREAM. Returns length of the instruction, in bytes. */
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int
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print_insn (memaddr, stream)
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CORE_ADDR memaddr;
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FILE *stream;
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{
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union inst inst;
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struct formstr *fmt;
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register int format, op1, pfx;
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int l;
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read_memory (memaddr, &inst, sizeof inst);
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/* Remove and note prefix, if present */
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pfx = inst.half[0];
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if ((pfx & 0xfff0) == 0x7ef0)
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{
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pfx = ((pfx >> 3) & 1) + 1;
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*(long long *) &inst = *(long long *) &inst.half[1];
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}
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else pfx = 0;
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/* Split opcode into format.op1 and look up in appropriate table */
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format = formdecode[inst.byte[0]];
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op1 = (inst.half[0] & opdecode[format].mask) >> opdecode[format].shift;
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if (format == 9)
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{
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if (pfx)
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fmt = formatx;
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else if (inst.f1.j == 0)
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fmt = &format1a[op1];
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else if (inst.f1.j == 1)
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fmt = &format1b[op1];
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else
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fmt = formatx;
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}
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else
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fmt = &opdecode[format].formstr[pfx][op1];
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/* Print it */
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if (fmt->fmt == xxx)
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{
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/* noninstruction */
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fprintf (stream, "0x%04x", pfx ? pfx : inst.half[0]);
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return 2;
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}
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if (pfx)
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pfx = 2;
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fprintf (stream, "%s%s%s", lop[fmt->lop], rop[fmt->rop],
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&" "[strlen(lop[fmt->lop]) + strlen(rop[fmt->rop])]);
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switch (fmt->fmt)
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{
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case rrr: /* three register */
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fprintf (stream, "%s,%s,%s", reg(i,i), reg(j,j), reg(k,k));
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return pfx + 2;
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case rr: /* two register */
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fprintf (stream, "%s,%s", reg(i,j), reg(j,k));
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return pfx + 2;
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case rxr: /* two register, reversed i and j fields */
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fprintf (stream, "%s,%s", reg(i,k), reg(j,j));
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return pfx + 2;
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case r: /* one register */
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fprintf (stream, "%s", reg(i,k));
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return pfx + 2;
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case nops: /* no operands */
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return pfx + 2;
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case nr: /* short immediate, one register */
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fprintf (stream, "#%d,%s", inst.f0.j, reg(i,k));
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return pfx + 2;
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case pcrel: /* pc relative */
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print_address (memaddr + 2 * inst.signed_byte[1], stream);
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return pfx + 2;
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case lr: /* literal, one register */
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fprintf (stream, "%s,%s", lit(i), reg(j,k));
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return pfx + 2;
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case rxl: /* one register, literal */
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fprintf (stream, "%s,%s", reg(i,k), lit(j));
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return pfx + 2;
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case rlr: /* register, literal, register */
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fprintf (stream, "%s,%s,%s", reg(i,j), lit(j), reg(k,k));
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return pfx + 2;
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case rrl: /* register, register, literal */
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fprintf (stream, "%s,%s,%s", reg(i,j), reg(j,k), lit(k));
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return pfx + 2;
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case iml: /* immediate, literal */
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if (inst.f1.len)
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{
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fprintf (stream, "#%#x,%s",
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(inst.signed_half[1] << 16) + inst.half[2], lit(i));
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return pfx + 6;
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}
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else
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{
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fprintf (stream, "#%d,%s", inst.signed_half[1], lit(i));
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return pfx + 4;
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}
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case imr: /* immediate, register */
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if (inst.f1.len)
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{
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fprintf (stream, "#%#x,%s",
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(inst.signed_half[1] << 16) + inst.half[2], reg(i,k));
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return pfx + 6;
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}
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else
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{
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fprintf (stream, "#%d,%s", inst.signed_half[1], reg(i,k));
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return pfx + 4;
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}
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case a1r: /* memory, register */
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l = print_effa (inst, stream);
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fprintf (stream, ",%s", reg(i,k));
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return pfx + l;
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case a1l: /* memory, literal */
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l = print_effa (inst, stream);
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fprintf (stream, ",%s", lit(i));
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return pfx + l;
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case a2r: /* register, memory */
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fprintf (stream, "%s,", reg(i,k));
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return pfx + print_effa (inst, stream);
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case a2l: /* literal, memory */
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fprintf (stream, "%s,", lit(i));
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return pfx + print_effa (inst, stream);
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case a3: /* memory */
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return pfx + print_effa (inst, stream);
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case a4: /* system call */
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l = 29; goto a4a5;
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case a5: /* trap */
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l = 27;
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a4a5:
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if (inst.f1.len)
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{
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unsigned int m = (inst.signed_half[1] << 16) + inst.half[2];
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fprintf (stream, "#%d,#%d", m >> l, m & (-1 >> (32-l)));
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return pfx + 6;
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}
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else
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{
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unsigned int m = inst.signed_half[1];
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fprintf (stream, "#%d,#%d", m >> l, m & (-1 >> (32-l)));
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return pfx + 4;
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}
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}
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}
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/* print effective address @nnn(aj), return instruction length */
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int print_effa (inst, stream)
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union inst inst;
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FILE *stream;
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{
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int n, l;
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if (inst.f1.len)
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{
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n = (inst.signed_half[1] << 16) + inst.half[2];
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l = 6;
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}
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else
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{
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n = inst.signed_half[1];
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l = 4;
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}
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if (inst.f1.indir)
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printf ("@");
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if (!inst.f1.j)
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{
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print_address (n, stream);
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return l;
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}
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fprintf (stream, (n & 0xf0000000) == 0x80000000 ? "%#x(%s)" : "%d(%s)",
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n, aj[inst.f1.j]);
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return l;
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}
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