old-cross-binutils/ld/testsuite/ld-aarch64/tls-relax-large-gd-le.d
Renlin Li ac73473248 [BFD][AARCH64]Add TLSGD relaxation support under large memory model.
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
	Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
	(aarch64_tls_transition_without_check): Likewise
	(elfNN_aarch64_tls_relax): Likwise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: run new test
	* ld-aarch64/tls-relax-large-gd-ie.d: New.
	* ld-aarch64/tls-relax-large-gd-ie.s: New.
	* ld-aarch64/tls-relax-large-gd-le.d: New.
	* ld-aarch64/tls-relax-large-gd-le.s: New.
2015-10-02 17:56:09 +01:00

16 lines
520 B
Makefile

#source: tls-relax-large-gd-le.s
#ld: -T relocs.ld -e0
#objdump: -dr
#...
0000000000010000 <test>:
+10000: 58000121 ldr x1, 10024 <test\+0x24>
+10004: 10000102 adr x2, 10024 <test\+0x24>
+10008: 8b010041 add x1, x2, x1
+1000c: d2c00000 movz x0, #0x0, lsl #32
+10010: f2a00000 movk x0, #0x0, lsl #16
+10014: f2800200 movk x0, #0x10
+10018: d53bd041 mrs x1, tpidr_el0
+1001c: 8b000020 add x0, x1, x0
+10020: b9400000 ldr w0, \[x0\]
+10024: 0000ffdc .word 0x0000ffdc
+10028: 00000000 .word 0x00000000