1304f099bc
* inferior.h (register_valid): Declare.
* remote-udi.c, rs6000-xdep.c, sparc-xdep.c, tm-rs6000.h: Remove decl.
* objfiles.h (ALL_OBJFILE_{SYMTABS,PSYMTABS,MSYMBOLS}): Add
macros for traversing the data structures in a single objfile.
* tm-m88k.h, tm-sparc.h (REGISTER_NAMES): Remove extra semicolon.
* tm-i960.h (REGISTER_NAMES): Cosmetic change.
* infcmd.c: Lint.
536 lines
14 KiB
C
536 lines
14 KiB
C
/* IBM RS/6000 host-dependent code for GDB, the GNU debugger.
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Copyright (C) 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "defs.h"
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#include "frame.h"
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#include "inferior.h"
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#include "symtab.h"
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#include "target.h"
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#include <sys/param.h>
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#include <sys/dir.h>
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#include <sys/user.h>
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#include <signal.h>
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#include <sys/ioctl.h>
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#include <fcntl.h>
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#include <sys/ptrace.h>
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#include <sys/reg.h>
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#include <a.out.h>
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#include <sys/file.h>
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#include <sys/stat.h>
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#include <sys/core.h>
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#include <sys/ldr.h>
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#include <sys/utsname.h>
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extern int errno;
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extern int attach_flag;
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/* Conversion from gdb-to-system special purpose register numbers.. */
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static int special_regs[] = {
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IAR, /* PC_REGNUM */
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MSR, /* PS_REGNUM */
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CR, /* CR_REGNUM */
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LR, /* LR_REGNUM */
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CTR, /* CTR_REGNUM */
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XER, /* XER_REGNUM */
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MQ /* MQ_REGNUM */
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};
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/* Nonzero if we just simulated a single step break. */
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extern int one_stepped;
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extern struct obstack frame_cache_obstack;
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void
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fetch_inferior_registers (regno)
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int regno;
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{
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int ii;
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extern char registers[];
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if (regno < 0) { /* for all registers */
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/* read 32 general purpose registers. */
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for (ii=0; ii < 32; ++ii)
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*(int*)®isters[REGISTER_BYTE (ii)] =
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ptrace (PT_READ_GPR, inferior_pid, ii, 0, 0);
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/* read general purpose floating point registers. */
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for (ii=0; ii < 32; ++ii)
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ptrace (PT_READ_FPR, inferior_pid,
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(int*)®isters [REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
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/* read special registers. */
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for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii)
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*(int*)®isters[REGISTER_BYTE (FIRST_SP_REGNUM+ii)] =
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ptrace (PT_READ_GPR, inferior_pid, special_regs[ii], 0, 0);
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registers_fetched ();
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return;
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}
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/* else an individual register is addressed. */
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else if (regno < FP0_REGNUM) { /* a GPR */
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*(int*)®isters[REGISTER_BYTE (regno)] =
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ptrace (PT_READ_GPR, inferior_pid, regno, 0, 0);
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}
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else if (regno <= FPLAST_REGNUM) { /* a FPR */
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ptrace (PT_READ_FPR, inferior_pid,
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(int*)®isters [REGISTER_BYTE (regno)], (regno-FP0_REGNUM+FPR0), 0);
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}
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else if (regno <= LAST_SP_REGNUM) { /* a special register */
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*(int*)®isters[REGISTER_BYTE (regno)] =
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ptrace (PT_READ_GPR, inferior_pid,
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special_regs[regno-FIRST_SP_REGNUM], 0, 0);
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}
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else
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fprintf (stderr, "gdb error: register no %d not implemented.\n", regno);
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register_valid [regno] = 1;
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}
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/* Store our register values back into the inferior.
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If REGNO is -1, do this for all registers.
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Otherwise, REGNO specifies which register (so we can save time). */
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void
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store_inferior_registers (regno)
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int regno;
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{
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extern char registers[];
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errno = 0;
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if (regno == -1) { /* for all registers.. */
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int ii;
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/* execute one dummy instruction (which is a breakpoint) in inferior
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process. So give kernel a chance to do internal house keeping.
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Otherwise the following ptrace(2) calls will mess up user stack
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since kernel will get confused about the bottom of the stack (%sp) */
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exec_one_dummy_insn ();
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/* write general purpose registers first! */
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for ( ii=GPR0; ii<=GPR31; ++ii) {
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ptrace (PT_WRITE_GPR, inferior_pid, ii,
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*(int*)®isters[REGISTER_BYTE (ii)], 0);
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if ( errno ) {
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perror ("ptrace write_gpr"); errno = 0;
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}
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}
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/* write floating point registers now. */
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for ( ii=0; ii < 32; ++ii) {
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ptrace (PT_WRITE_FPR, inferior_pid,
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(int*)®isters[REGISTER_BYTE (FP0_REGNUM+ii)], FPR0+ii, 0);
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if ( errno ) {
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perror ("ptrace write_fpr"); errno = 0;
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}
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}
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/* write special registers. */
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for (ii=0; ii <= LAST_SP_REGNUM-FIRST_SP_REGNUM; ++ii) {
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ptrace (PT_WRITE_GPR, inferior_pid, special_regs[ii],
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*(int*)®isters[REGISTER_BYTE (FIRST_SP_REGNUM+ii)], 0);
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if ( errno ) {
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perror ("ptrace write_gpr"); errno = 0;
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}
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}
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}
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/* else, a specific register number is given... */
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else if (regno < FP0_REGNUM) { /* a GPR */
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ptrace (PT_WRITE_GPR, inferior_pid, regno,
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*(int*)®isters[REGISTER_BYTE (regno)], 0);
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}
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else if (regno <= FPLAST_REGNUM) { /* a FPR */
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ptrace (PT_WRITE_FPR, inferior_pid,
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(int*)®isters[REGISTER_BYTE (regno)], regno-FP0_REGNUM+FPR0, 0);
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}
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else if (regno <= LAST_SP_REGNUM) { /* a special register */
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ptrace (PT_WRITE_GPR, inferior_pid, special_regs [regno-FIRST_SP_REGNUM],
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*(int*)®isters[REGISTER_BYTE (regno)], 0);
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}
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else
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fprintf (stderr, "Gdb error: register no %d not implemented.\n", regno);
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if ( errno ) {
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perror ("ptrace write"); errno = 0;
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}
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}
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void
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fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
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char *core_reg_sect;
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unsigned core_reg_size;
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int which;
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unsigned int reg_addr; /* Unused in this version */
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{
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/* fetch GPRs and special registers from the first register section
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in core bfd. */
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if (which == 0) {
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/* copy GPRs first. */
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bcopy (core_reg_sect, registers, 32 * 4);
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/* gdb's internal register template and bfd's register section layout
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should share a common include file. FIXMEmgo */
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/* then comes special registes. They are supposed to be in the same
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order in gdb template and bfd `.reg' section. */
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core_reg_sect += (32 * 4);
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bcopy (core_reg_sect, ®isters [REGISTER_BYTE (FIRST_SP_REGNUM)],
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(LAST_SP_REGNUM - FIRST_SP_REGNUM + 1) * 4);
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}
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/* fetch floating point registers from register section 2 in core bfd. */
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else if (which == 2)
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bcopy (core_reg_sect, ®isters [REGISTER_BYTE (FP0_REGNUM)], 32 * 8);
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else
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fprintf (stderr, "Gdb error: unknown parameter to fetch_core_registers().\n");
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}
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frameless_function_invocation (fi)
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struct frame_info *fi;
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{
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CORE_ADDR func_start;
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struct aix_framedata fdata;
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func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
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/* If we failed to find the start of the function, it is a mistake
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to inspect the instructions. */
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if (!func_start)
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return 0;
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function_frame_info (func_start, &fdata);
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return fdata.frameless;
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}
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/* If saved registers of frame FI are not known yet, read and cache them.
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&FDATAP contains aix_framedata; TDATAP can be NULL,
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in which case the framedata are read.
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*/
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static void
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frame_get_cache_fsr (fi, fdatap)
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struct frame_info *fi;
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struct aix_framedata *fdatap;
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{
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int ii;
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CORE_ADDR frame_addr;
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struct aix_framedata work_fdata;
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if (fi->cache_fsr)
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return;
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if (fdatap == NULL) {
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fdatap = &work_fdata;
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function_frame_info (get_pc_function_start (fi->pc), fdatap);
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}
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fi->cache_fsr = (struct frame_saved_regs *)
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obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
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bzero (fi->cache_fsr, sizeof (struct frame_saved_regs));
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if (fi->prev && fi->prev->frame)
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frame_addr = fi->prev->frame;
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else
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frame_addr = read_memory_integer (fi->frame, 4);
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/* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
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All fpr's from saved_fpr to fp31 are saved right underneath caller
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stack pointer, starting from fp31 first. */
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if (fdatap->saved_fpr >= 0) {
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for (ii=31; ii >= fdatap->saved_fpr; --ii)
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fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
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frame_addr -= (32 - fdatap->saved_fpr) * 8;
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}
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/* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
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All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
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starting from r31 first. */
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if (fdatap->saved_gpr >= 0)
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for (ii=31; ii >= fdatap->saved_gpr; --ii)
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fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
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}
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/* Return the address of a frame. This is the inital %sp value when the frame
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was first allocated. For functions calling alloca(), it might be saved in
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an alloca register. */
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CORE_ADDR
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frame_initial_stack_address (fi)
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struct frame_info *fi;
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{
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CORE_ADDR tmpaddr;
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struct aix_framedata fdata;
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struct frame_info *callee_fi;
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/* if the initial stack pointer (frame address) of this frame is known,
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just return it. */
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if (fi->initial_sp)
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return fi->initial_sp;
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/* find out if this function is using an alloca register.. */
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function_frame_info (get_pc_function_start (fi->pc), &fdata);
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/* if saved registers of this frame are not known yet, read and cache them. */
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if (!fi->cache_fsr)
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frame_get_cache_fsr (fi, &fdata);
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/* If no alloca register used, then fi->frame is the value of the %sp for
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this frame, and it is good enough. */
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if (fdata.alloca_reg < 0) {
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fi->initial_sp = fi->frame;
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return fi->initial_sp;
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}
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/* This function has an alloca register. If this is the top-most frame
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(with the lowest address), the value in alloca register is good. */
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if (!fi->next)
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return fi->initial_sp = read_register (fdata.alloca_reg);
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/* Otherwise, this is a caller frame. Callee has usually already saved
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registers, but there are exceptions (such as when the callee
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has no parameters). Find the address in which caller's alloca
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register is saved. */
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for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
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if (!callee_fi->cache_fsr)
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frame_get_cache_fsr (fi, NULL);
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/* this is the address in which alloca register is saved. */
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tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
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if (tmpaddr) {
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fi->initial_sp = read_memory_integer (tmpaddr, 4);
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return fi->initial_sp;
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}
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/* Go look into deeper levels of the frame chain to see if any one of
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the callees has saved alloca register. */
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}
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/* If alloca register was not saved, by the callee (or any of its callees)
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then the value in the register is still good. */
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return fi->initial_sp = read_register (fdata.alloca_reg);
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}
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/* aixcoff_relocate_symtab - hook for symbol table relocation.
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also reads shared libraries.. */
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aixcoff_relocate_symtab (pid)
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unsigned int pid;
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{
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#define MAX_LOAD_SEGS 64 /* maximum number of load segments */
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struct ld_info *ldi;
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int temp;
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ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi));
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/* According to my humble theory, aixcoff has some timing problems and
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when the user stack grows, kernel doesn't update stack info in time
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and ptrace calls step on user stack. That is why we sleep here a little,
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and give kernel to update its internals. */
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usleep (36000);
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errno = 0;
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ptrace(PT_LDINFO, pid, ldi, MAX_LOAD_SEGS * sizeof(*ldi), ldi);
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if (errno) {
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perror_with_name ("ptrace ldinfo");
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return 0;
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}
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vmap_ldinfo(ldi);
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do {
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add_text_to_loadinfo (ldi->ldinfo_textorg, ldi->ldinfo_dataorg);
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} while (ldi->ldinfo_next
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&& (ldi = (void *) (ldi->ldinfo_next + (char *) ldi)));
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#if 0
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/* Now that we've jumbled things around, re-sort them. */
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sort_minimal_symbols ();
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#endif
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/* relocate the exec and core sections as well. */
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vmap_exec ();
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}
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/* Keep an array of load segment information and their TOC table addresses.
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This info will be useful when calling a shared library function by hand. */
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typedef struct {
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unsigned long textorg, dataorg, toc_offset;
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} LoadInfo;
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#define LOADINFOLEN 10
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static LoadInfo *loadInfo = NULL;
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static int loadInfoLen = 0;
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static int loadInfoTocIndex = 0;
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int aix_loadInfoTextIndex = 0;
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xcoff_init_loadinfo ()
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{
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loadInfoTocIndex = 0;
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aix_loadInfoTextIndex = 0;
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if (loadInfoLen == 0) {
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loadInfo = (void*) xmalloc (sizeof (LoadInfo) * LOADINFOLEN);
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loadInfoLen = LOADINFOLEN;
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}
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}
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free_loadinfo ()
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{
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if (loadInfo)
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free (loadInfo);
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loadInfo = NULL;
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loadInfoLen = 0;
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loadInfoTocIndex = 0;
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aix_loadInfoTextIndex = 0;
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}
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xcoff_add_toc_to_loadinfo (unsigned long tocaddr)
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{
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while (loadInfoTocIndex >= loadInfoLen) {
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loadInfoLen += LOADINFOLEN;
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loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
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}
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loadInfo [loadInfoTocIndex++].toc_offset = tocaddr;
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}
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add_text_to_loadinfo (unsigned long textaddr, unsigned long dataaddr)
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{
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while (aix_loadInfoTextIndex >= loadInfoLen) {
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loadInfoLen += LOADINFOLEN;
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loadInfo = (void*) xrealloc (loadInfo, sizeof(LoadInfo) * loadInfoLen);
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}
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loadInfo [aix_loadInfoTextIndex].textorg = textaddr;
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loadInfo [aix_loadInfoTextIndex].dataorg = dataaddr;
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++aix_loadInfoTextIndex;
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}
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unsigned long
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find_toc_address (unsigned long pc)
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{
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int ii, toc_entry, tocbase = 0;
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for (ii=0; ii < aix_loadInfoTextIndex; ++ii)
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if (pc > loadInfo [ii].textorg && loadInfo [ii].textorg > tocbase) {
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toc_entry = ii;
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tocbase = loadInfo [ii].textorg;
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}
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return loadInfo [toc_entry].dataorg + loadInfo [toc_entry].toc_offset;
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}
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/* execute one dummy breakpoint instruction. This way we give kernel
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a chance to do some housekeeping and update inferior's internal data,
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including u_area. */
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exec_one_dummy_insn ()
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{
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#define DUMMY_INSN_ADDR (TEXT_SEGMENT_BASE)+0x200
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unsigned long shadow;
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unsigned int status, pid;
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/* We plant one dummy breakpoint into DUMMY_INSN_ADDR address. We assume that
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this address will never be executed again by the real code. */
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target_insert_breakpoint (DUMMY_INSN_ADDR, &shadow);
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errno = 0;
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ptrace (PT_CONTINUE, inferior_pid, DUMMY_INSN_ADDR, 0, 0);
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if (errno)
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perror ("pt_continue");
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do {
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pid = wait (&status);
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} while (pid != inferior_pid);
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target_remove_breakpoint (DUMMY_INSN_ADDR, &shadow);
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}
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#if 0
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*** not needed anymore ***
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/* Return the number of initial trap signals we need to ignore once the inferior
|
||
process starts running. This will be `2' for aix-3.1, `3' for aix-3.2 */
|
||
|
||
int
|
||
aix_starting_inferior_traps ()
|
||
{
|
||
struct utsname unamebuf;
|
||
|
||
if (uname (&unamebuf) == -1)
|
||
fatal ("uname(3) failed.");
|
||
|
||
/* Assume the future versions will behave like 3.2 and return '3' for
|
||
anything other than 3.1x. The extra trap in 3.2 is the "trap after the
|
||
program is loaded" signal. */
|
||
|
||
if (unamebuf.version[0] == '3' && unamebuf.release[0] == '1')
|
||
return 2;
|
||
else
|
||
return 3;
|
||
}
|
||
#endif
|