The linker tries to put the end of the last section in the relro
segment exactly on a page boundary, because the relro segment itself
must end on a page boundary. If for any reason this can't be done,
padding is inserted. Since the end of the relro segment is typically
between .got and .got.plt, padding effectively increases the size of
the GOT. This isn't nice for targets and code models with limited GOT
addressing.
The problem with the current code is that it doesn't cope very well
with aligned sections in the relro segment. When making .got aligned
to a 256 byte boundary for PowerPC64, I found that often the initial
alignment attempt failed and the fallback attempt to be less than
adequate. This is a particular problem for PowerPC64 since the
distance between .got and .plt affects the size of plt call stubs,
leading to "stubs don't match calculated size" errors.
So this rewrite takes a direct approach to calculating a new relro
base. Starting from the last section in the segment, we calculate
where it must start to position its end on the boundary, or as near as
possible considering alignment requirements. The new start then
becomes the goal for the previous section to end, and so on for all
sections. This of course ignores the possibility that user scripts
will place . = ALIGN(xxx); in the relro segment, or provide section
address expressions. In those cases we might fail, but the old code
probably did too, and a fallback is provided.
ld/
* ldexp.h (struct ldexp_control): Delete dataseg.min_base. Add
data_seg.relro_offset.
* ldexp.c (fold_binary <DATA_SEGMENT_ALIGN>): Don't set min_base.
(fold_binary <DATA_SEGMENT_RELRO_END>): Do set relro_offset.
* ldlang.c (lang_size_sections): Rewrite code adjusting relro
segment base to line up last section on page boundary.
ld/testsuite/
* ld-x86-64/pr18176.d: Update.
0e5fabeb2c