cd4a7468c9
* elf32-spu.c (struct spu_link_hash_table): Add init, line_size_log2,
num_lines_log2.
(struct got_entry): Add br_addr.
(struct call_info): Add priority.
(struct function_info): Add lr_store and sp_adjust.
(spu_elf_setup): Init line_size_log2 and num_lines_log2.
(spu_elf_find_overlays): For soft-icache, mark any section within cache
area as an overlay, and check that no other overlays exist. Look up
icache overlay manager entry sym.
(BRA_STUBS, BRA, BRASL): Define.
(enum _stub_type): Replace ovl_stub with call_ovl_stub and br*_ovl_stub.
(needs_ovl_stub): Adjust for soft-icache. Return priority encoded
in branch insn.
(count_stub, build_stub): Support soft-icache.
(build_spuear_stubs, process_stubs): Adjust build_stub call.
(spu_elf_size_stubs): Size soft-icache stubs.
(overlay_index): New function.
(spu_elf_build_stubs): Make static. Support soft-icache.
(spu_elf_check_vma): Don't turn off auto_overlay if soft-icache.
(find_function_stack_adjust): Save lr store and stack adjust insn
offsets.
(maybe_insert_function): Adjust find_function_stack_adjust call.
(mark_functions_via_relocs): Retrieve priority.
(remove_cycles): Only warn about pruned arcs when stack_analysis.
(sort_calls): Sort by priority first.
(mark_overlay_section): Ignore .ovl.init.
(sum_stack): Only print when stack_analysis.
(print_one_overlay_section): New function, extracted from..
(spu_elf_auto_overlay): ..here. Support soft-icache overlays.
(spu_elf_stack_analysis): Only print when htab->stack_analysis.
(spu_elf_final_link): Call spu_elf_stack_analysis for lrlive
analysis. Call spu_elf_build_stubs.
(spu_elf_relocate_section): For soft-icache encode overlay index
into addresses.
(spu_elf_output_symbol_hook): Support soft-icache.
(spu_elf_modify_program_headers: Likewise.
* elf32-spu.h (struct spu_elf_params): Add lrlive_analysis. Rename
num_regions to num_lines. Add line_size and max_branch.
(enum _ovly_flavour): Add ovly_soft_icache.
(spu_elf_build_stubs): Delete.
gas/
* config/tc-spu.c (md_pseudo_table): Add "brinfo".
(brinfo): New var.
(md_assemble): Poke brinfo into branch instructions.
(spu_brinfo): New function.
(md_apply_fix): Don't assume insn fields start off at zero, mask
them to remove possible brinfo.
ld/
* emultempl/spuelf.em (params): Init new fields.
(num_lines_set, line_size_set, icache_mgr, icache_mgr_stream): New vars.
(spu_place_special_section): Adjust placement for soft-icache. Pad
soft-icache section to a fixed size. Clear addr_tree.
(spu_elf_load_ovl_mgr): Support soft-icache. Map overlay manager
sections a little more intelligently.
(gld${EMULATION_NAME}_finish): Don't call spu_elf_build_stubs.
(OPTION_SPU_NUM_LINES): Rename from OPTION_SPU_NUM_REGIONS.
(OPTION_SPU_SOFT_ICACHE, OPTION_SPU_LINE_SIZE): Define.
(OPTION_SPU_LRLIVE): Define.
(PARSE_AND_LIST_LONGOPTS): Add new soft-icache options.
(PARSE_AND_LIST_OPTIONS): Likewise.
(PARSE_AND_LIST_ARGS_CASES): Handle them.
* emultempl/spu_icache.S: Dummy file.
* emultempl/spu_icache.o_c: Regenerate.
* Makefile.am (eelf32_spu.c): Depend on spu_icache.o_c.
(spu_icache.o_c): Add rule to build.
(CLEANFILES): Zap temp files.
(EXTRA_DIST): Add spu_icache.o_c.
* Makefile.in: Regenerate.
ld/testsuite/
* ld-spu/ovl.d: Allow for absolute branches in stubs.
* ld-spu/ovl2.d: Likewise.
182 lines
3.3 KiB
Makefile
182 lines
3.3 KiB
Makefile
#source: ovl.s
|
|
#ld: -N -T ovl1.lnk -T ovl.lnk --emit-relocs
|
|
#objdump: -D -r
|
|
|
|
.*elf32-spu
|
|
|
|
Disassembly of section \.text:
|
|
|
|
00000100 <_start>:
|
|
.* ai \$1,\$1,-32
|
|
.* xor \$0,\$0,\$0
|
|
.* stqd \$0,0\(\$1\)
|
|
.* stqd \$0,16\(\$1\)
|
|
.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
|
|
.*SPU_REL16 f1_a1
|
|
.* brsl \$0,.* <00000000\.ovl_call\.f2_a1>.*
|
|
.*SPU_REL16 f2_a1
|
|
.* brsl \$0,.* <00000000\.ovl_call\.f1_a2>.*
|
|
.*SPU_REL16 f1_a2
|
|
#.* ila \$9,328 # 148
|
|
.* ila \$9,352 # 160
|
|
.*SPU_ADDR18 f2_a2
|
|
.* bisl \$0,\$9
|
|
.* ai \$1,\$1,32 # 20
|
|
.* br 100 <_start> # 100
|
|
.*SPU_REL16 _start
|
|
|
|
0000012c <f0>:
|
|
.* bi \$0
|
|
|
|
#00000130 <00000000\.ovl_call\.f1_a1>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 04 04 00.*
|
|
#
|
|
#00000138 <00000000\.ovl_call\.f2_a1>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 04 04 04.*
|
|
#
|
|
#00000140 <00000000\.ovl_call\.f1_a2>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 08 04 00.*
|
|
#
|
|
#00000148 <00000000\.ovl_call\.f2_a2>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 08 04 24.*
|
|
#
|
|
#00000150 <00000000\.ovl_call\.f4_a1>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 04 04 10.*
|
|
#
|
|
#00000158 <00000000.ovl_call.14:8>:
|
|
#.* bra?sl \$75,.* <__ovly_load>.*
|
|
#.*00 08 04 34.*
|
|
|
|
00000130 <00000000\.ovl_call\.f1_a1>:
|
|
.* ila \$78,1
|
|
.* lnop
|
|
.* ila \$79,1024 # 400
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000140 <00000000\.ovl_call\.f2_a1>:
|
|
.* ila \$78,1
|
|
.* lnop
|
|
.* ila \$79,1028 # 404
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000150 <00000000.ovl_call.f1_a2>:
|
|
.* ila \$78,2
|
|
.* lnop
|
|
.* ila \$79,1024 # 400
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000160 <00000000\.ovl_call\.f2_a2>:
|
|
.* ila \$78,2
|
|
.* lnop
|
|
.* ila \$79,1060 # 424
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000170 <00000000\.ovl_call\.f4_a1>:
|
|
.* ila \$78,1
|
|
.* lnop
|
|
.* ila \$79,1040 # 410
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
00000180 <00000000.ovl_call.14:8>:
|
|
.* ila \$78,2
|
|
.* lnop
|
|
.* ila \$79,1076 # 434
|
|
.* bra? .* <__ovly_load>.*
|
|
|
|
#...
|
|
[0-9a-f]+ <__ovly_return>:
|
|
#...
|
|
[0-9a-f]+ <__ovly_load>:
|
|
#...
|
|
[0-9a-f]+ <_ovly_debug_event>:
|
|
#...
|
|
Disassembly of section \.ov_a1:
|
|
|
|
00000400 <f1_a1>:
|
|
.* br .* <f3_a1>.*
|
|
.*SPU_REL16 f3_a1
|
|
|
|
00000404 <f2_a1>:
|
|
#.* ila \$3,336 # 150
|
|
.* ila \$3,368 # 170
|
|
.*SPU_ADDR18 f4_a1
|
|
.* bi \$0
|
|
|
|
0000040c <f3_a1>:
|
|
.* bi \$0
|
|
|
|
00000410 <f4_a1>:
|
|
.* bi \$0
|
|
\.\.\.
|
|
Disassembly of section \.ov_a2:
|
|
|
|
00000400 <f1_a2>:
|
|
.* stqd \$0,16\(\$1\)
|
|
.* stqd \$1,-32\(\$1\)
|
|
.* ai \$1,\$1,-32
|
|
.* brsl \$0,12c <f0> # 12c
|
|
.*SPU_REL16 f0
|
|
.* brsl \$0,130 <00000000\.ovl_call\.f1_a1> # 130
|
|
.*SPU_REL16 f1_a1
|
|
.* brsl \$0,430 <f3_a2> # 430
|
|
.*SPU_REL16 f3_a2
|
|
.* lqd \$0,48\(\$1\) # 30
|
|
.* ai \$1,\$1,32 # 20
|
|
.* bi \$0
|
|
|
|
00000424 <f2_a2>:
|
|
.* ilhu \$3,0
|
|
.*SPU_ADDR16_HI f4_a2
|
|
#.* iohl \$3,344 # 158
|
|
.* iohl \$3,384 # 180
|
|
.*SPU_ADDR16_LO f4_a2
|
|
.* bi \$0
|
|
|
|
00000430 <f3_a2>:
|
|
.* bi \$0
|
|
|
|
00000434 <f4_a2>:
|
|
.* br .* <f3_a2>.*
|
|
.*SPU_REL16 f3_a2
|
|
\.\.\.
|
|
Disassembly of section .data:
|
|
|
|
00000440 <_ovly_table-0x10>:
|
|
440: 00 00 00 00 .*
|
|
444: 00 00 00 01 .*
|
|
\.\.\.
|
|
00000450 <_ovly_table>:
|
|
450: 00 00 04 00 .*
|
|
454: 00 00 00 20 .*
|
|
# 458: 00 00 03 40 .*
|
|
458: 00 00 03 90 .*
|
|
45c: 00 00 00 01 .*
|
|
460: 00 00 04 00 .*
|
|
464: 00 00 00 40 .*
|
|
# 468: 00 00 03 60 .*
|
|
468: 00 00 03 b0 .*
|
|
46c: 00 00 00 01 .*
|
|
|
|
00000470 <_ovly_buf_table>:
|
|
470: 00 00 00 00 .*
|
|
|
|
Disassembly of section \.toe:
|
|
|
|
00000480 <_EAR_>:
|
|
\.\.\.
|
|
Disassembly of section \.note\.spu_name:
|
|
|
|
.* <\.note\.spu_name>:
|
|
.*: 00 00 00 08 .*
|
|
.*: 00 00 00 0c .*
|
|
.*: 00 00 00 01 .*
|
|
.*: 53 50 55 4e .*
|
|
.*: 41 4d 45 00 .*
|
|
.*: 74 6d 70 64 .*
|
|
.*: 69 72 2f 64 .*
|
|
.*: 75 6d 70 00 .*
|