05535e79e9
* sh-tdep.c (sh_reg_names, sh3_reg_names): Add empty names for float registers. (sh3e_reg_names): New register name array. (sh_processor_type_table): Add sh3e processor type. * config/sh/tm-sh.h (REGISTER_VIRTUAL_TYPE): Fix test. (REGISTER_NAMES, NUM_REGS, NUM_REALREGS, etc): Adjust for full set of registers. * remote-e7000.c (want_sh3, want_sh3_nopc): New globals. (e7000_fetch_registers, e7000_wait): Use them. * sh3-rom.c (sh3_regnames): Add float registers. (sh3e_cmds, sh3e_ops): New globals. (sh3e_open): New function. (_initialize_sh3_rom): Rename from _initialize_sh3, set up sh3e target vector. * gdbwin.c (reg_order) [TARGET_SH]: Update for SH3-E. * initfake.c: Call _initialize_sh3_rom instead of _initialize_sh3.
242 lines
7.4 KiB
C
242 lines
7.4 KiB
C
/* Target-specific definition for a Hitachi Super-H.
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Copyright (C) 1993 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* Contributed by Steve Chamberlain sac@cygnus.com */
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#define GDB_TARGET_IS_SH
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#define IEEE_FLOAT 1
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/* Define the bit, byte, and word ordering of the machine. */
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#define TARGET_BYTE_ORDER_SELECTABLE
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/* Offset from address of function to start of its code.
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Zero on most machines. */
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#define FUNCTION_START_OFFSET 0
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/* Advance PC across any function entry prologue instructions
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to reach some "real" code. */
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extern CORE_ADDR sh_skip_prologue ();
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#define SKIP_PROLOGUE(ip) \
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{(ip) = sh_skip_prologue(ip);}
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/* Immediately after a function call, return the saved pc.
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Can't always go through the frames for this because on some machines
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the new frame is not set up until the new function executes
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some instructions.
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The return address is the value saved in the PR register + 4 */
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#define SAVED_PC_AFTER_CALL(frame) \
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(ADDR_BITS_REMOVE(read_register(PR_REGNUM)))
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/* Stack grows downward. */
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#define INNER_THAN <
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/* Illegal instruction - used by the simulator for breakpoint
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detection */
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#define BREAKPOINT {0xc3, 0xc3} /* 0xc3c3 is trapa #c3, and it works in big
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and little endian modes */
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#define BIG_REMOTE_BREAKPOINT { 0xc3, 0x20 }
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#define LITTLE_REMOTE_BREAKPOINT { 0x20, 0xc3 }
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/* If your kernel resets the pc after the trap happens you may need to
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define this before including this file. */
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#define DECR_PC_AFTER_BREAK 0
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/* Nonzero if instruction at PC is a return instruction. */
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#define ABOUT_TO_RETURN(pc) (read_memory_integer(pc,2) == 0x000b)
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/* Say how long registers are. */
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#define REGISTER_TYPE long
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/* Say how much memory is needed to store a copy of the register set */
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#define REGISTER_BYTES (NUM_REGS*4)
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/* Index within `registers' of the first byte of the space for
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register N. */
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#define REGISTER_BYTE(N) ((N)*4)
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/* Number of bytes of storage in the actual machine representation
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for register N. */
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#define REGISTER_RAW_SIZE(N) 4
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#define REGISTER_VIRTUAL_SIZE(N) 4
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/* Largest value REGISTER_RAW_SIZE can have. */
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#define MAX_REGISTER_RAW_SIZE 4
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/* Largest value REGISTER_VIRTUAL_SIZE can have. */
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#define MAX_REGISTER_VIRTUAL_SIZE 4
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/* Return the GDB type object for the "standard" data type
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of data in register N. */
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#define REGISTER_VIRTUAL_TYPE(N) \
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((((N) >= FP0_REGNUM && (N) <= FP15_REGNUM) \
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|| (N) == FPUL_REGNUM) \
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? builtin_type_float : builtin_type_int)
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/* Initializer for an array of names of registers.
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Entries beyond the first NUM_REGS are ignored. */
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#define REGISTER_NAMES \
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{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
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"r8", "r9", "r10","r11","r12", "r13", "r14","r15",\
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"pc", "pr", "gbr","vbr","mach","macl","sr", \
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"ssr", "spc", \
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0", \
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1", \
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"fpul","fpscr", \
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"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \
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"fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15"\
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}
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#define NUM_REGS 59
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/* Register numbers of various important registers.
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Note that some of these values are "real" register numbers,
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and correspond to the general registers of the machine,
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and some are "phony" register numbers which are too large
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to be actual register numbers as far as the user is concerned
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but do serve to get the desired values when passed to read_register. */
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#define R0_REGNUM 0
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#define FP_REGNUM 14
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#define SP_REGNUM 15
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#define PC_REGNUM 16
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#define PR_REGNUM 17
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#define GBR_REGNUM 18
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#define VBR_REGNUM 19
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#define MACH_REGNUM 20
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#define MACL_REGNUM 21
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#define SR_REGNUM 22
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#define NUM_REALREGS 23
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#define FPUL_REGNUM 41
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#define FP0_REGNUM 43
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#define FP15_REGNUM 58
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#undef NUM_REALREGS
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#define NUM_REALREGS 59
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/* Store the address of the place in which to copy the structure the
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subroutine will return. This is called from call_function.
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We store structs through a pointer passed in R4 */
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#define STORE_STRUCT_RETURN(ADDR, SP) \
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{ write_register (4, (ADDR)); }
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/* Extract from an array REGBUF containing the (raw) register state
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a function return value of type TYPE, and copy that, in virtual format,
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into VALBUF. */
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#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
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memcpy (VALBUF, (char *)(REGBUF), TYPE_LENGTH(TYPE))
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/* Write into appropriate registers a function return value
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of type TYPE, given in virtual format.
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Things always get returned in R4/R5 */
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#define STORE_RETURN_VALUE(TYPE,VALBUF) \
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write_register_bytes (REGISTER_BYTE(4), VALBUF, TYPE_LENGTH (TYPE))
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/* Extract from an array REGBUF containing the (raw) register state
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the address in which a function should return its structure value,
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as a CORE_ADDR (or an expression that can be used as one). */
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#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
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/* Define other aspects of the stack frame.
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we keep a copy of the worked out return pc lying around, since it
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is a useful bit of info */
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#define EXTRA_FRAME_INFO \
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CORE_ADDR return_pc; \
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int leaf_function; \
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int f_offset;
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#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
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init_extra_frame_info(fromleaf, fi)
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/* A macro that tells us whether the function invocation represented
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by FI does not have a frame on the stack associated with it. If it
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does not, FRAMELESS is set to 1, else 0. */
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#define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) \
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(FRAMELESS) = frameless_look_for_prologue(FI)
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#define FRAME_CHAIN(FRAME) sh_frame_chain(FRAME)
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#define FRAME_SAVED_PC(FRAME) ((FRAME)->return_pc)
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#define FRAME_ARGS_ADDRESS(fi) (fi)->frame
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#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
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/* Set VAL to the number of args passed to frame described by FI.
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Can set VAL to -1, meaning no way to tell. */
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/* We can't tell how many args there are */
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#define FRAME_NUM_ARGS(val,fi) (val = -1)
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/* Return number of bytes at start of arglist that are not really args. */
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#define FRAME_ARGS_SKIP 0
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/* Put here the code to store, into a struct frame_saved_regs,
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the addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special:
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the address we return for it IS the sp for the next frame. */
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#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
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frame_find_saved_regs(frame_info, &(frame_saved_regs))
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#define NAMES_HAVE_UNDERSCORE
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typedef unsigned short INSN_WORD;
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#define ADDR_BITS_REMOVE(addr) ((addr))
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#define CALL_DUMMY_LENGTH 10
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/* Discard from the stack the innermost frame,
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restoring all saved registers. */
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#define POP_FRAME pop_frame();
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#define NOP {0x20, 0x0b}
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#define REGISTER_SIZE 4
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