# Makefile template for Configure for the m32r simulator
# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
# Contributed by Cygnus Support.
#
# This file is part of GDB, the GNU debugger.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.

## COMMON_PRE_CONFIG_FRAG

M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
# start-sanitize-m32rx
M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o
# end-sanitize-m32rx

CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =

SIM_OBJS = \
	$(SIM_NEW_COMMON_OBJS) \
	sim-cpu.o \
	sim-engine.o \
	sim-hload.o \
	sim-hrw.o \
	sim-model.o \
	sim-reason.o \
	cgen-utils.o cgen-trace.o cgen-scache.o \
	sim-if.o arch.o \
	$(M32R_OBJS) \
	$(start-sanitize-m32rx) \
	$(M32RX_OBJS) \
	$(end-sanitize-m32rx) \
	traps.o devices.o \
	$(CONFIG_DEVICES)

# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
	$(srcdir)/../common/cgen-types.h \
	$(srcdir)/../common/cgen-sim.h \
	$(srcdir)/../common/cgen-trace.h \
	arch.h cpuall.h m32r-sim.h cpu-opc.h

SIM_EXTRA_CFLAGS =

SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = m32r-clean

# This selects the m32r newlib/libgloss syscall definitions.
NL_TARGET = -DNL_TARGET_m32r

## COMMON_POST_CONFIG_FRAG

arch = m32r

MAIN_INCLUDE_DEPS = \
	sim-main.h \
	$(srcdir)/../common/sim-config.h \
	$(srcdir)/../common/sim-base.h \
	$(srcdir)/../common/sim-basics.h \
	$(srcdir)/../common/sim-module.h \
	$(srcdir)/../common/sim-trace.h \
	$(srcdir)/../common/sim-profile.h \
	tconfig.h
INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h \
	$(srcdir)/../../include/opcode/cgen.h
OPS_INCLUDE_DEPS = \
	$(srcdir)/../common/cgen-mem.h \
	$(srcdir)/../common/cgen-ops.h

sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h

arch.o: arch.c $(INCLUDE_DEPS)

devices.o: devices.c $(INCLUDE_DEPS)

# M32R objs

m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h

# FIXME: Use of `mono' is wip.
mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
	rm -f mloop.c
	$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
		-mono -scache -fast m32r $(srcdir)/mloop.in \
		| sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c
mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h

cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
	$(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P
sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
	$(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P
model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h

#sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
#	$(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS)

# start-sanitize-m32rx
# M32RX objs

m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h

# FIXME: Use of `mono' is wip.
mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
	rm -f mloopx.c
	$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
		-mono -no-scache -no-fast -parallel \
		m32r $(srcdir)/mloopx.in \
		| sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c
mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h

cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
# end-sanitize-m32rx

m32r-clean:
	rm -f mloop.c stamp-arch stamp-cpu stamp-decode
# start-sanitize-m32rx
	rm -f mloopx.c stamp-xcpu stamp-xdecode
# end-sanitize-m32rx
	rm -f tmp-*

# start-sanitize-cygnus
# cgen support, enable with --enable-cgen-maint
CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =

stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu
	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS)
	touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
	@true

stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
	$(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
	  cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
	touch stamp-cpu
cpu.h extract.c sem.c sem-switch.c model.c: $(CGEN_MAINT) stamp-cpu
	@true

stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
	$(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
	  cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn"
	touch stamp-decode
decode.h decode.c: $(CGEN_MAINT) stamp-decode
	@true
# end-sanitize-cygnus

# start-sanitize-m32rx
stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
	$(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
	  cpu=m32rx mach=m32rx SUFFIX=x FLAGS="with-profile fn" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)"
	touch stamp-xcpu
cpux.h readx.c semx.c modelx.c: $(CGEN_MAINT) stamp-xcpu
	@true

stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
	$(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
	  cpu=m32rx mach=m32rx SUFFIX=x
	touch stamp-xdecode
decodex.h decodex.c: $(CGEN_MAINT) stamp-xdecode
	@true
# end-sanitize-m32rx