Commit graph

538 commits

Author SHA1 Message Date
Mickael Guene
ac4c9b0459 Add support for ARM's NOREAD section flag.
include/elf
     * arm.h: Add arm SHF_ARM_NOREAD section flag.

bfd  * bfd-in2.h: Regenerate.
     * section.c: Add SEC_ELF_NOREAD.
     * elf32-arm.c (elf32_arm_post_process_headers): Only set
     PF_X attribute if a segment only contains section with
     SHF_ARM_NOREAD flag.
     (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
     (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
     to bfd flag.
     (elf32_arm_lookup_section_flags): New function to allow
     INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
     (elf32_arm_special_sections): Add special sections array
     to catch section prefix by '.text.noread' pattern.

ld/testsuite
     * ld-arm/arm-elf.exp: New tests.
     * ld-arm/thumb1-input-section-flag-match.d: New
     * ld-arm/thumb1-input-section-flag-match.s: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
     * ld-arm/thumb1-noread-present-one-section.d: New
     * ld-arm/thumb1-noread-present-one-section.s: New
     * ld-arm/thumb1-noread-present-two-section.d: New
     * ld-arm/thumb1-noread-present-two-section.s: New

binutils
	* readelf.c (get_elf_section_flags): Add support for ARM specific
	section flags.
2015-12-22 14:12:35 +00:00
Yoshinori Sato
a117b0a51c Add support for RX V2 Instruction Set
binutils
	* readelf.c(get_machine_flags): Add v2 flag.

gas
	* config/rx-defs.h(rx_cpu_type): Add RXV2 type.
	* config/tc-rx.c(cpu_type_list): New type lookup table.
	(md_parse_option): Use lookup table for choose cpu.
	(md_show_usage): Add rxv2 for mcpu option.
	* doc/c-rx.texi: Likewise.
	* config/rx-parse.y: Add v2 instructions and ACC register.
	(rx_check_v2): check v2 type.

include/elf
	* rx.h(E_FLAG_RX_V2): New RXv2 type.

include/opcode
	* rx.h: Add new instructions.

opcoes
	* rx-deocde.opc(rx_decode_opcode): Add new instructions pattern.
	* rx-dis.c(register_name): Add new register.

gas/testsuite
	* gas/rx/emaca.d: New.
	* gas/rx/emaca.sm: New.
	* gas/rx/emsba.d: New.
	* gas/rx/emsba.sm: New.
	* gas/rx/emula.d: New.
	* gas/rx/emula.sm: New.
	* gas/rx/fadd.d: Add new pattern.
	* gas/rx/fadd.sm: Add new pattern.
	* gas/rx/fmul.d: Add new pattern.
	* gas/rx/fmul.sm: Add new pattern.
	* gas/rx/fsqrt.d: New.
	* gas/rx/fsqrt.sm: New.
	* gas/rx/fsub.d: Add new pattern.
 	* gas/rx/fsub.sm: Add new pattern.
	* gas/rx/ftou.d: New.
	* gas/rx/ftou.sm: New.
	* gas/rx/maclh.d: New.
	* gas/rx/maclh.sm: New.
	* gas/rx/maclo.d: Add new pattern.
	* gas/rx/maclo.sm: Add new pattern.
	* gas/rx/macros.inc: Add new register.
	* gas/rx/movco.d: New.
	* gas/rx/movco.sm: New.
	* gas/rx/movli.d: New.
	* gas/rx/movli.sm: New.
	* gas/rx/msbhi.d: New.
	* gas/rx/msbhi.sm: New.
	* gas/rx/msblh.d: New.
	* gas/rx/msblh.sm: New.
	* gas/rx/msblo.d: New.
	* gas/rx/msblo.sm: New.
	* gas/rx/mullh.d: New.
	* gas/rx/mullh.sm: New.
	* gas/rx/mvfacgu.d: New.
	* gas/rx/mvfacgu.sm: New.
	* gas/rx/mvfachi.d: Add new pattern.
	* gas/rx/mvfachi.sm: Add new pattern.
	* gas/rx/mvfaclo.d: Add new pattern.
	* gas/rx/mvfaclo.sm: Add new pattern.
	* gas/rx/mvfacmi.d: Add new pattern.
	* gas/rx/mvfacmi.sm: Add new pattern.
	* gas/rx/mvfc.d: Add new pattern.
	* gas/rx/mvtacgu.d: New.
	* gas/rx/mvtacgu.sm: New.
	* gas/rx/mvtc.d: Add new pattern.
	* gas/rx/popc.d: Add new pattern.
	* gas/rx/pushc.d: Add new pattern.
	* gas/rx/racl.d: New.
	* gas/rx/racl.sm: New.
	* gas/rx/racw.d: Add new pattern.
	* gas/rx/racw.sm: Add new pattern.
	* gas/rx/rdacl.d: New.
	* gas/rx/rdacl.sm: New.
	* gas/rx/rdacw.d: New.
	* gas/rx/rdacw.sm: New.
	* gas/rx/rx.exp: Add option.
	* gas/rx/stnz.d: Add new pattern.
	* gas/rx/stnz.sm: Add new pattern.
	* gas/rx/stz.d: Add new pattern.
	* gas/rx/stz.sm: Add new pattern.
	* gas/rx/utof.d: New.
	* gas/rx/utof.sm: New.
2015-12-15 09:26:56 +00:00
Alan Modra
006589cfa1 R_PPC64_ENTRY
Add a new relocation that marks large-model entry code, for edit back
to medium-model.

include/elf/
	* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
	* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
	* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
	entry for R_PPC64_ENTRY.
	(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
	(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY.  Use
	new insn defines.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-12-07 13:14:53 +10:30
Peter Bergner
a680de9a98 Add assembler, disassembler and linker support for power9.
include/opcode/
	* ppc.h (PPC_OPCODE_POWER9): New define.
	(PPC_OPCODE_VSX3): Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
	Add PPC_OPCODE_VSX3 to the vsx entry.
	(powerpc_init_dialect): Set default dialect to power9.
        * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
        insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
        extract_l1 insert_xtq6, extract_xtq6): New static functions.
        (insert_esync): Test for illegal L operand value.
	(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
	XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
	XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
	XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
	PPCVSX3): New defines.
	(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
	fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
	<mcrxr>: Use XBFRARB_MASK.
	<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
	bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
	cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
	cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
	lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
	lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
	modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
	rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
	stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
	subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
	vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
	vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
	vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
	vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
	vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
	vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
	vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
	xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
	xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
	xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
	xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
	xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
	xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
	xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
	xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
	xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
	xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
	xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
	xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
	xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
	<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
	<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.

include/elf/
	* ppc.h (R_PPC_REL16DX_HA): New reloction.
	* ppc64.h (R_PPC64_REL16DX_HA): Likewise.

bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
	(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
	(ppc_elf_addr16_ha_reloc): Likewise.
	(ppc_elf_check_relocs): Likewise.
	(ppc_elf_relocate_section): Likewise.
	(is_insn_dq_form): Handle lxv and stxv instructions.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
	(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
	(ppc64_elf_ha_reloc): Likewise.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.

elfcpp/
	* powerpc.h (R_POWERPC_REL16DX_HA): Define.

gas/
	* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
	* doc/c-ppc.texi (PowerPC-Opts):  Likewise.
	* config/tc-ppc.c (md_show_usage): Likewise.
	(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
	(md_apply_fix): Likewise.
	(ppc_handle_align): Handle power9's group ending nop.

gas/testsuite/
	* gas/ppc/altivec3.s: New test.
	* gas/ppc/altivec3.d: Likewise.
	* gas/ppc/vsx3.s: Likewise.
	* gas/ppc/vsx3.d: Likewise.
	* gas/ppc/power9.s: Likewise.
	* gas/ppc/power9.d: Likewise.
	* gas/ppc/ppc.exp: Run them.
	* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
	* gas/ppc/power8.d: Likewise.
	* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
	<lxvd2x, stxvd2x>: ...to this.
	* gas/ppc/vsx.d: Likewise.

gold/
	* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
	(Powerpc_relocate_functions::addr16dx_ha): Likewise.
	(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

ld/testsuite/
	* ld-powerpc/addpcis.d: New test.
	* ld-powerpc/addpcis.s: New test.
	* ld-powerpc/powerpc.exp: Run it.
2015-11-11 19:52:52 -06:00
Cupertino Miranda
6f4b1afcdc Fix errors in the gas testsuite for the ARC target.
bfd	* reloc.c (BFD_RELOC_ARC_32_PCREL): New entry.
	(ARC_TLS_DTPOFF): Arrange it in order.
	* elf32-arc.c (arc_elf_howto_ini): Update formula.
	(get_middle_endian_relocation): New function.
	(PDATA): Define.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

elf	* arc-reloc.def (ARC_32_PCREL): New definition.

gas	* config/tc-arc.c (tokenize_arguments): Avoid creating unused
	symbols when parsing relocation types.
	(md_apply_fix): Handle TLS relocations. Fix BFD_RELOC_ARC_32_PCREL
	relocation.
	(arc_check_reloc): Emit BFD_RELOC_ARC_32_PCREL relocation.
2015-10-28 13:48:00 +00:00
Stephen Fisher
c6056a744a Add support to readelf for reading NetBSD ELF core notes.
binutils * binutils.c (process_netbsd_elf_note): New function.
	(process_note): Call the new function for NetBSD core notes.

include	* common.h (NT_NETBSD_MARCH): Define.
2015-10-27 11:32:38 +00:00
H.J. Lu
56ceb5b540 Add R_X86_64_[REX_]GOTPCRELX support to gas and ld
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in

https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0

to gas and ld.  It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip).  With the locally defined symbol, foo, we
convert

  mov foo@GOTPCREL(%rip), %reg

to

   lea foo(%rip), %reg

and convert

   call/jmp *foo@GOTPCREL(%rip)
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg, foo@GOTPCREL(%rip)
to

test $foo, %reg

and convert

   binop foo@GOTPCREL(%rip), %reg

to

   binop $foo, %reg

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf64-x86-64.c: Include opcode/i386.h.
	(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
	R_X86_64_REX_GOTPCRELX.
	(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.  Replace need_convert_mov_to_lea with
	need_convert_load.
	(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX.
	(elf_x86_64_size_dynamic_sections): Likewise.
	(elf_x86_64_relocate_section): Likewise.
	(elf_x86_64_convert_mov_to_lea): Renamed to ...
	(elf_x86_64_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_X86_64_GOTPCRELX and
	R_X86_64_REX_GOTPCRELX transformations.
	* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
	(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
	(tc_gen_reloc): Likewise.
	(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
	BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
	true for BFD_RELOC_X86_64_GOTPCRELX and
	BFD_RELOC_X86_64_REX_GOTPCRELX.

gas/testsuite/

	* gas/i386/i386.exp: Run x86-64-gotpcrel.
	* gas/i386/x86-64-gotpcrel.d: New file.
	* gas/i386/x86-64-gotpcrel.s: Likewise.
	* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
	* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
	R_X86_64_REX_GOTPCRELX.
	* gas/i386/ilp32/x86-64-localpic.d: Likewise.

include/elf/

	* x86-64.h (R_X86_64_GOTPCRELX): New.
	(R_X86_64_REX_GOTPCRELX): Likewise.

ld/testsuite/

	* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
	with R_X86_64_REX_GOTPCRELX.
	* ld-x86-64/plt-main1.rd: Likewise.
	* ld-x86-64/plt-main3.rd: Likewise.
	* ld-x86-64/plt-main4.rd: Likewise.
	* ld-x86-64/gotpcrel1.dd: New file.
	* ld-x86-64/gotpcrel1.out: Likewise.
	* ld-x86-64/gotpcrel1a.S: Likewise.
	* ld-x86-64/gotpcrel1b.c: Likewise.
	* ld-x86-64/gotpcrel1c.c: Likewise.
	* ld-x86-64/gotpcrel1d.S: Likewise.
	* ld-x86-64/load1.s: Likewise.
	* ld-x86-64/load1a.d: Likewise.
	* ld-x86-64/load1b.d: Likewise.
	* ld-x86-64/load1c.d: Likewise.
	* ld-x86-64/load1d.d: Likewise.
	* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
	tests.  Run gotpcrel1 test.
2015-10-22 04:49:38 -07:00
H.J. Lu
02a866936d Add R_386_GOT32X support to gas and ld
This patch adds support for the R_386_GOT32X relocation proposed in

https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I

to gas and ld.  It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)].  We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax".  With the locally defined symbol, foo,
we convert

   mov foo@GOT[(%reg1)], %reg2
to
   lea foo[@GOTOFF(%reg1)], %reg2

and convert

   call/jmp *foo@GOT[(%reg)]
to

   nop call foo/jmp foo nop

When PIC is false, convert

   test %reg1, foo@GOT[(%reg2)]
to
   test $foo, %reg1

and convert

binop foo@GOT[(%reg1)], %reg2

to

binop $foo, %reg2

where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.

bfd/

	* elf32-i386.c: Include opcode/i386.h.
	(elf_howto_table): Add R_386_GOT32X.
	(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
	(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
	(need_convert_mov_to_lea): Renamed to ...
	(need_convert_load): This.
	(elf_i386_check_relocs): Handle R_386_GOT32X.  Replace
	need_convert_mov_to_lea with need_convert_load.
	(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
	(elf_i386_size_dynamic_sections): Likewise.
	(elf_i386_relocate_section): Likewise.
	(elf_i386_convert_mov_to_lea): Renamed to ...
	(elf_i386_convert_load): This.  Replace need_convert_mov_to_lea
	with need_convert_load.  Support R_386_GOT32X transformations.
	* reloc.c (BFD_RELOC_386_GOT32X): New.
	* bfd-in2.h: Regenerated.
	* libbfd.h: Likewise.

gas/

	* config/tc-i386.c (tc_i386_fix_adjustable): Handle
	BFD_RELOC_386_GOT32X.
	(tc_gen_reloc): Likewise.
	(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
	(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
	"test %reg, mem" and "binop mem, %reg" where binop is one of
	adc, add, and, cmp, or, sbb, sub, xor instructions.  Set
	fx_tcbit if the REX prefix is generated.  Set fx_tcbit2 if
	BFD_RELOC_386_GOT32X should be generated.
	(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
	is set.

gas/testsuite/

	* gas/i386/got.d: New file.
	* gas/i386/got.s: Likewise.
	* gas/i386/i386.exp: Run got.
	* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
	* gas/i386/mixed-mode-reloc32.d: Likewise.
	* gas/i386/reloc32.d: Likewise.

include/elf/

	* i386.h (R_386_GOT32X): New relocation.

ld/testsuite/

	* ld-i386/branch1.d: New file.
	* ld-i386/branch1.s: Likewise.
	* ld-i386/call1.d: Likewise.
	* ld-i386/call1.s: Likewise.
	* ld-i386/call2.d: Likewise.
	* ld-i386/call2.s: Likewise.
	* ld-i386/got1.dd: Likewise.
	* ld-i386/got1.out: Likewise.
	* ld-i386/got1a.S: Likewise.
	* ld-i386/got1b.c: Likewise.
	* ld-i386/got1c.c: Likewise.
	* ld-i386/got1d.S: Likewise.
	* ld-i386/jmp1.d: Likewise.
	* ld-i386/jmp1.s: Likewise.
	* ld-i386/jmp2.d: Likewise.
	* ld-i386/jmp2.s: Likewise.
	* ld-i386/load1.d: Likewise.
	* ld-i386/load1.s: Likewise.
	* ld-i386/load2.d: Likewise.
	* ld-i386/load2.s: Likewise.
	* ld-i386/load3.d: Likewise.
	* ld-i386/load3.s: Likewise.
	* ld-i386/load4.s: Likewise.
	* ld-i386/load4a.d: Likewise.
	* ld-i386/load4b.d: Likewise.
	* ld-i386/load5.s: Likewise.
	* ld-i386/load5a.d: Likewise.
	* ld-i386/load5b.d: Likewise.
	* ld-i386/load6.d: Likewise.
	* ld-i386/load6.s: Likewise.
	* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
	load1, load2, load3, load4a, load4b, load5a, load5b and load6
	tests.  Run got1 test.
2015-10-22 04:47:07 -07:00
Nick Clifton
886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
Rainer Orth
5c383f0262 Solaris PIE support
include/elf:
	* common.h (DF_1_STUB, DF_1_PIE): Define.

	ld:
	* emulparams/solaris2.sh (GENERATE_PIE_SCRIPT): Set to yes.

	* emultempl/elf32.em: Include ldlex.h.
	(gld${EMULATION_NAME}_handle_option) [GENERATE_PIE_SCRIPT]
	<OPTION_PIE>: Set DF_1_PIE.

	binutils:
	* readelf.c (process_dynamic_section): Handle DF_1_STUB, DF_1_PIE.
2015-09-22 11:12:51 +02:00
H.J. Lu
7f7a1bce25 Change ch_type in Elf64_External_Chdr to 4 bytes
The ch_type field in Elf64_External_Chdr is 4 bytes, followed by a
4-byte padding.  This change doesn't introduce any functional change
since only the lower 32 bits of the ch_type field are used.

	* external.h (Elf64_External_Chdr): Change ch_type to 4 bytes
	and add ch_reserved.
2015-09-21 10:19:25 -07:00
Jiong Wang
70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
Jiong Wang
56a2e4507a [AArch64][4/8] Add R_AARCH64_P32_TLSLD_ADD_LO12_NC in elf header
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_LO12_NC): Define.
2015-08-11 21:25:32 +01:00
Jiong Wang
2c0a466a7f [AArch64][1/8] Add R_AARCH64_P32_TLSLD_ADR_PAGE21 in elf header
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define.
2015-08-11 21:15:52 +01:00
H.J. Lu
72f4393d8c Remove leading/trailing white spaces in ChangeLog 2015-07-24 04:16:47 -07:00
Sandra Loosemore
8c163c5a87 Relocations for Nios II R2
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* bfd-in2.h: Regenerated.
	* elf32-nios2.c (elf_nios2_howto_table_rel): Rename to...
	(elf_nios2_r1_howto_table_rel): This.
	(elf_nios2_r2_howto_table_rel): New.
	(BFD_IS_R2): New.
	(lookup_howto): Add ABFD parameter.  Adjust to look up in either
	the R1 or R2 relocation table, as determined by ABFD.
	(nios2_reloc_map): Add R2 relocations.
	(nios2_elf32_bfd_reloc_type_lookup): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_bfd_reloc_name_lookup): Use ABFD to decide whether to
	return an R1 or R2 relocation.
	(nios2_elf32_info_to_howto): Do lookup using lookup_howto.
	Pass it the ABFD parameter.
	(nios2_elf32_do_call26_relocate): Check for alignment on a 4-byte
	boundary.
	(nios2_elf32_relocate_section): Adjust call to lookup_howto.
	* libbfd.h: Regenerated.
	* reloc.c (BFD_RELOC_NIOS2_R2_S12): New.
	(BFD_RELOC_NIOS2_R2_I10_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_1_PCREL): New.
	(BFD_RELOC_NIOS2_R2_T1I7_2): New.
	(BFD_RELOC_NIOS2_R2_T2I4): New.
	(BFD_RELOC_NIOS2_R2_T2I4_1): New.
	(BFD_RELOC_NIOS2_R2_T2I4_2): New.
	(BFD_RELOC_NIOS2_R2_X1I7_2): New.
	(BFD_RELOC_NIOS2_R2_X2L5): New.
	(BFD_RELOC_NIOS2_R2_F1I5_2): New.
	(BFD_RELOC_NIOS2_R2_L5I4X1): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6): New.
	(BFD_RELOC_NIOS2_R2_T1X1I6_2): New.

	include/elf/
	* nios2.h (R_NIOS2_R2_S12): New.
	(R_NIOS2_R2_I10_1_PCREL): New.
	(R_NIOS2_R2_T1I7_1_PCREL): New.
	(R_NIOS2_R2_T1I7_2): New.
	(R_NIOS2_R2_T2I4): New.
	(R_NIOS2_R2_T2I4_1): New.
	(R_NIOS2_R2_T2I4_2): New.
	(R_NIOS2_R2_X1I7_2): New.
	(R_NIOS2_R2_X2L5): New.
	(R_NIOS2_R2_F1I5_2): New.
	(R_NIOS2_R2_L5I4X1): New.
	(R_NIOS2_R2_T1X1I6): New.
	(R_NIOS2_R2_T1X1I6_2): New.
	(R_NIOS2_ILLEGAL): Renumber.
2015-07-01 16:02:09 -07:00
Sandra Loosemore
965b1d8083 Add Nios II arch flags and compatibility tests
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New.
	* bfd-in2.h: Regenerated.
	* cpu-nios2.c (nios2_compatible): New.
	(N): Use nios2_compatible instead of bfd_default_compatible.
	(NIOS2R1_NEXT, NIOS2R2_NEXT): Define.
	(arch_info_struct): New.
	(bfd_nios2_arch): Chain to NIOS2R1_NEXT.
	* elf32-nios2.c (is_nios2_elf): New.
	(nios2_elf32_merge_private_bfd_data): New.
	(nios2_elf32_object_p): New.
	(bfd_elf32_bfd_merge_private_bfd_data): Define.
	(elf_backend_object_p): Define.

	gas/
	* config/tc-nios2.c: Adjust includes.
	(OPTION_MARCH): Define.
	(md_longopts): Add -march option.
	(nios2_architecture): New.
	(nios2_use_arch): New.
	(md_parse_option): Handle OPTION_MARCH.
	(md_show_usage): Document -march.
	(md_begin): Set arch in BFD.
	(nios2_elf_final_processing): New.
	* config/tc-nios2.h (elf_tc_final_processing): Define.
	(nios2_elf_final_processing): New.
	* doc/c-nios2.texi (-march): Add documentation.

	include/elf/
	* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.

	ld/testsuite/
	* ld-nios2/mixed1a.d: New.
	* ld-nios2/mixed1a.s: New.
	* ld-nios2/mixed1b.d: New.
	* ld-nios2/mixed1b.s: New.
	* ld-nios2/nios2.exp: Build the new compatibility tests.
2015-07-01 15:55:28 -07:00
Roland McGrath
14ae95f220 Recognize GNU_ABI_TAG_SYLLABLE and GNU_ABI_TAG_NACL.
binutils/
	* readelf.c (print_gnu_note: NT_GNU_ABI_TAG): Recognize
	GNU_ABI_TAG_SYLLABLE and GNU_ABI_TAG_NACL.

include/elf/
	* common.h (GNU_ABI_TAG_SYLLABLE): New macro.
	(GNU_ABI_TAG_NACL): New macro.
2015-05-29 09:13:53 -07:00
H.J. Lu
22abe5566a Rename EM_486 to EM_IAMCU
bfd/

	* elfcode.h (elf_object_p): Replace EM_486 with EM_IAMCU.

binutils/

	* dwarf.c (init_dwarf_regnames): Replace EM_486 with EM_IAMCU.
	* readelf.c (guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_elf_section_flags): Likewise.
	(process_section_headers): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.

include/elf/

	* common.h (EM_486): Renamed to ...
	(EM_IAMCU): This.
2015-05-11 08:53:05 -07:00
Andreas Krebbel
643f7afb0d S/390: z13 use GNU attribute to indicate vector ABI
bfd/
	* elf-s390-common.c (elf_s390_merge_obj_attributes): New function.
	* elf32-s390.c (elf32_s390_merge_private_bfd_data): Call
	elf_s390_merge_obj_attributes.
	* elf64-s390.c (elf64_s390_merge_private_bfd_data): New function.

binutils/
	* readelf.c (display_s390_gnu_attribute): New function.
	(process_s390_specific): New function.
	(process_arch_specific): Call process_s390_specific.

gas/
	* doc/as.texinfo: Document Tag_GNU_S390_ABI_Vector.

include/elf/
	* s390.h: Define Tag_GNU_S390_ABI_Vector.
2015-04-27 10:32:23 +02:00
Alan Modra
44bd1acd55 Non-alloc sections don't belong in PT_LOAD segments
Taking them out showed a bug in the powerpc64 backend with .branch_lt
being removed from output_bfd but not from previously set up segment
section maps.  Removing the bfd sections meant their sh_flags (and
practically everything else) remaining zero, ie. not SHF_ALLOC,
triggering complaints about "`.branch_lt' can't be allocated in
segment".

include/elf/
	* internal.h (ELF_SECTION_IN_SEGMENT_1): Ensure PT_LOAD and
	similar segments only contain alloc sections.
ld/
	* emultempl/ppc64elf.em (gld${EMULATION_NAME}_after_allocation):
	Call gld${EMULATION_NAME}_map_segments regardless of need_laying_out.
ld/testsuite/
	* ld-powerpc/tocnovar.d: Revert last change.
2015-04-25 09:15:49 +09:30
H.J. Lu
9361e6307b Define SEC_MEP_VLIW in bfd/section.c
Bits in section flags should only be defined in bfd/section.c.  This
patch moves SEC_MEP_VLIW to bfd/section.c.

bfd/

	PR binutils/18316
	* section.c (SEC_MEP_VLIW): New.
	* bfd-in2.h: Regenerated.

include/elf/

	PR binutils/18316
	* mep.h (SEC_MEP_VLIW): Removed.
2015-04-24 05:40:23 -07:00
Nick Clifton
3525236c57 Add support to the RX toolchain to restrict the use of string instructions.
bfd	* elf32-rx.c (describe_flags): Report the settings of the string
	insn using bits.
	(rx_elf_merge_private_bfd_data): Handle merging of the string insn
	using bits.

bin	* readelf.c (get_machine_flags): Report the setting of the string
	insn using bits.

gas	* config/tc-rx.c (enum options): Add OPTION_DISALLOW_STRING_INSNS.
	(md_longopts): Add -mno-allow-string-insns.
	(md_parse_option): Handle -mno-allow-string-insns.
	(md_show_usage): Mention -mno-allow-string-insns.
	(rx_note_string_insn_use): New function.  Produces an error
	message if a string insn is used when it is not allowed.
	* config/rx-parse.y (SCMPU): Call rx_note_string_insn_use.
	(SMOVU, SMOVB, SMOVF, SUNTIL, SWHILE, RMPA): Likewise.
	* config/rx-defs.h (rx_note_string_insn_use): Prototype.
	* doc/c-rx.texi: Document -mno-allow-string-insns.

elf	* rx.h (E_FLAG_RX_SINSNS_SET): New bit in e_flags field.
	(E_FLAG_RX_SINSNS_YES): Likewise.
	(E_FLAG_RX_SINSNS_MASK): New define.
2015-04-09 12:48:37 +01:00
H.J. Lu
6aa7612029 Add Elf_Internal_Chdr and ElfXX_External_Chdr
* external.h (Elf32_External_Chdr): New.
	(Elf64_External_Chdr): Likewise.
	* internal.h (Elf_Internal_Chdr): Likewise.
2015-04-03 12:50:10 -07:00
H.J. Lu
332f5759ac Add ELFOSABI_CLOUDABI and SHF_COMPRESSED
Update from gABI DRAFT - 10 June 2013.

	* common.h (ELFOSABI_CLOUDABI): New.
	(SHF_COMPRESSED): Likewise.
	(ELFCOMPRESS_ZLIB): Likewise.
	(ELFCOMPRESS_LOOS): Likewise.
	(ELFCOMPRESS_HIOS): Likewise.
	(ELFCOMPRESS_LOPROC): Likewise.
	(ELFCOMPRESS_HIPROC): Likewise.
2015-03-26 08:42:58 -07:00
Nick Clifton
1740ba0cec Add support for G13 and G14 flag bits in RL78 ELF binaries.
inc	* rl78.h (E_FLAG_RL78_G10): Redefine.
	(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
	E_FLAG_RL78_G14): New flags.

bin	* readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.

gas	* config/tc-rl78.c (enum options): Add G13 and G14.
	(md_longopts): Add -mg13 and -mg14.
	(md_parse_option): Handle -mg13 and -mg14.
	(md_show_usage): List -mg13 and -mg14.
	* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.

bfd	* elf32-rl78.c (rl78_cpu_name): New function.  Prints the name of
	the RL78 core based upon the flags.
	(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
	flags.
	(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
	(elf32_rl78_machine): Always return bfd_mach_rl78.
2015-03-19 15:37:43 +00:00
Marcus Shawcroft
3c12b05436 Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support. 2015-02-26 22:23:09 +00:00
Nick Clifton
685080f210 Adds support for generating notes in V850 binaries.
bfd	* elf32-v850.c (v850_set_note): New function.  Creates a Renesas
	style note entry.
	(v850_elf_make_note_section): New function.  Creates a note
	section.
	(v850_elf_create_sections): New function.  Create a note section
	if one is not already present.
	(v850_elf_set_note): New function.  Adds a note to a bfd.
	(v850_elf_copy_private_bfd_data): New function.  Copies V850
	notes.
	(v850_elf_merge_notes): New function.  Merges V850 notes.
	(print_v850_note): New function.  Displays a V850 note.
	(v850_elf_print_notes): New function. Displays all notes attached
	to a bfd.
	(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
	(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
	(v850_elf_fake_sections): Set the type of the V850 note section.
	* bfd-in.h (v850_elf_create_sections): Add prototype.
	(v850_elf_set_note): Add prototype.
	* bfd-in2.h: Regenerate.

binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
	flags.
	(get_v850_section_type_name): New function.  Handles V850 special
	sections.
	(get_section_type_name): Add support for V850.
	(get_v850_elf_note_type): New function.  Returns the name of a
	V850 note.
	(print_v850_note): New function.  Prints a V850 note.
	(process_v850_notes): New function.  Prints V850 notes.
	(process_note_sections): Add support for V850.

binutils/testsute
	* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.

gas	* config/tc-v850.c (soft_float): New variable.
	(v850_data_8): New variable.
	(md_show_usage): Add -msoft-float/-mhard-float.
	(md_parse_option): Likewise.
	(md_begin): Set the default value of soft_float.
	(v850_md_end): New function.  Creates a note section.
	* config/tc-v850.h (md_end): Define.
	* doc/c-v850.texi: Document -msoft-float/-mhard-float.

gas/testsuite
	* gas/elf/elf.exp: Add special version of the section2 test for
	the V850.
	* gas/elf/section2.e-v850: New file.

include/elf
	* v850.h (EF_RH850_SIMD): Delete deprecated flag.
	(EF_RH850_CACHE): Likewise.
	(EF_RH850_MMU): Likewise.
	(EF_RH850_DATA_ALIGN8): Likewise.
	(SHT_RENESAS_IOP): Fix typo in name.
	(SHT_RENESAS_INFO): Define.
	(V850_NOTE_SECNAME): Define.
	(SIZEOF_V850_NOTE): Define.
	(V850_NOTE_NAME): Define.
	(enum v850_notes): New enum.
	(NUM_V850_NOTES): Define.

ld/ChangeLog
2015-02-24  Nick Clifton  <nickc@redhat.com>

	* Makefile.am (ev850.c): Add dependency upon
	$(srcdir)/emultempl/v850elf.em.
	(ev850_rh850.c): Likewise.
	* Makefile.in: Regenerate.
	* emultempl/v850elf.em: New file.
	* emulparams/v850.sh (EXTRA_EM_FILE): Define.
	* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
	* scripttempl/v850.sc: Add .note.renesas section.
	* scripttempl/v850_rh850.sc: Likewise.

ld/testsuite
	* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
2015-02-24 17:54:09 +00:00
Nick Clifton
8f3102ea1a Fixes a typo in the license notice in include/elf/score.h
PR 17915
	* score.h: Fix typo in license header.
2015-02-23 14:52:12 +00:00
Andreas Arnez
4ef9f41a95 S390: Support new vector register sections
The IBM z13 has new 128-bit wide vector registers v0-v31, where v0-v15
include the existing 64-bit wide floating point registers.  The Linux
kernel presents the vector registers as two additional register sets,
one for the right halves of v0-v15 and another one for the full
registers v16-v31.  Thus a new core file may contain two new register
note sections, and this patch adds support to binutils for them.

bfd/
	* elf-bfd.h (elfcore_write_s390_vxrs_low): Add prototype.
	(elfcore_write_s390_vxrs_high): Likewise.
	* elf.c (elfcore_grok_s390_vxrs_low): New function.
	(elfcore_grok_s390_vxrs_high): New function.
	(elfcore_grok_note): Call them.
	(elfcore_write_s390_vxrs_low): New function.
	(elfcore_write_s390_vxrs_high): New function.
	(elfcore_write_register_note): Call them.

binutils/
	* readelf.c (get_note_type): Add NT_S390_VXRS_LOW and
	NT_S390_VXRS_HIGH.

include/elf/
	* common.h (NT_S390_VXRS_LOW): New macro.
	(NT_S390_VXRS_HIGH): Likewise.
2015-02-20 10:39:53 +01:00
Alan Modra
3f8107ab38 FT32 initial support
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications.

	* configure.ac: Add FT32 support.
	* configure: Regenerate.
bfd/
	* Makefile.am: Add FT32 files.
	* archures.c (enum bfd_architecture): Add bfd_arch_ft32.
	(bfd_mach_ft32): Define.
	(bfd_ft32_arch): Declare.
	(bfd_archures_list): Add bfd_ft32_arch.
	* config.bfd: Handle FT32.
	* configure.ac: Likewise.
	* cpu-ft32.c: New file.
	* elf32-ft32.c: New file.
	* reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17,
	BFD_RELOC_FT32_18): Define.
	* targets.c (_bfd_target_vector): Add ft32_elf32_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* readelf.c: Add FT32 support.
gas/
	* Makefile.am: Add FT32 files.
	* config/tc-ft32.c: New file.
	* config/tc-ft32.h: New file.
	* configure.tgt: Add FT32 support.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
gas/testsuite/
	* gas/ft32/ft32.exp: New file.
	* gas/ft32/insn.d: New file.
	* gas/ft32/insn.s: New file.
include/
	* dis-asm.h (print_insn_ft32): Declare.
include/elf/
	* common.h (EM_FT32): Define.
	* ft32.h: New file.
include/opcode/
	* ft32.h: New file.
ld/
	* Makefile.am: Add FT32 files.
	* configure.tgt: Handle FT32 target.
	* emulparams/elf32ft32.sh: New file.
	* scripttempl/ft32.sc: New file.
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Add FT32 files.
	* configure.ac: Handle FT32.
	* disassemble.c (disassembler): Call print_insn_ft32.
	* ft32-dis.c: New file.
	* ft32-opc.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
2015-01-28 16:25:18 +10:30
Anthony Green
400cf8cbe9 Use official ELF machine number for moxie 2015-01-09 07:13:07 -05:00
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Terry Guo
5c294fee9a ARM: Add support for value 3 of Tag_ABI_VFP_args attribute
*** bfd/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
	Tag_ABI_VFP_args value and replace hardcoded values by enum
	values.
	(elf32_arm_post_process_headers): Set e_flags in ELF header
	as hard float only when Tag_ABI_VFP_args is 1, using new enum
	value AEABI_VFP_args_vfp to check that.

*** binutils/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible".

*** gdb/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm-tdep.c (arm_gdbarch_init): Explicitely handle value 3 of
	Tag_ABI_VFP_args. Also replace hardcoded values by enum values
	in the switch handling the different values of Tag_ABI_VFP_args.

*** gold/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm.cc (Target_arm::do_adjust_elf_header): Set e_flags in ELF
	header as hard float only when Tag_ABI_VFP_args is 1, using new
	enum value AEABI_VFP_args_vfp to check that.
	(Target_arm::merge_object_attributes): Handle new Tag_ABI_VFP_args
	value and replace hardcoded values by enum values.

*** include/elf/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* arm.h: New AEABI_FP_number_model_* and AEABI_VFP_args_* enum
	values.

*** ld/testsuite/ChangeLog ***

2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>

	* ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args.
	* ld-arm/attr-merge-2b.s: Likewise.
	* ld-arm/attr-merge-2.attr: Likewise.
	* ld-arm/attr-merge-4a.s: Add Tag_ABI_FP_number_model and
	Tag_ABI_VFP_args.
	* ld-arm/attr-merge-4b.s: Likewise.
	* ld-arm/attr-merge-4.attr: Likewise.
	* ld-arm/attr-merge-6a.s: Likewise.
	* ld-arm/attr-merge-6b.s: Likewise.
	* ld-arm/attr-merge-6.attr: Add Tag_ABI_FP_number_model.
2014-12-25 09:55:03 +08:00
Eric Botcazou
d924db559b Add Visium support to bfd
bfd/
	* config.bfd: Add Visium support.
	* configure.ac: Likewise.
	* configure: Regenerate.
	* Makefile.am (ALL_MACHINES): Add cpu-visium.lo.
	(ALL_MACHINES_CFILES): Add cpu-visium.c.
	(BFD32_BACKENDS): Add elf32-visium.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-visium.c.
	* Makefile.in: Regenerate.
	* archures.c (DESCRIPTION): Add Visium support.
	(bfd_visium_arch): Declare.
	(bfd_archures_list): Add bfd_visium_arch.
	* reloc.c: Add Visium relocations.
	* targets.c (visium_elf32_vec): Declare.
	(_bfd_target_vector): Add visium_elf32_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
	* cpu-visium.c: New file.
	* elf32-visium.c: Likewise.
	* po/SRC-POTFILES.in: Regenerate.
include/elf/
	* common.h (EM_VISIUM): Define.
	* visium.h: New file.
2014-12-06 16:35:18 +01:00
H.J. Lu
0be3630492 Mark R_X86_64_GOTPLT64 obsolete
* x86-64.h (R_X86_64_GOTPLT64): Mark it obsolete.
2014-11-13 11:26:47 -08:00
Jose E. Marchesi
0b6be41550 opcodes, elf: annotate instructions with HWCAP2_VIS3B.
This patch annotates the following SPARC instructions as VIS3B
instructions: ldx *, %efsr, fpadd64, fpsub64, fpcmpule8, fpcmpune8,
fpcmpugt8, fpcmpueq8.  It also improves the documentation of the VIS3B
capability in several headers.

Tested in sparc64-unknown-linux-gnu and sparc-unknown-linux-gnu.
No visible regressions.

opcodes/ChangeLog:

  2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc-opc.c (sparc-opcodes): Annotate several instructions with
	the HWCAP2_VIS3B hwcap.

include/opcodes/ChangeLog:

  2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc.h (HWCAP2_VIS3B): Documentation improved.

include/elf/ChangeLog:

  2014-10-17  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved.
2014-10-17 22:00:02 +02:00
Jose E. Marchesi
3d68f91c0f This is a series of patches that add support for the SPARC M7 cpu to
binutils.  They were discussed and approved here:

  https://sourceware.org/ml/binutils/2014-10/msg00038.html
2014-10-09 13:16:53 +01:00
Will Newton
23664eacaf include/elf/aarch64.h: Add reloc numbers from ABI release 1.0
Add the relocation numbers defined in ABI release 1.0 but missing
from the current header. This will allow tools like objdump to dump
objects that use these relocations.

include/elf/ChangeLog:

2014-10-08  Will Newton  <will.newton@linaro.org>

	* aarch64.h: Sync up relocations with ABI release 1.0.
2014-10-08 10:07:45 +01:00
Kuan-Lin Chen
1c8f6a4d1f NDS32: Code refactoring of relaxation.
Refactor each relaxation pattern to raise the maintainability.
In origin, all patterns is analysed in nds32_elf_relax_section,
so it is hard to debug and maintain.  Therefore, we classify all
patterns into different functions in this patch.
Moreover, we adjust all optimizations into nds32_elf_relax_section
to take these optimizations in turn.  This can promise all relaxation
being done after calling gld${EMULATION_NAME}_after_allocation.
2014-09-16 13:08:00 +08:00
Andrew Bennett
7361da2c95 Add support for MIPS R6.
bfd/
 	* aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6.
 	* archures.c (bfd_architecture): Likewise.
 	* bfd-in2.h (bfd_architecture): Likewise.
 	(bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
 	BFD_RELOC_MIPS_19_PCREL_S2.
 	* cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6.
 	* elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2
 	R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	* elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2,
	R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16
	and R_MIPS_PCLO16.
 	(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	* elfn32-mips.c: Likewise.
 	* elfxx-mips.c (MIPSR6_P): New define.
 	(mipsr6_exec_plt_entry): New array.
	(hi16_reloc_p): Add support for R_MIPS_PCHI16.
	(lo16_reloc_p): Add support for R_MIPS_PCLO16.
 	(aligned_pcrel_reloc_p): New function.
 	(mips_elf_relocation_needs_la25_stub): Add support for relocs:
 	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
 	(mips_elf_calculate_relocation): Add support for relocs:
 	R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2,
 	R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6.
	(mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16.
 	(_bfd_mips_elf_check_relocs): Add support for relocs:
	R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
 	(_bfd_mips_elf_relocate_section): Add a check for unaligned
 	pc relative relocs.
 	(_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6
 	plt entry.
 	(mips_set_isa_flags): Add support for mips32r6 and mips64r6.
 	(_bfd_mips_elf_print_private_bfd_data): Likewise.
 	(mips_32bit_flags_p): Add support for mips32r6.
 	* libbfd.h (bfd_reloc_code_real_names): Add entries for
 	BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2,
 	BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2.
 	* reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
 	BFD_RELOC_MIPS_19_PCREL_S2.

binutils/
 	* readelf.c (get_machine_flags): Add support for mips32r6 and
 	mips64r6.

elfcpp/
 	* mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants.

gas/
 	* config/tc-mips.c (mips_nan2008): New static global.
	(mips_flag_nan2008): Removed.
	(LL_SC_FMT): New define.
	(COP12_FMT): Updated.
	(ISA_IS_R6): New define.
 	(ISA_HAS_64BIT_REGS): Add mips64r6.
 	(ISA_HAS_DROR): Likewise.
 	(ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
 	(ISA_HAS_ROR): Likewise.
 	(ISA_HAS_ODD_SINGLE_FPR): Likewise.
 	(ISA_HAS_MXHC1): Likewise.
 	(hilo_interlocks): Likewise.
 	(md_longopts): Likewise.
	(ISA_HAS_LEGACY_NAN): New define.
 	(options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
 	(mips_ase): Add field rem_rev.
 	(mips_ases): Updated to add which ISA an ASE was removed in.
 	(mips_isa_rev): Add support for mips32r6 and mips64r6.
 	(mips_check_isa_supports_ase): Add support to check if an ASE
 	has been removed in the specified MIPS ISA revision.
 	(validate_mips_insn): Skip '-' character.
	(macro_build): Likewise.
	(mips_check_options): Prevent R6 working with fp32, mips16,
	micromips, or branch relaxation.
	(file_mips_check_options): Set R6 floating point registers to
	64 bit.  Also deal with the nan2008 option.
 	(limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	(operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
	and OP_NON_ZERO_REG.
 	(match_check_prev_operand): New static function.
 	(match_same_rs_rt_operand): New static function.
	(match_non_zero_reg_operand): New static function.
 	(match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
	and OP_NON_ZERO_REG.
 	(insns_between): Added case to deal with forbidden slots.
 	(append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
 	and BFD_RELOC_MIPS_26_PCREL_S2.
 	(match_insn): Add support for operands -A, -B, +' and +".  Also
 	skip '-' character.
 	(mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
 	(md_parse_option): Add support for mips32r6 and mips64r6.  Also
	update the nan option handling.
 	(md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2.
 	(mips_force_relocation): Prevent forced relaxation for MIPS r6.
 	(md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
 	(s_mipsset): Add support for mips32r6 and mips64r6.
	(s_nan): Update to support the new nan2008 framework.
 	(tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
 	BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
 	BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
 	BFD_RELOC_LO16_PCREL.
	(mips_elf_final_processing): Updated to use the mips_nan2008.
 	(mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
	(macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
	macros for R6.
	(mips_fix_adjustable): Make PC relative R6 relocations relative
	to the symbol and not the section.
 	* configure.ac: Add support for mips32r6 and mips64r6.
 	* configure: Regenerate.
 	* doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
 	options.
	* doc/as.texinfo: Likewise.

gas/testsuite/
	* gas/mips/24k-triple-stores-1.s: If testing for r6 prevent
	non-supported instructions from being tested.
	* gas/mips/24k-triple-stores-2.s: Likewise.
	* gas/mips/24k-triple-stores-3.s: Likewise.
	* gas/mips/24k-triple-stores-6.s: Likewise.
	* gas/mips/beq.s: Likewise.
	* gas/mips/eva.s: Likewise.
	* gas/mips/ld-zero-3.s: Likewise.
	* gas/mips/mips32-cp2.s: Likewise.
	* gas/mips/mips32.s: Likewise.
	* gas/mips/mips4.s: Likewise.
	* gas/mips/add.s: Don't test the add instructions if r6, and
	add padding.
	* gas/mips/add.d: Check for a triple dot not a nop at the end of the
	disassembly output.
	* gas/mips/micromips@add.d: Likewise.
	* gas/mips/mipsr6@24k-branch-delay-1.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-1.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-2.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-3.d: New file.
	* gas/mips/mipsr6@24k-triple-stores-6.d: New file.
	* gas/mips/mipsr6@add.d: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file.
	* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file.
	* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file.
	* gas/mips/mipsr6@beq.d: New file.
	* gas/mips/mipsr6@bge.d: New file.
	* gas/mips/mipsr6@bgeu.d: New file.
	* gas/mips/mipsr6@blt.d: New file.
	* gas/mips/mipsr6@bltu.d: New file.
	* gas/mips/mipsr6@branch-misc-1.d: New file.
	* gas/mips/mipsr6@branch-misc-2-64.d: New file.
	* gas/mips/mipsr6@branch-misc-2pic-64.d: New file.
	* gas/mips/mipsr6@branch-misc-4-64.d: New file.
	* gas/mips/mipsr6@cache.d: New file.
	* gas/mips/mipsr6@eva.d: New file.
	* gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file.
	* gas/mips/mipsr6@jal-svr4pic.d: New file.
	* gas/mips/mipsr6@ld-zero-2.d: New file.
	* gas/mips/mipsr6@ld-zero-3.d: New file.
	* gas/mips/mipsr6@loc-swap-dis.d: New file.
	* gas/mips/mipsr6@mips32-cp2.d: New file.
	* gas/mips/mipsr6@mips32-imm.d: New file.
	* gas/mips/mipsr6@mips32.d: New file.
	* gas/mips/mipsr6@mips32r2.d: New file.
	* gas/mips/mipsr6@mips4-fp.d: New file.
	* gas/mips/mipsr6@mips4-fp.l: New file.
	* gas/mips/mipsr6@mips4-fp.s: New file.
	* gas/mips/mipsr6@mips4.d: New file.
	* gas/mips/mipsr6@mips5-fp.d: New file.
	* gas/mips/mipsr6@mips5-fp.l: New file.
	* gas/mips/mipsr6@mips5-fp.s: New file.
	* gas/mips/mipsr6@mips64.d: New file.
	* gas/mips/mipsr6@msa-branch.d: New file.
	* gas/mips/mipsr6@msa.d: New file.
	* gas/mips/mipsr6@pref.d: New file.
	* gas/mips/mipsr6@relax-swap3.d: New file.
	* gas/mips/r6-64-n32.d: New file.
	* gas/mips/r6-64-n64.d: New file.
	* gas/mips/r6-64-removed.l: New file.
	* gas/mips/r6-64-removed.s: New file.
	* gas/mips/r6-64.s: New file.
	* gas/mips/r6-attr-none-double.d: New file.
	* gas/mips/r6-n32.d: New file.
	* gas/mips/r6-n64.d: New file.
	* gas/mips/r6-removed.l: New file.
	* gas/mips/r6-removed.s: New file.
	* gas/mips/r6.d: New file.
	* gas/mips/r6.s: New file.
	* gas/mips/mipsr6@mips32-dsp.d: New file.
	* gas/mips/mipsr6@mips32-dspr2.d: New file.
	* gas/mips/mipsr6@mips32r2-ill.l: New file.
	* gas/mips/mipsr6@mips32r2-ill.s: New file.
	* gas/mips/cache.s: Add r6 instruction varients.
	* gas/mips/mips.exp: Add support for the mips32r6 and mips64r6
	architectures.  Also prevent non r6 supported tests from running.
	Finally, add in support for running the new r6 tests.
	(run_dump_test_arch): Add support for mipsr6 tests.
	(run_list_test_arch): Add support for using files of the
	form arch@testname.l .

include/elf/
 	* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
 	R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
 	(E_MIPS_ARCH_32R6): New define.
 	(E_MIPS_ARCH_64R6): New define.

include/opcode/
 	* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
 	OP_CHECK_PREV and OP_NON_ZERO_REG.  Add descriptions for the MIPS R6
	instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
	 +I, +O, +R, +:, +\, +", +;
	(mips_check_prev_operand): New struct.
 	(INSN2_FORBIDDEN_SLOT): New define.
 	(INSN_ISA32R6): New define.
 	(INSN_ISA64R6): New define.
	(INSN_UPTO32R6): New define.
	(INSN_UPTO64R6): New define.
	(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
 	(ISA_MIPS32R6): New define.
 	(ISA_MIPS64R6): New define.
 	(CPU_MIPS32R6): New define.
 	(CPU_MIPS64R6): New define.
 	(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.

ld/
 	* ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6.

opcodes/
 	* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
 	mips64r6.
 	(parse_mips_dis_option): Allow MSA and virtualization support for
 	mips64r6.
 	(mips_print_arg_state): Add fields dest_regno and seen_dest.
 	(mips_seen_register): New function.
 	(print_insn_arg): Refactored code to use mips_seen_register
	function.  Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
	OP_NON_ZERO_REG.  Changed OP_REPEAT_DEST_REG case to print out
	the register rather than aborting.
 	(print_insn_args): Add length argument.  Add code to correctly
	calculate the instruction address for pc relative instructions.
	(validate_insn_args): New static function.
 	(print_insn_mips): Prevent jalx disassembling for r6.  Use
	validate_insn_args.
	(print_insn_micromips): Use validate_insn_args.
	all the arguments are valid.
	* mips-formats.h (PREV_CHECK): New define.
 	* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
 	-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
 	(RD_pc): New define.
 	(FS): New define.
 	(I37): New define.
 	(I69): New define.
 	(mips_builtin_opcodes): Add MIPS R6 instructions.  Exclude recoded
 	MIPS R6 instructions from MIPS R2 instructions.
2014-09-15 12:15:55 +01:00
DJ Delorie
599b6fb8a3 rl78.h (RL78_RELAXA_MASK): New. Relax types are enums, not bits 2014-08-26 17:01:04 -04:00
Barney Stratford
75f580857a Adds support for writing values to AVR system I/O registers.
* elf32-avr.c: Handle R_AVR_PORT5 and R_AVR_PORT6.
	* reloc.c: Add BFD_RELOC_AVR_PORT5 and BFD_RELOC_AVR_PORT6.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

	* avr.h: Add R_AVR_PORT5 and R_AVR_PORT6.

	* config/tc-avr.c (avr_operand): Permit referring to r26-r31 by
	name as [xyz][hl].  Permit using a symbol whoes name begins with
	`r' to refer to a register.
	Allow arbitrary expressions for the P and p operators.
	(md_apply_fix): Check the BFD_RELOC_AVR_PORT5 and
	BFD_RELOC_AVR_PORT6 relocations.
2014-07-07 16:15:19 +01:00
Barney Stratford
f36e88862f Add support for the AVR Tiny series of microcontrollers.
* archures.c: add avrtiny architecture for avr target.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): add avrtiny arch info.
	* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
	added for 16 bit LDS/STS instruction of avrtiny arch.
	(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
	BFD_RELOC_AVR_LDS_STS_16.
	(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
	(elf32_avr_object_p): set machine number for avrtiny arch.
	* libbfd.h: Regenerate.
	* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.

         * config/tc-avr.c (mcu_types): Add avrtiny arch.
	Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
	and attiny40.
	(md_show_usage): Add avrtiny arch in usage message.
	(avr_operand): validate and issue error for invalid register for avrtiny.
	add new reloc exp for 16 bit lds/sts instruction.
	(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
	(md_assemble): check ISA for arch and issue diagnostic.

	* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
	(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
	* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
	(AVR_ISA_2xxxa): define ISA without LPM.
	(AVR_ISA_AVRTINY): define avrtiny arch ISA.
	Add doc for contraint used in 16 bit lds/sts.
	Adjust ISA group for icall, ijmp, pop and push.
	Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
	* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
	(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
	is not avrtiny.

	* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
	(eavrtiny.c): add rules for avrtiny emulation source.
	* Makefile.in: Regenerate.
	* configure.tgt: Add avrtiny to avr target emulations.
	* scripttempl/avrtiny.sc: New file.
	linker script template for avrtiny arch.
	* emulparams/avrtiny.sh: New file.
	emulation parameters for avrtiny arch.
2014-07-01 10:20:17 +01:00
Christian Svensson
73589c9dbd Remove support for the (deprecated) openrisc and or32 configurations and replace
with support for the new or1k configuration.
2014-04-22 15:57:47 +01:00
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
Alan Modra
45965137be Support R_PPC64_ADDR64_LOCAL
This adds support for "func@localentry", an expression that returns the
ELFv2 local entry point address of function "func".  I've excluded
dynamic relocation support because that obviously would require glibc
changes.

include/elf/
	* ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
bfd/
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry.
	(ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL.
	(ppc64_elf_check_relocs): Likewise.
	(ppc64_elf_relocate_section): Likewise.
	* Add BFD_RELOC_PPC64_ADDR64_LOCAL.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
gas/
	* config/tc-ppc.c (ppc_elf_suffix): Support @localentry.
	(md_apply_fix): Support R_PPC64_ADDR64_LOCAL.
ld/testsuite/
	* ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files.
	* ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files.
	* ld-powerpc/powerpc.exp: Run new test.
elfcpp/
	* powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define.
gold/
	* powerpc.cc (Target_powerpc::Scan::local, global): Support
	R_PPC64_ADDR64_LOCAL.
	(Target_powerpc::Relocate::relocate): Likewise.
2014-03-05 19:57:39 +10:30
Andrew Pinski
d32e5c54ad binutils/ChangeLog:
2014-02-06  Andrew Pinski  <apinski@cavium.com>

	* readelf.c  (get_machine_flags): Handle E_MIPS_MACH_OCTEON3 case.

elfcpp/ChangeLog:
2014-02-06  Andrew Pinski  <apinski@cavium.com>

	* mips.h (E_MIPS_MACH_OCTEON3): New enum constant.

include/elf/ChangeLog:
2014-02-06  Andrew Pinski  <apinski@cavium.com>

	* mips.h (E_MIPS_MACH_OCTEON3): New machine flag.
2014-02-06 11:26:26 -08:00
Sandra Loosemore
1c2de46353 Nios II large-GOT relocations
2014-02-03  Sandra Loosemore  <sandra@codesourcery.com>

	include/elf/
	* nios2.h (R_NIOS2_GOT_LO, R_NIOS2_GOT_HA): New.
	(R_NIOS2_CALL_LO, R_NIOS2_CALL_HA): New.
	(R_NIOS2_ILLEGAL): Adjust.

	gas/
	* config/tc-nios2.c (md_apply_fix): Test for new relocs.
	(nios2_special_reloc): Add %call_lo, %call_hiadj, %got_lo,
	%got_hiadj relocation operators.  Sort table and add comment
	to explain ordering.
	(nios2_fix_adjustable): Test for new relocs.
	* doc/c-nios2.texi (Nios II Relocations): Document new relocation
	operators.

	bfd/
	* reloc.c (BFD_RELOC_NIOS2_GOT_LO, BFD_RELOC_NIOS2_GOT_HA): New.
	(BFD_RELOC_NIOS2_CALL_LO, BFD_RELOC_NIOS2_CALL_HA): New.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.
	* elf32-nios2.c (elf_nios2_howto_table_rel): Add new relocations.
	(nios2_reloc_map): Likewise.
	(GOT_USED, CALL_USED): Renamed from GOT16_USED and CALL16_USED.
	Fixed all references.
	(nios2_elf32_relocate_section): Add new relocations.
	(nios2_elf32_check_relocs): Likewise.
	(nios2_elf32_gc_sweep_hook): Likewise.
2014-02-03 08:42:42 -08:00
Sandra Loosemore
78058a5e4f Nios II CALL26 linker relaxation
2014-01-30  Sandra Loosemore  <sandra@codesourcery.com>

	bfd/
	* bfd-in2.h: Update from reloc.c.
	* elf32-nios2.c: Include elf32-nios2.h.
	(elf_nios2_howto_table_rel): Add entry for R_NIOS2_CALL26_NOAT.
	(nios2_reloc_map): Likewise.
	(enum elf32_nios2_stub_type): Declare.
	(struct elf32_nios2_stub_hash_entry): Declare.
	(nios2_stub_hash_entry, nios2_stub_hash_lookup): New macros.
	(struct elf32_nios2_link_hash_entry): Add hsh_cache field.
	(struct elf32_nios2_link_hash_table): Add new fields bstab,
	stub_bfd, add_stub_section, layout_sections_again, stub_group,
	bfd_count, top_index, input_list, all_local_syms.
	(nios2_call26_stub_entry): New.
	(nios2_elf32_install_imm16): Move up in file.
	(nios2_elf32_install_data): Move up in file.
	(hiadj): Move up in file.
	(stub_hash_newfunc): New.
	(link_hash_newfunc): Initialize hsh_cache field.
	(STUB_SUFFIX): New.
	(nios2_stub_name): New.
	(nios2_get_stub_entry): New.
	(nios2_add_stub): New.
	(nios2_elf32_setup_section_lists): New.
	(nios2_elf32_next_input_section): New.
	(CALL26_SEGMENT): New.
	(MAX_STUB_SECTION_SIZE): New.
	(group_sections): New.
	(nios2_type_of_stub): New.
	(nios2_build_one_stub): New.
	(nios2_size_one_stub): New.
	(get_local_syms): New.
	(nios2_elf32_size_stubs): New.
	(nios2_elf32_build_stubs): New.
	(nios2_elf32_do_call26_relocate): Correct CALL26 overflow test.
	(nios2_elf32_relocate_section): Handle R_NIOS2_CALL26_NOAT.  Add
	trampolines for R_NIOS2_CALL26 stubs.
	(nios2_elf32_check_relocs): Handle R_NIOS2_CALL26_NOAT.
	(nios2_elf32_gc_sweep_hook): Likewise.
	(nios2_elf32_link_hash_table_create): Initialize the stub hash table.
	(nios2_elf32_link_hash_table_free): New.
	(bfd_elf32_bfd_link_hash_table_free): Define.
	* elf32-nios2.h: New file.
	* libbfd.h: Update from reloc.c.
	* reloc.c (BFD_RELOC_NIOS2_CALL26_NOAT): New.

	gas/
	* config/tc-nios2.c (md_apply_fix): Handle BFD_RELOC_NIOS2_CALL26_NOAT.
	(nios2_assemble_args_m): Likewise.
	(md_assemble): Likewise.

	gas/testsuite/
	* gas/nios2/call26_noat.d: New.
	* gas/nios2/call26_noat.s: New.
	* gas/nios2/call_noat.d: New.
	* gas/nios2/call_noat.s: New.

	include/elf/
	* nios2.h (elf_nios2_reloc_type): Add R_NIOS2_CALL26_NOAT.

	ld/
	* Makefile.am (enios2elf.c, enios2linux.c): Update dependencies.
	* Makefile.in: Regenerated.
	* emulparams/nios2elf.sh (EXTRA_EM_FILE): Set.
	* emulparams/nios2linux.sh (EXTRA_EM_FILE): Set.
	* emultempl/nios2elf.em: New file.
	* gen-doc.texi (NIOSII): Set.
	* ld.texinfo (NIOSII): Set.

	ld/testsuite/
	* ld-nios2/relax_call26.s: New.
	* ld-nios2/relax_call26_boundary.ld: New.
	* ld-nios2/relax_call26_boundary.s: New.
	* ld-nios2/relax_call26_boundary_c8.d: New.
	* ld-nios2/relax_call26_boundary_cc.d: New.
	* ld-nios2/relax_call26_boundary_d0.d: New.
	* ld-nios2/relax_call26_boundary_d4.d: New.
	* ld-nios2/relax_call26_boundary_d8.d: New.
	* ld-nios2/relax_call26_boundary_dc.d: New.
	* ld-nios2/relax_call26_boundary_f0.d: New.
	* ld-nios2/relax_call26_boundary_f4.d: New.
	* ld-nios2/relax_call26_boundary_f8.d: New.
	* ld-nios2/relax_call26_boundary_fc.d: New.
	* ld-nios2/relax_call26_cache.d: New.
	* ld-nios2/relax_call26_cache.ld: New.
	* ld-nios2/relax_call26_cache.s: New.
	* ld-nios2/relax_call26_multi.d: New.
	* ld-nios2/relax_call26_multi.ld: New.
	* ld-nios2/relax_call26_norelax.d: New.
	* ld-nios2/relax_call26_shared.d: New.
	* ld-nios2/relax_call26_shared.ld: New.
2014-01-30 17:47:07 -08:00