Commit graph

3774 commits

Author SHA1 Message Date
Oleg Endo
93e6fe04cc Fix primary reason why the SH simulation hasn't been working on 64 bit hosts.
sim/sh/
	* interp.c (dmul): Split into dmul_s and dmul_u.  Use explicit integer
	width types and simplify implementation.
	* gencode.c (dmuls.l, dmulu.l): Use new functions dmul_s and dmul_u.
2016-04-10 11:02:47 +09:00
Oleg Endo
ba442f0f41 Move ChangeLog entries from sim/ChangeLog to sim/sh/ChangeLog. 2016-04-10 10:53:20 +09:00
Oleg Endo
417a667c4a Adjust default memory size and stack base address for SH simulator.
ld/ChangeLog:
	* sh/interp.c (sim_memory_size): Default init to 30.
	(parse_and_set_memory_size): Adjust upper bound to 31.

sim/ChangeLog:
	* sh/interp.c (sim_memory_size): Default init to 30.
	(parse_and_set_memory_size): Adjust upper bound to 31.
2016-04-09 10:24:00 +09:00
Nick Clifton
67f101eece Ignore DWARF debug information with a version of 0 - assume that it is padding.
PR 19872
bfd	* dwarf2.c (parse_comp_unit): Skip warning about unrecognised
	version number if the version is zero.

bin	* dwarf.c (display_debug_aranges): Skip warning about unrecognised
	version number if the version is zero.
2016-04-04 12:53:33 +01:00
Nick Clifton
7517e550ce Fix more bugs in AArch64 simulator.
* cpustate.c (aarch64_set_reg_s32): New function.
	(aarch64_set_reg_u32): New function.
	(aarch64_get_FP_half): Place half precision value into the correct
	slot of the union.
	(aarch64_set_FP_half): Likewise.
	* cpustate.h: Add prototypes for aarch64_set_reg_s32 and
	aarch64_set_reg_u32.
	* memory.c (FETCH_FUNC): Cast the read value to the access type
	before converting it to the return type.  Rename to FETCH_FUNC64.
	(FETCH_FUNC32): New macro.  Duplicates FETCH_FUNC64 but for 32-bit
	accesses.  Use for 32-bit memory access functions.
	* simulator.c (ldrsb_wb): Use sign extension not zero extension.
	(ldrb_scale_ext, ldrsh32_abs, ldrsh32_wb): Likewise.
	(ldrsh32_scale_ext, ldrsh_abs, ldrsh64_wb): Likewise.
	(ldrsh_scale_ext, ldrsw_abs): Likewise.
	(ldrh32_abs): Store 32 bit value not 64-bits.
	(ldrh32_wb, ldrh32_scale_ext): Likewise.
	(do_vec_MOV_immediate): Fix computation of val.
	(do_vec_MVNI): Likewise.
	(DO_VEC_WIDENING_MUL): New macro.
	(do_vec_mull): Use new macro.
	(do_vec_mul): Use new macro.
	(do_vec_MLA): Read values before writing.
	(do_vec_xtl): Likewise.
	(do_vec_SSHL): Select correct shift value.
	(do_vec_USHL): Likewise.
	(do_scalar_UCVTF): New function.
	(do_scalar_vec): Call new function.
	(store_pair_u64): Treat reads of SP as reads of XZR.
2016-03-30 10:29:04 +01:00
Nick Clifton
ef0d8ffc45 Tidy up AArch64 simulator code.
* cpustate.c: Remove space after asterisk in function parameters.
	* decode.h (greg): Delete unused function.
	(vreg, shift, extension, scaling, writeback, condcode): Likewise.
	* simulator.c: Use INSTR macro in more places.
	(HALT_NYI): Use sim_io_eprintf in place of fprintf.
	Remove extraneous whitespace.
2016-03-29 11:34:22 +01:00
Nick Clifton
5ab6d79e70 More AArch64 simulator improvements.
* cpustate.c (aarch64_get_FP_half): New function.  Read a vector
	register as a half precision floating point number.
	(aarch64_set_FP_half): New function.  Similar, but for setting
	a half precision register.
	(aarch64_get_thread_id): New function.  Returns the value of the
	CPU's TPIDR register.
	(aarch64_get_FPCR): New function.  Returns the value of the CPU's
	floating point control register.
	(aarch64_set_FPCR): New function.  Set the value of the CPU's FPCR
	register.
	* cpustate.h: Add prototypes for new functions.
	* sim-main.h (struct _sim_cpu): Add FPCR and tpidr fields.
	* memory.c: Use unaligned core access functions for all memory
	reads and writes.
	* simulator.c (HALT_NYI): Generate an error message if tracing
	will not tell the user why the simulator is halting.
	(HALT_UNREACHABLE): Delete.  Delete (unneeded) uses of the macro.
	(INSTR): New time-saver macro.
	(fldrb_abs): New function.  Loads an 8-bit value using a scaled
	offset.
	(fldrh_abs): New function.  Likewise for 16-bit values.
	(do_vec_SSHL): Allow for negative shift values.
	(do_vec_USHL): Likewise.
	(do_vec_SHL): Correct computation of shift amount.
	(do_vec_SSHR_USHR): Correct decision of signed vs unsigned
	shifts and computation of shift value.
	(clz): New function.  Counts leading zero bits.
	(do_vec_CLZ): New function.  Implements CLZ (vector).
	(do_vec_MOV_element): Call do_vec_CLZ.
	(dexSimpleFPCondCompare): Implement.
	(do_FCVT_half_to_single): New function.  Implements one of the
	FCVT operations.
	(do_FCVT_half_to_double): New function.  Likewise.
	(do_FCVT_single_to_half): New function.  Likewise.
	(do_FCVT_double_to_half): New function.  Likewise.
	(dexSimpleFPDataProc1Source): Call new FCVT functions.
	(do_scalar_SHL): Handle negative shifts.
	(do_scalar_shift): Handle SSHR.
	(do_scalar_USHL): New function.
	(do_double_add): Simplify to just performing a double precision
	add operation.  Move remaining code into...
	(do_scalar_vec): ... New function.
	(dexLoadUnsignedImmediate): Call new fldrb_abs and fldrh_abs
	functions.
	(system_get): Add support for TPIDR, CTR, FPCR, FPSR and CPSR
	registers.
	(system_set): New function.
	(do_MSR_immediate): New function.  Stub for now.
	(do_MSR_reg): New function.  Likewise. Partially implements MSR
	instruction.
	(do_SYS): New function.  Stub for now,
	(dexSystem): Call new functions.
2016-03-23 17:37:30 +00:00
Nick Clifton
87bba7a5e0 Fix thinko in new GET_VEC_ELEMENT macro.
* cpustate.c: (GET_VEC_ELEMENT): And fix thinko using macro arguments.
2016-03-18 17:08:27 +00:00
Nick Clifton
4c0ca98e58 Fix code to check for illegal element numbers when accessing AArch64 vector registers in AArch64 sim.
* cpustate.c (GET_VEC_ELEMENT): Fix off by one error checking
	for an invalid element index.
	(SET_VEC_ELEMENT): Likewise.
2016-03-18 14:46:42 +00:00
Nick Clifton
e101a78be9 Add simulation of MUL and NEG instructions to AArch64 simulator.
* cpustate.c: Remove spurious spaces from TRACE strings.
	Print hex equivalents of floats and doubles.
	Check element number against array size when accessing vector
	registers.
	* memory.c: Trace memory reads when --trace-memory is enabled.
	Remove float and double load and store functions.
	* memory.h (aarch64_get_mem_float): Delete prototype.
	(aarch64_get_mem_double): Likewise.
	(aarch64_set_mem_float): Likewise.
	(aarch64_set_mem_double): Likewise.
	* simulator (IS_SET): Always return either 0 or 1.
	(IS_CLEAR): Likewise.
	(fldrs_pcrel): Load and store floats using 32-bit memory accesses
	and doubles using 64-bit memory accesses.
	(fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
	(fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
	(fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
	(fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
	(store_pair_double, load_pair_float, load_pair_double): Likewise.
	(do_vec_MUL_by_element): New function.
	(do_vec_op2): Call do_vec_MUL_by_element.
	(do_scalar_NEG): New function.
	(do_double_add): Call do_scalar_NEG.
2016-03-18 09:32:32 +00:00
Nick Clifton
57aa174243 Fix bugs in the simulation of the AArch64's ADDP, FADDP, LD1, CCMP and CCMP instructions.
* simulator.c (set_flags_for_sub32): Correct type of signbit.
	(CondCompare): Swap interpretation of bit 30.
	(DO_ADDP): Delete macro.
	(do_vec_ADDP): Copy source registers before starting to update
	destination register.
	(do_vec_FADDP): Likewise.
	(do_vec_load_store): Fix computation of sizeof_operation.
	(rbit64): Fix type of constant.
	(aarch64_step): When displaying insn value, display all 32 bits.
2016-03-03 15:22:53 +00:00
Mike Frysinger
1554f75841 sim: mips: fix prog_bfd usage
We do not want to reference the "base" member directly.  We have the
STATE_PROG_BFD macro instead to look up the prog_bfd member.
2016-02-05 20:27:25 -05:00
Nick Clifton
13754e4c3d Prevent possible undefined behaviour computing the size of the scache by usingunsigned integers instead of signed integers.
* cgen-scache.c (scache_option_handler): Prevent possible
	undefined behaviour computing the size of the scache by using
	unsigned integers instead of signed integers.
2016-02-04 16:27:06 +00:00
Maciej W. Rozycki
3b8f2c8bcf MAINTAINERS: Add Thiemo Seufer back, as a past maintainer
Complement commit 26e0f8dbd8 ("* MAINTAINERS: Remove Thiemo Seufer.").

	* MAINTAINERS (Past sim maintainers): Add Thiemo Seufer.
2016-02-03 18:26:50 +00:00
Andrew Bennett
3d304f48ca MIPS: Only build microMIPS specific simulator functions if microMIPS support is required.
This fixes PR sim/19441.  In the MIPS simulator the microMIPS
functions in micromips.igen were not predicated on the microMIPS
models.  This was causing build issues for some target triples.
This patch sets all the microMIPS specific functions to only be built if
the micromips32, micromips64 or micromipsdsp models are used.

	PR sim/19441
	* micromips.igen (delayslot_micromips): Enable for `micromips32',
	`micromips64' and `micromipsdsp' only.
	(process_isa_mode): Enable for `micromips32' and `micromips64' only.
	(do_micromips_jalr, do_micromips_jal): Likewise.
	(compute_movep_src_reg): Likewise.
	(compute_andi16_imm): Likewise.
	(convert_fmt_micromips): Likewise.
	(convert_fmt_micromips_cvt_d): Likewise.
	(convert_fmt_micromips_cvt_s): Likewise.
	(FMT_MICROMIPS): Likewise.
	(FMT_MICROMIPS_CVT_D): Likewise.
	(FMT_MICROMIPS_CVT_S): Likewise.
2016-01-18 21:50:00 +00:00
Joel Brobecker
f749ed6079 Minor comment fixes in sim/common/sim-fpu.c.
This patch makes a fair number of fixes in the various comments of
sim-fpu.c, mostly to either better conform to the GNU Coding Standards
(sentences start with a capital letter, end with a period), or to
fix spelling mistakes.

sim/common/ChangeLog:

        * sim-fpu.c: Minor comment fixes throughout.
2016-01-17 09:34:29 +04:00
Joel Brobecker
3c8e93b7fa minor reformatting in sim/common/sim-fpu.c.
This patch just makes a copy of formatting changes to better conform
with the GNU Coding Style.

sim/common/ChangeLog:

        * sim-fpu.c (print_bits): Minor reformatting (no code change).
        (sim_fpu_map): Likewise.
2016-01-17 09:33:49 +04:00
Mike Frysinger
b36d953bce sim: mips: workaround 32-bit addr sign extensions
The mips bfd will sign extend 32-bit addresses into 64-bit values,
so if the entry happens to be 0x80000000 or higher, it is turned to
0xffffffff80000000 which points to memory that doesn't exist.

This wasn't an issue until commit 26f8bf63bf
as all addresses were automatically truncated there in the translate
function to 32-bits.  When we cleaned up that code, the full 64-bits
were checked leading to many test failures for mips-sde-elf targets
and such.
2016-01-12 01:42:22 -05:00
Mike Frysinger
34ac507d94 sim: config: do not try to align settings
We try to align the output for a few settings, but not most of them.
Drop the aligning entirely to be lazy.
2016-01-11 00:58:55 -05:00
Mike Frysinger
ce39bd3890 sim: move many common settings from CPPFLAGS to config.h
Rather than stuffing the command line with a bunch of -D flags, start
moving things to config.h which is managed by autoheader.  This makes
the makefile a bit simpler and the build output tighter, and it makes
the migration to automake easier as there are fewer vars to juggle.

We'll want to move the other options out too, but it'll take more work.
2016-01-10 18:54:41 -05:00
Mike Frysinger
e19418e02e sim: drop unused SIM_AC_OPTION_PACKAGES
This was imported from the ppc sim, but that was only used to control
a single file, and that is already governed by the hw models.  There's
no need to have a sep configure option here, especially since none of
the other sims are using it.  Even when the code is enabled, there's
no runtime overhead.
2016-01-10 17:54:04 -05:00
Mike Frysinger
16f7876d71 sim: allow the environment configure option everywhere
Currently ports have to call SIM_AC_OPTION_ENVIRONMENT explicitly in
order to make the configure flag available.  There's no real reason
to not allow this flag for all ports, so move it to the common sim
macro.  This way we get standard behavior across all ports too.
2016-01-10 17:03:36 -05:00
Mike Frysinger
35656e9521 sim: allow the assert configure option everywhere
Currently ports have to call SIM_AC_OPTION_ASSERT explicitly in order
to make the configure flag available, which none of them do.  There's
no real reason to not allow this flag for all ports, so move it to the
common sim macro.  This way we get standard behavior across all ports.
2016-01-10 16:13:13 -05:00
Mike Frysinger
99d8e87993 sim: drop targ-vals.def->nltvals.def indirection
We don't have alternative nltvals.def files, so always symlinking
the targ-vals.def file to it doesn't gain us anything.  It does
make the build more complicated though and a pain to convert to
something newer (like automake).  Drop the symlinking entirely.

In the future, we'll want to explode this file anyways into the
respective arch dirs so things can be selected dynamically at
runtime, so it's not like we'll be bringing this back.
2016-01-10 04:01:16 -05:00
Mike Frysinger
6d90347b5d sim: mips: drop SIM_AC_OPTION_SMP call
No other port calls this macro directly, and mips has it hardcoded
to the default -- disabling smp.  In the future we'll enable this
for all targets in common code, so tidy up the mips code now.
2016-01-10 03:42:06 -05:00
Mike Frysinger
347fe5bb86 sim: allow the inline configure option everywhere
Currently ports have to call SIM_AC_OPTION_INLINE explicitly in order
to make the configure flag available.  There's no real reason to not
allow this flag for all ports, so move it to the common sim macro.
This way we get standard behavior across all ports too.
2016-01-10 03:36:32 -05:00
Mike Frysinger
0dc73ef7c3 sim: drop --enable-sim-{regparm,stdcall} options
These options were never exposed for most sims (just the ppc one),
and they are really only useful on 32-bit x86 systems.  Considering
modern systems tend to be 64-bit x86_64 and how well modern compilers
are at optimizing code, these have outlived their usefulness.
2016-01-10 03:15:01 -05:00
Mike Frysinger
22be3fbeac sim: drop --enable-sim-cflags option
No other sub directory provides such a configuration option, so
drop it from the sim dir as well.  This cleans up a good bit of
code in the process.

If people want to use custom flags for just the sim, they can
still run configure+make by hand in the sim subdir and use the
normal CFLAGS settings.
2016-01-10 02:54:59 -05:00
Mike Frysinger
5295724cdc sim: stop configuring common subdir
Now that cconfig.h doesn't exist, there's no need to build in the common
subdir anymore.  We leave the configure/Makefile files in there as there
is a helper for developers to generate the nltvals.def file.  Once that
gets cleaned up in the future though, we can drop the build logic too.
2016-01-09 03:52:30 -05:00
Mike Frysinger
936df7568a sim: drop common/cconfig.h in favor of a single config.h
The common subdir sets up a cconfig.h file to hold checks for the common
code.  In practice, most files still end up using config.h instead which
just leads to confusion.

Merge all the configure checks that went into cconfig.h into SIM_AC_COMMON
so we can drop the cconfig.h file altogether.  Now there is only a single
config.h file like normal.
2016-01-09 03:52:30 -05:00
Mike Frysinger
b900245c3b sim: config: drop use of __DATE__/__TIME__
These don't add a whole lot of useful info, and people don't like them as
it makes builds unreproducible, so just drop them.
2016-01-06 21:52:57 -05:00
Mike Frysinger
2e3d4f4d5d sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly
2016-01-03  Mike Frysinger  <vapier@gentoo.org>

	* sim-options.c (sim_parse_args): Mark argv array const.
	* sim-options.h (sim_parse_args): Likewise.
2016-01-06 21:48:59 -05:00
Joel Brobecker
6847703472 Change copyright owner to FSF in sim/testsuite/sim/mips/hilo-hazard-4.s
sim/testsuite/sim/mips/ChangeLog:

        * hilo-hazard-4.s: Change copyright ownder to FSF.
2016-01-06 09:41:15 +04:00
Mike Frysinger
402cf05346 sim: msp430: drop duplicate sim_load_file call
There's no need, or desire, to call sim_load_file from sim_open.  The
higher levels (gdb/run) take care of calling sim_load for us already.
2016-01-05 14:37:46 -05:00
Mike Frysinger
1a846c6262 sim: aarch64: switch to common disassembler tracing
The output should largely be the same.
2016-01-05 14:37:46 -05:00
Mike Frysinger
824c862804 sim: bfin: add support disasm tracing 2016-01-05 14:37:45 -05:00
Mike Frysinger
70d3944832 sim: msp430: switch to common disassembler tracing
The output format is a bit different, but the new form matches all the
other trace lines.  Otherwise, it should be functionally equivalent.
2016-01-05 14:37:33 -05:00
Mike Frysinger
bfb2629c16 sim: trace: add support for disassembling
Some targets have started to add support for calling the disassembler
automatically when executing code.  Add support for that directly into
the trace core.
2016-01-05 14:28:37 -05:00
Nick Clifton
4eb70007f1 Add myself as the maintainer for the AArch64. 2016-01-05 16:49:26 +00:00
Nick Clifton
296ebfbb91 Fix the execution of the MSP430 simulator testsuite.
ld	* emulparams/msp430elf.sh (RAM_START): Move to 0x500 - above the
	MSP430 hardware multiply address range.
	* scripttempl/elf32msp430.sc (__romdatastart): Define.
	(__romdatacopysize): Define.
	* scripttempl/elf32msp430_3.sc: Likewise.

tests	* testutils.inc (__pass): Use the LMA addresses of the _passmsg
	symbol.
	(__fail): Likewise.
2016-01-05 16:43:58 +00:00
Mike Frysinger
44ddb0c66a sim: use STATE_MAGIC helper 2016-01-04 23:01:14 -05:00
Mike Frysinger
bc273e1751 sim: unify min/max macros
Import defines from gdb/defs.h to the sim core so we can delete the
various copies that already exist.
2016-01-04 22:24:03 -05:00
Tristan Gingold
ac8eefeb24 sim: aarch64: drop syscall.h include to fix build
The simulator is including syscall.h which is not standard and apparently
not required (builds correctly without it on my machine).
2016-01-04 20:09:24 -05:00
Mike Frysinger
8d7d784e23 sim: parse_args: polish getopt error message
The cris sim hit a few failures after the recent getopt logic, and the
expected output showed a few ways we can improve things to better match
other utils.
2016-01-04 05:08:26 -05:00
Mike Frysinger
9bbf6f91c6 sim: punt x86-specific bswap logic
The compiler/C library should produce reasonable code for htonl/ntohl,
and at least glibc tries pretty hard to always produce good code for
them.  This logic only had support for 32-bit x86 systems anymore, and
it's unlikely people were even opting into this, so drop it all.
2016-01-04 05:04:30 -05:00
Mike Frysinger
13adda68c5 sim: d10v: gut endian logic
The compiler should produce reasonable code here in general, so punt the
various arch checks and bswap defines.  This code will eventually go away
entirely when we convert it to the common memory code.
2016-01-04 05:04:04 -05:00
Mike Frysinger
77cf2ef5dc sim: parse_args: display getopt error ourselves
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed.  Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
2016-01-03 22:07:39 -05:00
Mike Frysinger
3726f72c65 sim: TODO: move to wiki
We're maintaining development docs in the wiki now:
	https://sourceware.org/gdb/wiki/Sim/TODO
2016-01-03 19:54:25 -05:00
Mike Frysinger
61971b86bb sim: clean up some more device detritus
Clean up some more remains of WITH_DEVICES that escaped notice.

We also clean up GETTWI/SETTWI defines in a few ports where they
were copied & pasted and are unused as they happen to be near the
device code.
2016-01-03 04:23:10 -05:00
Mike Frysinger
34fed69938 sim: use libiberty countargv in more places
A bunch of places open code the countargv implementation, or outright
duplicate it (as count_argc).  Replace all of those w/countargv.
2016-01-03 04:08:56 -05:00