any given register table.
(register_name): Pass appropriate table and size to reg_name_search.
(system_register_name): New function.
(SYSREG_NAME_CNT): Define.
(md_assemble): Handle operands which are system registers.
Still working on the parser..
opcode doesn't want a register, then we don't have a match.
(md_assemble): Get size of the instruction from the opcode table.
So we choose the right opcode and so that we get the sizes right.
Add support for openVMS/Alpha.
* as.h (PRINTF_LIKE): Don't define if VMS, for now.
* config/obj-evax.c: New file.
* config/obj-evax.h: New file.
* config/tc-alpha.c: Add support for EVAX format if OBJ_EVAX is
defined.
* config/tc-alpha.h: Add support for EVAX format if OBJ_EVAX is
defined. Add case for bfd_target_evax_flavour.
* config/vms-a-conf.h: New file.
* conf-a-gas.com: New file.
* configure.in: Add target alpha-*-*vms*.
* configure: Rebuild.
* makefile.vms: New file.
* read.c (s_lcomm): Align bss_seg on 8 byte boundary if OBJ_EVAX.
Don't call ffs on openVMS/Alpha.
#ifndef OBJ_ELF lines. From Eric Valette <valette@crf.canon.fr>.
(tc_gen_reloc): If out of memory call as_fatal rather than
assert. If no howto found, call as_bad_where rather than
as_fatal. Change the error message slightly. Set howto to a
non-NULL value in order to keep going.
* config/tc-arm.c: Changed INSN_SIZE to variable insn_size, as
pre-cursor to adding Thumb support. Also added cpu_variant flag
information to each of the asm_flg structures.
(md_parse_option): Updated ARM7 parsing to allow 't' for
thumb/halfword support, aswell as 'm' for long multiply.
(md_show_usage): Updated help message.
(md_assemble): Check that instruction flags are applicated to the
current cpu variant.
(md_apply_fix3, tc_gen_reloc): Add BFD_RELOC_ARM_OFFSET_IMM8 and
BFD_RELOC_ARM_HWLITERAL relocation support for new halfword and
signextension instructions.
(do_ldst): Generate halfword and signextension variants if
mnemonic flags match.
(ldst_extend): Do not allow shifts in the offset field of halfword
or signextension instructions.
(validate_offset_imm): Provide check on halfword and signextension
immediate range.
(add_to_lit_pool): Merge identical literal pool values.
Wed Jul 31 15:55:12 1996 James G. Smith <jsmith@cygnus.co.uk>
* gas/arm/arm7t.s: Added.
* gas/arm/arm7t.d: Added.
* gas/arm/arm.exp: Updated to run the new test.
(cons_fix_new_hppa): Don't coke on e_esel.
(tc_gen_reloc, SOM version): Handle R_COMP2 when used
to help generate exception handling tables.
(md_apply_fix): Don't try to apply fixups with an e_esel
selector.
(hppa_fix_adjustable): Fixups with e_esel selectors
are not adjustable.
Another stab at EH on the PA.
* tc-d10v.c: Fix packaging bug. Added range checking.
Added kludge for divs instruction. Fixed minor problem with
multiple text sections.
* tc-d10v.h (d10v_cleanup): Change prototype.
Tue Jul 23 10:49:36 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* config/tc-d10v.c (md_apply_fix3): Fix all instruction
addresses to be right-shifted by 2.
end-sanitize-d10v
Mon Jul 22 11:32:36 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* config/tc-d10v.c: Many changes to get relocs working.
(register_name): No longer creates a symbol for register names.
(pre_defined_registers): moved to opcodes/d10v-opc.c.
(d10v_insert_operand): Now works correctly for either container.
* config/tc-d10v.h (d10v_cleanup): Declare.
end-sanitize-d10v
* tc-alpha.c: Patches to track current minimum alignment to reduce
the number of fragments created with frag_align.
(alpha_current_align): New static variable.
(s_alpha_text): Reset alignment to 0.
(s_alpha_data, s_alpha_rdata, s_alpha_sdata): Likewise.
(s_alpha_stringer, s_alpha_space): New functions.
(s_alpha_cons, alpha_flush_pending_output): Remove functions.
(alpha_cons_align): New function to replace both of them.
(emit_insn): Only align if alpha_current_align is less than 2;
reset alpha_current_align to 2.
(s_alpha_gprel32): Likewise.
(s_alpha_section): New function. Basically duplicate the other
alpha section change hooks. Only define for ELF.
(s_alpha_float_cons): Simplify alignment handling.
(md_pseudo_table): Only define "rdata" and "sdata" if OBJ_ECOFF.
If OBJ_ELF, define "section", "section.s", "sect", and "sect.s".
Don't define the s_alpha_cons pseudo-ops. Do define
s_alpha_stringer and s_alpha_space pseudo-ops.
(alpha_align): Skip if less than current default alignment. Set
default alignment.
* tc-alpha.h (md_flush_pending_output): Remove.
(md_cons_align): Add.
* tc-alpha.c: Add oodles of function description comments.
(md_bignum_to_chars): Remove; there are no callers.
(md_show_usage): Mention some more variants.
uaxword to use s_uacons.
(sparc_no_align_cons): New static variable.
(s_uacons): New static function.
(sparc_cons_align): If sparc_no_align_cons is set, just clear it
and return.
Wed Jul 17 14:25:13 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* config/tc-d10v.c: New file.
* config/tc-d10v.h: New file.
* configure (d10v-*-elf): New target.
* configure.in (d10v-*-elf): New target.
end-sanitize-d10v
* config/tc-alpha.c (alpha_align): Change fill parameter
to a pointer. Take NULL as 0 or nop depending on section. Change
all callers.
(s_alpha_align): Rename local variables.
* doc/as.texinfo (.align): Document action of omitted
fill parameter.
if fx_pcrel is set. Correct setting the addend case in the
OBJ_ELF case (from Andreas Schwab
<schwab@issan.informatik.uni-dortmund.de>).
(md_show_usage): Correct -mfc5200 to -m5200.
* config/tc-mips.c: Added cop_interlocks, to avoid NOP insertion
between co-processor comparisons and branches for the VR4300.
The preliminary documentation was slightly unclear on this issue, but
NEC have confirmed that there is an interlock within the CPU.
* configure.in: Add alpha-*-linuxecoff* target. Use elf for
alpha-*-linux* target. Force bfd_gas for alpha-*. Require
opcodes library for alpha.
* configure: Rebuild with autoconf 2.10.
* config/tc-alpha.c: Substantial rewrite to add ELF support and
use new opcode table.
* config/tc-alpha.h (md_undefined_symbol): Don't define.
(LOCAL_LABEL): Define differently if OBJ_ELF.
(FAKE_LABEL_NAME): Define if OBJ_ELF.
* config/alpha-opcode.h: Remove.
* config/obj-elf.h: If TC_ALPHA, define ECOFF_DEBUGGING.
* Makefile.in (TARG_CPU_DEP_alpha): Depend upon
include/opcode/alpha.h rather than config/alpha-opcode.h.
* config/tc-i386.h (md_number_to_chars): New macro.
* config/tc-alpha.c (build_operate_n, build_mem): Moved earlier in the file.
(load_symbol_address, load_expression): Use build_mem.
(build_operate): New function.
(emit_addq_r): Use it.
Wed Mar 13 22:14:14 1996 Pat Rankin <rankin@eql.caltech.edu>
* symbols.c (colon): #if VMS, use S_SET_OTHER to store `const_flag'.
Tue Mar 5 14:31:45 1996 Pat Rankin <rankin@eql.caltech.edu>
* config/tc-vax.h (NOP_OPCODE): Define.
Sun Feb 4 21:01:03 1996 Pat Rankin <rankin@eql.caltech.edu>
* config/obj-vms.h (S_IS_COMMON): Define.
(S_IS_LOCAL): Check for \002 as well as \001.
(LONGWORD_ALIGNMENT): New macro.
(SUB_SEGMENT_ALIGN): Use it.
Fri Jan 26 17:44:09 1996 Pat Rankin <rankin@eql.caltech.edu>
* config/vms-conf.h: Reconcile with conf.in.
(build_bytes): Likewise.
(skip_colonthing): Handle :32 suffix.
(get_specific): Promote L_24 to L_32 if it makes a match.
Don't always promote L_8 to L_16.
(do_a_fix_imm): Clean up L_32 and L_24 handling.
H8/S related stuff that doesn't need to be sanitized.
start-sanitize-h8s
* config/tc-h8300.c (Smode): New variable.
(h8300hmode): Turn off Hmode.
(h8300smode): New function. Turn on Smode and Hmode.
(md_pseudo_table): New ".h8300s" pseudo-op.
(parse_reg): Handle "exr" register.
(get_operand): Handle bizarre syntax for "stm.l" and "ldm.l".
Handle "mach" and "machl" operands for ldmac.
(get_specific): Handle "stm.l" and "ldm.l".
(build_bytes): Handle "stm.l" and "ldm.l"; handle MACREG operands.
* config/tc-h8300.h (COFF_MAGIC): Handle H8/S magic number.
(Smode): Declare.
end-sanitize-h8s
Sanitized H8/S stuff until we know its status.
