(read_a_source_file): Pass the beginning of the symbol through
the new argument of TC_START_LABEL.
* config/tc-arm.h (TC_START_LABEL): Add a new argument.
* config/tc-bfin.c (bfin_start_label): Only search '(' and '['
from the beginning of the symbol.
* config/tc-bfin.h (TC_START_LABEL): Add the new argument.
* config/tc-d30v.h (TC_START_LABEL): Likewise.
* config/tc-fr30.h (TC_START_LABEL): Likewise.
* config/tc-m32c.h (TC_START_LABEL): Likewise.
* config/tc-m32r.h (TC_START_LABEL): Likewise.
* config/tc-mep.h (TC_START_LABEL): Likewise.
testsuite/
* gas/bfin/stack2.s: Add pop multiple instruction with a label
on the same line.
* gas/bfin/stack2.d: Adjust accordingly.
* config/tc-arm.c (do_t_mov_cmp): Do not silently ignore shifted
operands.
* gas/arm/t16-bad.l: Update expected messages for moves with
shifted operands.
* config/tc-arm.c (marked_pr_dependency, mapstate): Delete global
variables.
(mapping_state): Use the section's mapstate.
(mapping_state_2): Likewise. Skip special sections.
(s_arm_unwind_fnend): Use the section's marked_pr_dependency.
(arm_elf_change_section): Do not set deleted globals.
* config/tc-arm.h (struct arm_segment_info_type): Document
marked_pr_dependency.
gas/testsuite/
* gas/arm/mapping2.s: Test code after .ident.
* binutils-all/arm/thumb2-cond.s: Use instructions instead of
.short.
gas/
* config/obj-elf.c (obj_elf_ident): Notify section change to the hook.
* config/tc-arm.c (make_mapping_symbol): New function, from
mapping_state. Save mapping symbols in the frag.
(insert_data_mapping_symbol): New.
(mapping_state): Use make_mapping_symbol, improve state transitions.
(mapping_state_2): New. Provide dummy definition.
(opcode_select): Do not call mapping_state.
(s_bss): Call md_elf_section_change_hook instead of mapping_state.
(output_inst): Update use of tc_frag_data.
(new_automatic_it_block): Call mapping_state before emitting the
IT instruction.
(md_assemble): Move mapping_state to just before outputting the
new instruction.
(arm_handle_align): Update use of tc_frag_data.
Call insert_data_mapping_symbol.
(arm_init_frag): Update use of tc_frag_data. Call
mapping_state_2.
(arm_elf_change_section): Always update the mapping symbol FSM state.
(check_mapping_symbols): New function.
(arm_adjust_symtab): Use check_mapping_symbols.
* config/tc-arm.h (struct arm_frag_type): New.
(TC_FRAG_TYPE): Change to struct arm_frag_type.
(TC_FRAG_INIT): Pass max_chars.
(arm_init_frag): Update prototype.
gas/testsuite/
* gas/arm/mapdir.d, gas/arm/mapdir.s: New files.
* gas/arm/mapping.d: Adapted to new symbols generation.
* gas/arm/mapping2.d: New test case.
* gas/arm/mapping2.s: New file.
* gas/arm/mapping3.d: New test case.
* gas/arm/mapping3.s: New file.
* gas/arm/mapping4.d: New test case.
* gas/arm/mapping4.s: New file.
* gas/arm/mapshort-eabi.d: Adapted to new symbols generation.
* gas/elf/section2.e-armeabi: Adapted to new symbols generation.
2009-07-27 Jan Beulich <jbeulich@novell.com>
* obj-elf.c (elf_file_symbol): Replace symbol name set up by
symbol_new() with the passed in, unmodified one.
gas/testsuite/
2009-07-27 Jan Beulich <jbeulich@novell.com>
* gas/elf/file.[ds]: New.
* gas/elf/elf.exp: Run new test.
gnu_unique_object.
* doc/as.texinfo: Document new feature of .type directive.
* NEWS: Mention support for gnu_unique_object symbol type.
* common.h (STB_GNU_UNIQUE): Define.
* NEWS: Mention the linker's support for symbols with a binding of
STB_GNU_UNIQUE.
* gas/elf/type.s: Add unique global symbol definition.
* gas/elf/type.e: Add expected readelf output for global unique
symbol.
* elfcpp.h (enum STB): Add STB_GNU_UNIQUE.
* readelf.c (get_symbol_binding): For Linux targeted files return
UNIQUE for symbols with the STB_GNU_UNIQUE binding.
* doc/binutils.texi: Document the meaning of the 'u' symbol
binding in the output of nm and objdump --syms.
* elf-bfd.h (struct elf_link_hash_entry): Add unique_global field.
* elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols
with the BSF_GNU_UNIQUE flag bit set.
* elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag
for symbols with STB_GNU_UNIQUE binding.
* elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols
with the STB_GNU_UNIQUE binding.
(elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for
symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for
symbols with the unique_global field set.
(elf_link_output_extsym): Set unique_global field for symbols with
the STB_GNU_UNIQUE binding.
* syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit.
(bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE
symbols.
(bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE
symbols.
* bfd-in2.h: Regenerate.
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* config/tc-i386.c (i386_align_code): Tune for 32bit nops in
64bit.
(i386_target_format): Set cpu_arch_isa_flags.bitfield.cpulm
for 64bit.
gas/testsuite/
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* gas/i386/i386.exp: Run x86-64-nops-1-pentium.
* gas/i386/x86-64-nops-1-pentium.d: New.
(MAX_MEM_FOR_RS_ALIGN_CODE): Define in terms of
MAX_MEM_ALIGNMENT_BYTES.
* config/tc-arm.c (arm_frag_align_code): Replace hard coded
constant with MAX_MEM_FOR_RS_ALIGN_CODE.
* gas/arm/align64.s: New test case.
* gas/arm/align64.d: Expected disassembly.
* config/tc-arm.c (md_assemble): Added validation.
gas/testsuite
* gas/arm/thumb-w-bad.d: New test case.
* gas/arm/thumb-w-bad.l: New file.
* gas/arm/thumb-w-bad.s: New file.
* gas/arm/thumb-w-good.d: New test case.
* gas/arm/thumb-w-good.s: New file.
(set_it_insn_type_nonvoid): New macro.
(emit_thumb32_expr): New function.
(thumb_insn_size): New function.
(emit_insn): New function.
(s_arm_elf_inst): New function.
(md_pseudo_table): New pseudo-opcode entries added.
* doc/c-arm.texi: New directive added.
* gas/arm/inst-po.d: New testcase.
* gas/arm/inst-po.s: New file.
* gas/arm/inst-po-2.d: New testcase.
* gas/arm/inst-po-2.s: New file.
* gas/arm/inst-po-2.l: New file.
* gas/arm/inst-po-3.d: New testcase.
* gas/arm/inst-po-3.s: New file.
* gas/arm/inst-po-be.d: New testcase.
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
(implicit_it_mode): New global.
(it_instruction_type): New enum.
(arm_parse_it_mode): New function.
(arm_long_opts): New option added.
(arm_it): New field.
(it_state): New enum.
(now_it): New macro.
(check_it_blocks_finished): New function.
(insns[]): Use the IT Thumb opcodes for ARM too.
(arm_cleanup): Call check_it_blocks_finished.
(now_it_compatible): New function.
(conditional_insn): New function.
(set_it_insn_type): New macro.
(set_it_insn_type_last): New macro.
(do_it): Call automatic IT machinery functions.
(do_t_add_sub): Likewise
(do_t_arit3): Likewise.
(do_t_arit3c): Likewise.
(do_t_blx): Likewise.
(do_t_branch): Likewise.
(do_t_bkpt): Likewise.
(do_t_branch23): Likewise.
(do_t_bx): Likewise.
(do_t_bxj): Likewise.
(do_t_cps): Likewise.
(do_t_cpsi): Likewise.
(do_t_cbz): Likewise.
(do_t_it): Likewise.
(encode_thumb2_ldmstm): Likewise.
(do_t_ldst): Likewise.
(do_t_mov_cmp): Likewise.
(do_t_mvn_tst): Likewise.
(do_t_mul): Likewise.
(do_t_neg): Likewise.
(do_t_setend): Likewise.
(do_t_shift): Likewise.
(do_t_tb): Likewise.
(output_it_inst): New function.
(new_automatic_it_block): New function.
(close_automatic_it_block): New function.
(now_it_add_mask): New function.
(it_fsm_pre_encode): New function.
(handle_it_state): New function.
(it_fsm_post_encode): New function.
(force_automatic_it_block_close): New function.
(in_it_block): New function.
(md_assemble): Call automatic IT block machinery functions.
(arm_frob_label): Likewise.
(arm_opts): New element.
* config/tc-arm.h (it_state): New enum.
(current_it): New struct.
(arm_segment_info_type): New member added.
* doc/c-arm.texi: New option -mimplicit-it documented.
* gas/arm/arm-it-auto.d: New test.
* gas/arm/arm-it-auto.s: New file.
* gas/arm/arm-it-auto-2.d: New test case.
* gas/arm/arm-it-auto-2.s: New file.
* gas/arm/arm-it-auto-3.d: New test case.
* gas/arm/arm-it-auto-3.s: New file.
* gas/arm/arm-it-bad.d: New test case.
* gas/arm/arm-it-bad.l: New file.
* gas/arm/arm-it-bad.s: New file.
* gas/arm/arm-it-bad-2.d: New test case.
* gas/arm/arm-it-bad-2.l: New file.
* gas/arm/arm-it-bad-2.s: New file.
* gas/arm/arm-it-bad-3.d: New test case.
* gas/arm/arm-it-bad-3.l: New file.
* gas/arm/arm-it-bad-3.s: New file.
* gas/arm/thumb2_it_auto.d: New test.
* gas/arm/thumb2_it_bad.l: Error message updated.
* gas/arm/thumb2_it_bad_auto.d: New test.
* gas/arm/thumb2_it.d: Comment added.
* gas/arm/thumb2_it_bad.d: Comment added.
* gas/tc-arm.c (do_t_ssat): Move common code from here...
(do_t_usat): ... and here to...
(do_t_ssat_usat): New function: ... here. Add code to check that
the shift value, if present, is in range.
* gas/arm/thumb2_bad_reg.s: Add tests for SSAT and USAT with an
out of range shift.
* gas/arm/thumb2_bad_reg.l: Update expected error messages.
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
* objdump.c (disassemble_bytes): Set the
USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
if the user has invoked the -m switch.
* doc/binutils.texi: Document the additional behaviour of
objdump's -m switch for ARM targets.
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
* gas/arm/align.s: Add labels so that COFF based targets can
correctly locate THUMB code.
* gas/arm/copro.d: Do not pass --architecture switch to objdump.
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
* config/tc-mips.c (nops_for_vr4130): Don't check noreorder_p.
(nops_for_insn): Likewise.
gas/testsuite/
* gas/mips/vr4130.s, gas/mips/vr4130.d: Expect part A to have nops.
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* cofflink.c (process_embedded_commands): Ignore "-aligncomm".
==> gas/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* config/obj-coff.c (obj_coff_common_parse): New function.
(obj_coff_comm): Likewise.
(coff_pseudo_table): Override default ".comm" definition on PE.
* doc/as.texinfo: Document new feature.
==> gas/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* gas/pe/: New directory for PE format-specific tests.
* gas/pe/aligncomm-a.d: New test pattern file.
* gas/pe/aligncomm-a.s: New test source file.
* gas/pe/aligncomm-b.d: New test pattern file.
* gas/pe/aligncomm-b.s: New test source file.
* gas/pe/aligncomm-c.d: New test pattern file.
* gas/pe/aligncomm-c.s: New test source file.
* gas/pe/aligncomm-d.d: New test pattern file.
* gas/pe/aligncomm-d.s: New test source file.
* gas/pe/pe.exp: New test control script.
* lib/gas-defs.exp (is_pecoff_format): New function.
==> ld/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* NEWS: Mention new feature.
* deffile.h (def_file_aligncomm): Add new struct definition.
(def_file): Add new def_file_aligncomm member.
* deffilep.y (%token): Add new ALIGNCOMM token.
(command): Add production rule for ALIGNCOMM.
(def_file_free): Free any chained def_file_aligncomm structs.
(diropts[]): Add entry for '-aligncomm' .drectve command.
(def_aligncomm): New grammar function.
* ld.texinfo: Document new feature.
* pe-dll.c (process_def_file): Rename from this ...
(process_def_file_and_drectve): ... to this, updating all callers,
and process any aligncomms chained to the def file after scanning
all .drectve sections.
(generate_edata): Updated to match.
(pe_dll_build_sections): Likewise.
==> ld/testsuite/ChangeLog <==
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com>
* ld-pe/aligncomm-1.c: New test source file.
* ld-pe/aligncomm-2.c: Likewise.
* ld-pe/aligncomm-3.c: Likewise.
* ld-pe/aligncomm-4.c: Likewise.
* ld-pe/aligncomm.d: New test pattern file.
* ld-pe/direct.exp: Deleted, and content moved into ...
* ld-pe/pe-run.exp: ... New common file for all PE run tests.
* ld-pe/vers-script.exp: Deleted, and content merged into ...
* ld-pe/pe-compile.exp: ... New common file for PE tests needing
a compiler, adding aligned common tests.
* ld-pe/pe.exp: Update header comment.
* config/tc-armeabi.h (FPU_DEFAULT): Likewise.
* config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
the default FPU from the processor.
testsuite/
* gas/arm/attr-mcpu.d: Add -mfpu=neon.
* gas/arm/mapmisc.d: Correct expected output for .double and
.dcb.d.
2009-04-15 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (process_operands): Print operands in
correct order depending on intel_syntax.
gas/testsuite/
2009-04-15 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.e: Adjust expectations.
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
"tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
Reorder entries so the extended mnemonics are listed before tlbilx.
gas/testsuite/
* gas/ppc/e500mc.d: Update to match extended mnemonics.
gas/
* config/tc-arm.c (md_apply_fix): Check BFD_RELOC_ARM_IMMEDIATE and
BFD_RELOC_ARM_ADRL_IMMEDIATE value is in the correct section.
Check BFD_RELOC_ARM_ADRL_IMMEDIATE has a defined symbol.
gas/testsuites/
* gas/arm/adr-invalid.d: New file.
* gas/arm/adr-invalid.l: New file.
* gas/arm/adr-invalid.s: New file.
(do_t_mov_cmp): Permit R13 as the second
argument to "cmp.n".
* gas/arm/thumb2_bad_reg.s: Update to allow R13 as second argument
for CMP.
* gas/arm/thumb2_bad_reg.l: Adjust accordingly.
* gas/ppc/e500mc.d ("lfdepx", "stfdepx"): Fix tests to expect a
floating point register.
opcodes/
* ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first
operand to be a float point register (FRT/FRS).
* mips-opc.c (mips_builtin_opcodes): Move the Octeon-specific
dmfc2 and dmtc2 before the architecture-level variants.
gas/testsuite/
* gas/mips/octeon.s: Add more tests for dmfc2 and dmtc2.
* gas/mips/octeon.d: Update.
* gas/mips/octeon-ill.l: Update error message.
* gas/ppc/booke.s ("dcbt", "dcbtst"): New tests.
* gas/ppc/booke.d: Likewise.
* gas/ppc/power4_32.s: Likewise.
* gas/ppc/power4_32.d: Likewise.
opcodes/
* ppc-opc.c: Update copyright year.
(powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand
ordering for POWER4 and later and use the correct Server ordering.
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* config/tc-arm.c (do_t_mul): In Thumb-2 mode, use 16-bit encoding
of MUL when possible.
gas/testsuite:
2009-01-29 Paul Brook <paul@codesourcery.com>
Mark Mitchell <mark@codesourcery.com>
* gas/arm/thumb2_mul.s: New file.
* gas/arm/thumb2_mul.d: Likewise.
* gas/arm/thumb2_mul-bad.s: Likewise.
* gas/arm/thumb2_mul-bad.d: Likewise.
* gas/arm/thumb2_mul-bad.l: Likewise.
* gas/arm/t16-bad.s: Add tests for"mul" with high registers.
* gas/arm/t16-bad.l: Update accordingly.
* gas/all/gas.exp: Expect forward test to fail for MeP.
Expect relax test to fail for MeP.
* gas/mep/relocs.d: Update expected disassembly.
* lib/ld-lib.exp (check_gc_sections_available): Add MeP to list of
targets which do not support garbage collection.
* ld-srec/srec.exp (run_srec_test): Expect tests to fail for MeP.
* ld-elf/group8a.d: Likewise.
* ld-elf/group8b.d: Likewise.
* ld-elf/group9a.d: Likewise.
* ld-elf/group9b.d: Likewise.
* binutils-all/objdump.W: Do not assume that high and low PC
addresses will have been computed.
sequence containing an unsupported reloc type.
(enum options): Replace computed #define's constants for option
numbers with this enum.
(struct md_longopts): Use the enum. Allow OPTION_32 in a non-ELF
environment.
(md_parse_option): Allow -32 in a non-ELF environment.
* gas/lib/gas-defs.exp: Update description of run_dump_test proc.
* gas/mips/dli.d: Pass -64 to gas.
* gas/mips/mips64-mips3d-incl.d: Likewise.
* gas/mips/octeon.d: Likewise.
* gas/mips/sb1-ext-mdmx.d: Likewise.
* gas/mips/sb1-ext-ps.d: Likewise.
* gas/mips/e32el-rel2.s: Pass -march=mips3 to gas.
Update expected relocs.
* gas/mips/ld-ilocks-addr32.d: Do not run for tx39 targets.
* gas/mips/mips.exp: Remove 'ilocks' variable.
Add ecoff targets to 'addr32' variable.
Set 'no_mips16' for ecoff targets.
Do not run div-ilocks or mul-ilocks test variants.
* gas/mips/mips16-intermix.d: Use nm instead of objdump so that
the symbol table output is sorted. Update expecetd output.
gas/
* config/tc-arm.c (attributes_set_explicitly): New array.
(s_arm_eabi_attribute): Check return value from s_vendor_attribute.
(cpu_arch): Add ARM_ARCH_V5T.
(aeabi_set_attribute_int): New function.
(aeabi_set_attribute_string): New function.
(aeabi_set_public_attributes): Set attributes according to the user's
intentions, rather than the actual state of the binary.
Use aeabi_set_attribute_int and aeabi_set_attribute_string instead of
bfd_elf_add_proc_attr_int and bfd_elf_add_proc_attr_string.
Support WMMXv2. Use attribute names instead of numbers.
* read.c (s_vendor_attribute): Change return type to int.
Return the tag number that was set.
* read.h (s_vendor_attribute): Change return type to int.
gas/testsuite/
* gas/arm/attr-cpu-directive.d: New file.
* gas/arm/attr-cpu-directive.s: New file.
* gas/arm/attr-default.d: New file.
* gas/arm/attr-march-all.d: New file.
* gas/arm/attr-march-armv1.d: New file.
* gas/arm/attr-march-armv2.d: New file.
* gas/arm/attr-march-armv2a.d: New file.
* gas/arm/attr-march-armv2s.d: New file.
* gas/arm/attr-march-armv3.d: New file.
* gas/arm/attr-march-armv3m.d: New file.
* gas/arm/attr-march-armv4.d: New file.
* gas/arm/attr-march-armv4t.d: New file.
* gas/arm/attr-march-armv4txm.d: New file.
* gas/arm/attr-march-armv4xm.d: New file.
* gas/arm/attr-march-armv5.d: New file.
* gas/arm/attr-march-armv5t.d: New file.
* gas/arm/attr-march-armv5te.d: New file.
* gas/arm/attr-march-armv5tej.d: New file.
* gas/arm/attr-march-armv5texp.d: New file.
* gas/arm/attr-march-armv5txm.d: New file.
* gas/arm/attr-march-armv6-m.d: New file.
* gas/arm/attr-march-armv6.d: New file.
* gas/arm/attr-march-armv6j.d: New file.
* gas/arm/attr-march-armv6k.d: New file.
* gas/arm/attr-march-armv6kt2.d: New file.
* gas/arm/attr-march-armv6t2.d: New file.
* gas/arm/attr-march-armv6z.d: New file.
* gas/arm/attr-march-armv6zk.d: New file.
* gas/arm/attr-march-armv6zkt2.d: New file.
* gas/arm/attr-march-armv6zt2.d: New file.
* gas/arm/attr-march-armv7-a.d: New file.
* gas/arm/attr-march-armv7-m.d: New file.
* gas/arm/attr-march-armv7-r.d: New file.
* gas/arm/attr-march-armv7.d: New file.
* gas/arm/attr-march-armv7a.d: New file.
* gas/arm/attr-march-armv7m.d: New file.
* gas/arm/attr-march-armv7r.d: New file.
* gas/arm/attr-march-iwmmxt.d: New file.
* gas/arm/attr-march-iwmmxt2.d: New file.
* gas/arm/attr-march-xscale.d: New file.
* gas/arm/attr-mcpu.d: New file.
* gas/arm/attr-mfpu-arm1020e.d: New file.
* gas/arm/attr-mfpu-arm1020t.d: New file.
* gas/arm/attr-mfpu-arm1136jf-s.d: New file.
* gas/arm/attr-mfpu-arm1136jfs.d: New file.
* gas/arm/attr-mfpu-arm7500fe.d: New file.
* gas/arm/attr-mfpu-fpa.d: New file.
* gas/arm/attr-mfpu-fpa10.d: New file.
* gas/arm/attr-mfpu-fpa11.d: New file.
* gas/arm/attr-mfpu-fpe.d: New file.
* gas/arm/attr-mfpu-fpe2.d: New file.
* gas/arm/attr-mfpu-fpe3.d: New file.
* gas/arm/attr-mfpu-maverick.d: New file.
* gas/arm/attr-mfpu-neon-fp16.d: New file.
* gas/arm/attr-mfpu-neon.d: New file.
* gas/arm/attr-mfpu-softfpa.d: New file.
* gas/arm/attr-mfpu-softvfp+vfp.d: New file.
* gas/arm/attr-mfpu-softvfp.d: New file.
* gas/arm/attr-mfpu-vfp.d: New file.
* gas/arm/attr-mfpu-vfp10-r0.d: New file.
* gas/arm/attr-mfpu-vfp10.d: New file.
* gas/arm/attr-mfpu-vfp3.d: New file.
* gas/arm/attr-mfpu-vfp9.d: New file.
* gas/arm/attr-mfpu-vfpv2.d: New file.
* gas/arm/attr-mfpu-vfpv3-d16.d: New file.
* gas/arm/attr-mfpu-vfpv3.d: New file.
* gas/arm/attr-mfpu-vfpxd.d: New file.
* gas/arm/attr-order.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
* gas/arm/attr-override-cpu-directive.d: New file.
* gas/arm/attr-override-cpu-directive.s: New file.
* gas/arm/attr-override-mcpu.d: New file.
* gas/arm/attr-override-mcpu.s: New file.
* gas/arm/blank.s: New file.
* gas/arm/eabi_attr_1.d: Update Tag_ARM_ISA_use and Tag_THUMB_ISA_use.
ld/testsuite/
* ld-arm/attr-merge-3.attr: Update following gas change.
* ld-arm/attr-merge-2.attr: Update Tag_ARM_ISA_use and
Tag_THUMB_ISA_use following gas changes.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-5.attr: Likewise.
* ld-arm/attr-merge-arch-1.attr: Likewise.
* ld-arm/attr-merge-arch-2.attr: Likewise.
* ld-arm/attr-merge-unknown-2.d: Likewise.
* ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld-arm/attr-merge-unknown-3.d: Likewise.
* ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-00.d: Likewise.
* ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-02.d: Likewise.
* ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-04.d: Likewise.
* ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-20.d: Likewise.
* ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-22.d: Likewise.
* ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40.d: Likewise.
* ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44.d: Likewise.
* ld-arm/attr-merge.attr: Likewise.
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* config/tc-arm.c (arm_copy_symbol_attributes): New function.
* config/tc-arm.h (arm_copy_symbol_attributes): New prototype.
(CONVERT_SYMBOLIC_ATTRIBUTE): New define.
* read.c (s_vendor_attribute): Add support for symbolic tag names.
Improve string parser.
* doc/c-arm.texi (ARM Machine Directives): Document
.eabi_attribute symbolic tag names.
gas/testsuite/
* gas/arm/attr-syntax.d: New file.
* gas/arm/attr-syntax.s: New file.
* ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
* ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
operand form and enable the four operand form for POWER6 and later.
<mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
three operand form for POWER6 and later.
gas/testsuite/
* gas/ppc/power6.s ("mtfsf", "mtfsf.", "mtfsfi", "mtfsfi."): Add tests.
* gas/ppc/power6.d: Likewise.
* common.h (STT_IFUNC): Define.
elfcpp/
* elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
* syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags
to remove gaps.
(bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
(bfd_decode_symclass): Likewise.
* elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
STT_IFUNC.
(elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
(_bfd_elf_is_function_type): Likewise.
* elf32-arm.c (arm_elf_find_function): Likewise.
(elf32_arm_adjust_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_additional_program_headers): Likewise.
* elf32-i386.c (is_indirect_symbol): New function.
(elf_i386_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (is_indirect_symbol): New function.
(elf64_x86_64_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf64_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
BSF_INDIRECT_FUNCTION.
* elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
for STT_IFUNC symbols.
(get_ifunc_reloc_section_name): New function.
(_bfd_elf_make_ifunc_reloc_section): New function.
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
* doc/as.texinfo: Document new feature.
* NEWS: Mention new feature.
gas/testsuite/
* gas/elf/type.s: Add test of STT_IFUNC symbol type.
* gas/elf/type.e: Update expected disassembly.
* gas/elf/elf.exp: Update grep of symbol types.
ld/
* NEWS: Mention new feature.
* pe-dll.c (process_def_file): Replace use of redundant
BFD_FORT_COMM_DEFAULT_VALUE with 0.
* scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
sections.
ld/testsuite/
* ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
descriptions.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-i386/ifunc.d: New test.
* ld-i386/ifunc.s: Source file for the new test.
* ld-i386/i386.exp: Run the new test.
for FP instructions.
testsuite/
* gas/mips/mips1-fp.s, testsuite/gas/mips/mips1-fp.d,
testsuite/gas/mips/mips1-fp.l: New tests.
* gas/mips/mips.exp: Run them.
* config/tc-xtensa.c (xtensa_j_opcode): New.
(xg_instruction_matches_option_term): Handle "FREEREG" option.
(xg_build_to_insn): Likewise. Update renamed tls_reloc reference.
(md_begin): Initialize xtensa_j_opcode.
(md_assemble): Update renamed tls_reloc reference. Handle "j.l".
(xg_assemble_vliw_tokens): Save free_reg info in the frag.
(tinsn_immed_from_frag): Get free_reg info back out of the frag.
(vinsn_to_insnbuf): Update renamed tls_reloc references.
Distinguish extra argument for "FREEREG" from extra TLS argument.
* config/tc-xtensa.h (struct xtensa_frag_type): Add free_reg field.
* config/xtensa-istack.h (struct tinsn_struct): Rename tls_reloc
field to extra_arg.
* config/xtensa-relax.c (widen_spec_list): Add rules to relax "j.l".
(build_transition): Handle "FREEREG" operand.
* config/xtensa-relax.h (enum op_type): Add OP_FREEREG.
2008-11-04 Bob Wilson <bob.wilson@acm.org>
* gas/xtensa/all.exp: Run jlong test.
* gas/xtensa/jlong.d: New.
* gas/xtensa/jlong.s: New.
* config/tc-mips.h (DWARF2_FDE_RELOC_SIZE): Define.
gas/testsuite/
* gas/mips/cfi-n64-1.s, gas/mips/cfi-n64-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_assemble): Force number of displacement
operands to zero when processing string instruction.
(i386_index_check): Special-case string instruction operands. Don't
fudge address prefix if there already was a memory operand. Fix
error message to correctly reflect the addressing mode used.
(i386_att_operand): Fix comment.
(i386_intel_operand): Snapshot, clear, and restore base and index
reg for each operand processed. Increment count of memory operands
later.
gas/testsuite/
2008-08-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/string-bad.{l,s}, gas/i386/string-ok.{d,e,s}: New.
* gas/i386/i386.exp: Run new tests.
for DW_CFA_offset_extended_sf results. Allow for differing nops.
* gas/cfi/cfi-hppa-1.d: Invert data alignment sign. Change
offsets to match 64-bit offsets.
* gas/cfi/cfi.exp: Don't run common tests on hppa64.
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
* reloc.c (BFD_RELOC_MIPS16_GOT16, BFD_RELOC_MIPS16_CALL16): Declare.
* libbfd.h, bfd-in2.h: Regenerate.
* elf32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_reloc_map): Add mappings.
* elf64-mips.c (mips16_elf64_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_elf64_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfn32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(elf_mips16_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfxx-mips.c (mips_elf_create_shadow_symbol): New function.
(section_allows_mips16_refs_p): Likewise.
(mips16_stub_symndx): Likewise.
(mips_elf_check_mips16_stubs): Treat the data argument as a
bfd_link_info. Mark every dynamic symbol as needing MIPS16 stubs
and create a "shadow" symbol for the original MIPS16 definition.
(mips16_reloc_p, got16_reloc_p, call16_reloc_p, hi16_reloc_p)
(lo16_reloc_p, mips16_call_reloc_p): New functions.
(_bfd_mips16_elf_reloc_unshuffle): Use mips16_reloc_p to generalize
relocation checks.
(_bfd_mips16_elf_reloc_shuffle): Likewise.
(_bfd_mips_elf_lo16_reloc): Handle R_MIPS16_GOT16.
(mips_elf_got16_entry): Add comment.
(mips_elf_calculate_relocation): Use hi16_reloc_p,
lo16_reloc_p, mips16_call_reloc_p, call16_reloc_p and got16_reloc_p
to generalize relocation checks. Use section_allows_mips16_refs_p
instead of mips16_stub_section_p. Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16, allowing the former to refer directly to a
MIPS16 function if its stub is not needed.
(mips16_stub_section_p): Delete.
(_bfd_mips_elf_symbol_processing): Convert odd-valued function
symbols into even MIPS16 symbols.
(mips_elf_add_lo16_rel_addend): Use mips16_reloc_p to generalize
a relocation check.
(_bfd_mips_elf_check_relocs): Calculate "bed" and "rel_end"
earlier in the function. Use mips16_stub_symndx to identify
the target function. Avoid out-of-bounds accesses when the
stub has no relocations; report an error instead. Use
section_allows_mips16_refs_p instead of mips16_stub_section_p.
Use mips16_call_reloc_p and got16_reloc_p to generalize relocation
checks. Handle R_MIPS16_CALL16 and R_MIPS16_GOT16. Don't create
dynamic relocations for absolute references to __gnu_local_gp.
(_bfd_mips_elf_always_size_sections): Pass a bfd_link_info as
the argument to mips_elf_check_mips16_stubs. Generalize comment.
(_bfd_mips_elf_relocate_section): Use hi16_reloc_p and got16_reloc_p
to generalize relocation checks.
(_bfd_mips_elf_finish_dynamic_symbol): If a dynamic MIPS16 function
symbol has a non-MIPS16 stub, redirect the symbol to the stub.
Fix an overly long line. Don't give dynamic symbols type STO_MIPS16.
(_bfd_mips_elf_gc_sweep_hook): Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16.
gas/
* config/tc-mips.c (mips16_reloc_p, got16_reloc_p, hi16_reloc_p)
(lo16_reloc_p): New functions.
(reloc_needs_lo_p): Use hi16_reloc_p and got16_reloc_p to
generalize relocation checks.
(matching_lo_reloc): New function.
(fixup_has_matching_lo_p): Use it.
(mips16_mark_labels): Don't clobber a symbol's visibility.
(append_insn): Use hi16_reloc_p and lo16_reloc_p.
(mips16_ip): Handle BFD_RELOC_MIPS16_GOT16 and BFD_RELOC_MIPS16_CALL16.
(md_apply_fix): Likewise.
(mips16_percent_op): Add %got and %call16.
(mips_frob_file): Use got16_reloc_p to generalize relocation checks.
Use matching_lo_reloc.
(mips_force_relocation): Use hi16_reloc_p and lo16_reloc_p to
generalize relocation checks.
(mips_fix_adjustable): Use lo16_reloc_p to generalize relocation
checks.
gas/testsuite/
* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
* gas/mips/mips.exp: Run them.
ld/testsuite/
* ld-mips-elf/mips16-local-stubs-1.d: Remove stub_for_h3,
which was only referenced by the .pdr section, and was not
actually needed by code.
* ld-mips-elf/mips16-intermix.d: Remove unused static function stubs.
* ld-mips-elf/mips16-pic-1a.s,
ld-mips-elf/mips16-pic-1b.s,
ld-mips-elf/mips16-pic-1-dummy.s,
ld-mips-elf/mips16-pic-1.dd,
ld-mips-elf/mips16-pic-1.gd,
ld-mips-elf/mips16-pic-1.inc,
ld-mips-elf/mips16-pic-1.ld,
ld-mips-elf/mips16-pic-2a.s,
ld-mips-elf/mips16-pic-2b.s,
ld-mips-elf/mips16-pic-2.ad,
ld-mips-elf/mips16-pic-2.dd,
ld-mips-elf/mips16-pic-2.gd,
ld-mips-elf/mips16-pic-2.nd,
ld-mips-elf/mips16-pic-2.rd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
* gas/mips/mips32-cp2.s: ... to here.
* gas/mips/mips32.d: Update.
* gas/mips/mips32-cp2.d: New file.
* gas/mips/mips32r2.s: Move out coprocessor2 insns from here ...
* gas/mips/mips32r2-cp2.s: ... to here.
* gas/mips/mips32r2.d: Update.
* gas/mips/mips32r2-cp2.d: New file.
* gas/mips/mips64.s: Move out coprocessor2 insns from here ...
* gas/mips/mips64-cp2.s: ... to here.
* gas/mips/mips64.d: Update.
* gas/mips/mips64-cp2.d: New file.
* gas/mips/mips.exp: Run mips32-cp2, mips32r2-cp2 and mips64-cp
except for Octeon.
* gas/mips/octeon.s: Add supported coprocessor insns. Move pop
down to keep alphabetical order.
* gas/mips/octeon.d: Update.
* gas/mips/octeon-ill.s: Add unsupported coprocessor insns.
* gas/mips/octeon-ill.l: Update.
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptor +Q.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
seqi, sne and snei.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
(mips_ip): Likewise.
(macro_build): Likewise.
(CPU_HAS_SEQ): New macro.
(macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
and snei.
* config/tc-mips.c (mips_frob_file): Don't match MIPS16 relocs
with non-MIPS16 relocs.
gas/testsuite/
* gas/mips/mips16-hilo-match.s: New test.
* gas/mips/mip16-hilo-match.d: New test output.Index: config/tc-mips.c
* gas/mips/mips4-fp.s: ... to here.
* gas/mips/mips4.d: Update.
* gas/mips/mips4-fp.l: New file. Check error messages with
-msoft-float.
* gas/mips/mips4-fp.d: New file. Check disassembly with
hard-float.
* gas/mips/mips32r2.s: Split out fp instructions from here ...
* gas/mips/mips32r2-fp32.s: ... to here.
* gas/mips/mips32r2.d: Update.
* gas/mips/mips32r2-fp32.l: New file. Check error messages with
-msoft-float.
* gas/mips/mips32r2-fp32.d: New file. Check disassembly with
hard-float.
* gas/mips/mips32r2-ill-nofp.s, gas/mips/mips32r2-ill-nofp.l: New
test derived from mips32r2-ill.
* gas/mips/mips32-sf32.l: New list test for mips32-sf32.s to check
error messages for soft-float targets.
* gas/mips/mips-macro-ill-sfp.s, gas/mips/mips-macro-ill-sfp.l:
New test for -msingle-float.
* gas/mips/mips-macro-ill-nofp.s, gas/mips/mips-macro-ill-nofp.l:
New test for -msoft-float.
* gas/mips/mips-hard-float-flag.s,
gas/mips/mips-hard-float-flag.l: New test for -mhard-float.
* gas/mips/mips-double-float-flag.s,
gas/mips/mips-double-float-flag.l: New test for -mdouble-float.
* gas/mips/mips.exp: Run new mips4-fp and mips32r2-fp dump tests.
Run mips4-fp and mips32r2-fp list tests with -msoft-float. Run
new mips32r2-ill-nofp with -msoft-float. Run new mips32-sf32 list
test with -msoft-float. Run new mips-macro-ill-sfp test with
-msingle-float. Run new mips-macro-ill-nofp test with
-msoft-float. Run new mips-hard-float-flag and
mips-double-float-flag tests.
listings such as gas version, passed options, and time stamp.
(listing_general_info): New function.
(print_options): New function.
(print_single_option): New function.
(print_timestamp): New function.
(MAX_DATELEN): Define.
(listing_print): Add call to listing_general_info.
* listing.h (LISTING_GENERAL): Define.
(listing_print): Add new parameter.
* as.c (show_usage): Print new switch.
(parse_args): Parse new switch.
(main): Pass command line on to listing_print.
* NEWS: Mention this new feature.
* doc/as.texinfo: Document the new sub-option.
* gas/all/gas.exp: Check the performance of the -ag command line
switch.
* s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
(s390_crb_extensions): New extensions table.
(insertExpandedMnemonic): Handle '$' tag.
* s390-opc.txt: Remove conditional jump variants which can now
be expanded automatically.
Replace '*' tag with '$' in the compare and branch instructions.
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: Map the compare and branch variants
with odd condition code mask to version with an even mask.
* config/tc-sh64.c (shmedia_md_pcrel_from_section): Use
md_pcrel_from_section for BFD_RELOC_64 and BFD_RELOC_64_PCREL.
* gas/sh/sh64/eh-1.d: New.
* gas/sh/sh64/eh-1.d: Likewise.
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
generated for LOOP_BEGIN and LOOP_END instructions.
(bfin_gen_loop): Likewise.
gas/testsuite/:
* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
and LOOP_END instruction are local now.
* gas/bfin/flow2.d: Likewise.
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
option for multiply and multiply-accumulate to data register
instruction.
(check_macfuncs): Don't check if accumulator matches the data register
here.
(assign_macfunc): Check if accumulator matches the
data register in each rule that moves to the data
register.
gas/testsuite/
* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
for IU option.
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
Add check for mismatch of accumulator and data register.
opcodes/
* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
multiply and multiply-accumulate to data register instruction.
* config/bfin-parse.y (check_macfunc_option): New.
(check_macfuncs): Check option by calling check_macfunc_option.
Fix comparison always true warnings. Both scalar instructions
of vector instruction must share the same mode option. Only allow
option mode at the end of the second instruction of the vector.
(asm_1): Check option by calling check_macfunc_option.
gas/testsuite/:
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
tests for bad options of "multiply and multipy-accumulate to
accumulator" instructions. Add new vector instruction option
mode tests.
* gas/bfin/vector2.s: Add new vector instruction option mode test.
* gas/bfin/vector2.d: Adjust accordingly.
* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
for mismatched half registers in vector multipy-accumulate
instructions.
From Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (asm_1): Check AREGS in comparison
instructions. And call yyerror () when comparing PREG with
DREG.
gas/testsuite/:
* gas/bfin/expected_comparison_errors.l: New test.
* gas/bfin/expected_comparison_errors.s: New test.
* gas/bfin/bfin.exp: Add expected_comparison_errors.
* read.c (s_mexit): Warn if attempting to exit a macro when not
inside a macro definition.
* gas/macros/exit.s: New test case.
* gas/macros/macros.exp: Run the new test, expect it to produce an
error result.
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
with a 32-bit displacement but without the top bit of the 4th byte
set.
* gas/h8300/pr3134.s: New test.
* gas/h8300/pr3134.d: Expected disassembly
* gas/h8300/h8300.exp: Run the new test.
* gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
accept h8300-rtemscoff not just h8300-rtems.
2008-02-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (match_template): Disallow 'l' suffix when
currently selected CPU has no 32-bit support.
(parse_real_register): Do not return registers not available on
currently selected CPU.
gas/testsuite/
2008-02-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/att-regs.s, gas/i386/att-regs.d,
gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
* gas/i386/i386.exp: Run new tests.
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
pointer past the comma after parsing a floating point register
name.
* gas/arm/fp-save.s: New test.
* gas/arm/fp-save.d: Expected disassembly.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
if not in Intel mode.
(i386_intel_operand): Ignore segment overrides in immediate and
offset operands.
(intel_e11): Range-check i.mem_operands before use as array
index. Filter out FLAT for uses other than as segment override.
(intel_get_token): Remove broken promotion of "FLAT:" to mean
"offset FLAT:".
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.s: Replace invalid offset expression with
valid ones.
* gas/i386/x86_64.s: Likewise.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegFlat): New.
* i386-reg.tbl (flat): Add.
* i386-tbl.h: Re-generate.
2008-02-13 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (allow_pseudo_reg): New.
(parse_real_register): Check for NULL just once. Allow all
register table entries when allow_pseudo_reg is non-zero.
Don't allow any registers without type when allow_pseudo_reg
is zero.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
(tc_x86_frame_initial_instructions): Adjust for above change.
* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
(tc_parse_to_dw2regnum): New.
(tc_x86_regname_to_dw2regnum): Replace with ...
(tc_x86_parse_to_dw2regnum): ... this.
* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
error handling.
gas/testsuite/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* gas/cfi/cfi-i386.s: Add code testing use of all registers.
Fix a few comments.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
opcodes/
2008-02-13 Jan Beulich <jbeulich@novell.com>
* i386-gen.c (process_i386_registers): Process new fields.
* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
unsigned char. Add dw2_regnum and Dw2Inval.
* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
register names.
* i386-tbl.h: Re-generate.
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
to 0x0f1f.
* gas/i386/x86-64-nops.s: Likewise.
* gas/i386/nops.d: Updated.
* gas/i386/x86-64-nops.d: Likewise.
opcodes/
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
(REG_0F18): Updated.
(reg_table): Updated.
(dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
(twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
* dwarf2dbg.c (out_sleb128): Delete.
(size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New.
(out_fixed_inc_line_addr): Delete.
(relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new
size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set.
(dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr.
(process_entries): Remove calls to out_fixed_inc_line_addr. When
DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr.
* read.h (emit_expr_fix): New prototype.
* read.c (emit_expr): Move code to emit_expr_fix and use it here.
(emit_expr_fix): New.
testsuite/
* gas/lns/lns.exp: Run new lns-big-delta test for targets that set
DWARF2_USE_FIXED_ADVANCE_PC.
* gas/lns/lns-big-delta.s: New.
* gas/lns/lns-big-delta.d: New.
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.
* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
command line options (-maltivec, -mspe) can be specified before
CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
