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Author SHA1 Message Date
Paul Brook
f5208ef27a 2006-03-17 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Add ldm and stm.
gas/testsuite/
	* gas/arm/thumb32.d: Add ldm and stm tests.
	* gas/arm/thumb32.s: Ditto.
 2006-03-17 14:03:36 +00:00
Paul Brook
c16d2bf065 2006-03-16 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
	* gas/arm/svc.d: New test.
	* gas/arm/svc.s: New test.
	* gas/arm/inst.d: Accept svc mnemonic.
	* gas/arm/thumb.d: Ditto.
	* gas/arm/wince_inst.d: Ditto.
opcodes/
	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.
 2006-03-16 15:08:48 +00:00
Bob Wilson
80ca4e2ca2 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar 
flag and avoid double underscore prefixes.
 2006-03-13 21:46:53 +00:00
Paul Brook
3a4a14e9ea 2006-03-10 Paul Brook <paul@codesourcery.com> 
bfd/
	* elf32-arm.c (INTERWORK_FLAG): Handle EABIv5.
	(elf32_arm_print_private_bfd_data): Ditto.
binutils/
	* readelf.c (decode_ARM_machine_flags):  Handle EABIv5.
gas/
	* config/tc-arm.c (md_begin): Handle EABIv5.
	(arm_eabis): Add EF_ARM_EABI_VER5.
	* doc/c-arm.texi: Document -meabi=5.
include/elf/
	* arm.h (EF_ARM_EABI_VER5): Define.
 2006-03-10 17:20:30 +00:00
Richard Sandiford
00a976722a bfd/ 
* configure.in (bfd_elf32_bigarm_vec): Include elf-vxworks.lo.
	(bfd_elf32_bigarm_symbian_vec): Likewise.
	(bfd_elf32_bigarm_vxworks_vec): Likewise.
	(bfd_elf32_littlearm_vec): Likewise.
	(bfd_elf32_littlearm_symbian_vec): Likewise.
	(bfd_elf32_littlearm_vxworks_vec): Likewise.
	* configure: Regenerate.
	* elf32-arm.c: Include libiberty.h and elf-vxworks.h.
	(RELOC_SECTION, RELOC_SIZE, SWAP_RELOC_IN, SWAP_RELOC_OUT): New macros.
	(elf32_arm_vxworks_bed): Add forward declaration.
	(elf32_arm_howto_table_1): Fix the masks for R_ASM_ABS12.
	(elf32_arm_vxworks_exec_plt0_entry): New table.
	(elf32_arm_vxworks_exec_plt_entry): Likewise.
	(elf32_arm_vxworks_shared_plt_entry): Likewise.
	(elf32_arm_link_hash_table): Add vxworks_p and srelplt2 fields.
	(reloc_section_p): New function.
	(create_got_section): Use RELOC_SECTION.
	(elf32_arm_create_dynamic_sections): Likewise.  Call
	elf_vxworks_create_dynamic_sections for VxWorks targets.
	Choose between the two possible values of plt_header_size
	and plt_entry_size.
	(elf32_arm_link_hash_table_create): Initialize vxworks_p and srelplt2.
	(elf32_arm_abs12_reloc): New function.
	(elf32_arm_final_link_relocate): Call it.  Allow the creation of
	dynamic R_ARM_ABS12 relocs on VxWorks.  Use reloc_section_p,
	RELOC_SIZE, SWAP_RELOC_OUT and RELOC_SECTION.  Initialize the
	r_addend fields of relocs.  On rela targets, skip any code that
	adjusts in-place addends.  When using _bfd_link_final_relocate
	to perform a final relocation, pass rel->r_addend as the addend
	argument.
	(elf32_arm_merge_private_bfd_data): If one of the bfds is a VxWorks
	object, ignore flags that are not standard on VxWorks.
	(elf32_arm_check_relocs): Allow the creation of dynamic R_ARM_ABS12
	relocs on VxWorks.  Use reloc_section_p.
	(elf32_arm_adjust_dynamic_symbol): Use RELOC_SECTION and RELOC_SIZE.
	(allocate_dynrelocs): Use RELOC_SIZE.  Account for the size of
	.rela.plt.unloaded relocs on VxWorks targets.
	(elf32_arm_size_dynamic_sections): Use RELOC_SIZE.  Check for
	.rela.plt.unloaded as well as .rel(a).plt.  Add DT_RELA* tags
	instead of DT_REL* tags on RELA targets.
	(elf32_arm_finish_dynamic_symbol): Use RELOC_SECTION, RELOC_SIZE
	and SWAP_RELOC_OUT.  Initialize r_addend fields.  Handle VxWorks
	PLT entries.  Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
	(elf32_arm_finish_dynamic_sections): Use RELOC_SECTION, RELOC_SIZE
	and SWAP_RELOC_OUT.  Initialize r_addend fields.  Handle DT_RELASZ
	like DT_RELSZ.  Handle the VxWorks form of initial PLT entry.
	Correct the .rela.plt.unreloaded symbol indexes.
	(elf32_arm_output_symbol_hook): Call the VxWorks version of this
	hook on VxWorks targets.
	(elf32_arm_vxworks_link_hash_table_create): Set vxworks_p to true.
	Minor formatting tweak.
	(elf32_arm_vxworks_final_write_processing): New function.
	(elf_backend_add_symbol_hook): Override for VxWorks and reset
	for Symbian.
	(elf_backend_final_write_processing): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_want_plt_sym): Likewise.
	(ELF_MAXPAGESIZE): Likewise.
	(elf_backend_may_use_rel_p): Minor formatting tweak.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.
	(elf_backend_rela_normal): Likewise.
	* Makefile.in (elf32-arm.lo): Depend on elf-vxworks.h.

gas/
	* config/tc-arm.c (md_apply_fix): Install a value of zero into a
	BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
	R_ARM_ABS12 reloc.
	(tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
	relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
	relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.

gas/testsuite/
	* gas/arm/abs12.s, gas/arm/abs12.d: New test.
	* gas/arm/pic.d: Skip for *-*-vxworks*...
	* gas/arm/pic_vxworks.d: ...use this version instead.
	* gas/arm/unwind_vxworks.d: Fix expected output.

ld/
	* emulparams/armelf_vxworks.sh: Include vxworks.sh.
	(MAXPAGESIZE): Define.
	* emulparams/vxworks.sh: Undefine.
	* Makefile.am (earmelf_vxworks.c): Depend on vxworks.sh and vxworks.em.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-arm/vxworks1.dd, ld-arm/vxworks1.ld, ld-arm/vxworks1-lib.dd,
	* ld-arm/vxworks1-lib.nd, ld-arm/vxworks1-lib.rd,
	* ld-arm/vxworks1-lib.s, ld-arm/vxworks1.rd, ld-arm/vxworks1.s,
	* ld-arm/vxworks1-static.d, ld-arm/vxworks2.s, ld-arm/vxworks2.sd,
	* ld-arm/vxworks2-static.sd: New tests.
	* ld-arm/arm-elf.exp: Run them.
 2006-03-07 08:39:21 +00:00
Bob Wilson
b29757dc18 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables 
even when using the text-section-literals option.
 2006-03-06 18:02:06 +00:00
Nathan Sidwell
0b2e31dc3b bfd: 
* archures.c (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_b_nousp):
	New.  Adjust other variants.
	(bfd_default_scan): Update.
	* bfd-in2.h: Rebuilt.
	* cpu-m68k.c: Adjust.
	(bfd_m68k_compatible): New. Use it for architectures.
	* elf32-m68k.c (elf32_m68k_object_p): Adjust.
	(elf32_m68k_merge_private_bfd_data): Adjust.  Correct isa-a/b
	mismatch.
	(elf32_m68k_print_private_bfd_data): Adjust.
	* ieee.c (ieee_write_processor): Adjust.

	binutils:
	* readelf.c (get_machine_flags): Adjust.

	gas:
	* config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
	and cf.
	(m68k_ip): <case 'J'> Check we have some control regs.
	(md_parse_option): Allow raw arch switch.
	(m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
	whether 68881 or cfloat was meant by -mfloat.
	(md_show_usage): Adjust extension display.
	(m68k_elf_final_processing): Adjust.

	gas/testsuite:
	* gas/m68k/arch-cpu-1.s: Tweak.
	* gas/m68k/arch-cpu-1.d: Tweak.

	include/elf:
	* m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A,
	EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_ISA_C): Adjust.
	(EF_M68K_ISA_A_NODIV, EF_M68K_ISA_B_NOUSP): New.
	(EF_M68K_HW_DIV, EF_M68K_USP): Remove.
	(EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_FLOAT): Adjust.
	(EF_M68K_EMAC_B): New.

	ld/testsuite:
	* ld-m68k: New tests.
 2006-03-06 13:42:05 +00:00
Nick Clifton
df406460e9 Add linker relaxation support for the AVR 2006-03-03 15:25:31 +00:00
Jim Wilson
53022e4a53 Fix problem with double-stop-bit after itc.i instruction. 
* config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
change the template, then clear md.slot[curr].end_of_insn_group.
 2006-03-03 01:10:42 +00:00
H.J. Lu
331d2d0d9c gas/ 
2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (output_insn): Support Intel Merom New
	Instructions.

	* gas/config/tc-i386.h (CpuMNI): New.
	(CpuUnknownFlags): Add CpuMNI.

gas/testsuite/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add merom and x86-64-merom.

	* gas/i386/merom.d: New file.
	* gas/i386/merom.s: Likewise.
	* gas/i386/x86-64-merom.d: Likewise.
	* gas/i386/x86-64-merom.s: Likewise.

include/opcode/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Merom New Instructions.

opcodes/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.
 2006-02-27 15:35:37 +00:00
David S. Miller
10156f834a 2006-02-24 David S. Miller <davem@sunset.davemloft.net> 
* config/tc-sparc.c (priv_reg_table): Add entry for "gl".
	(hpriv_reg_table): New table for hyperprivileged registers.
	(sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
	register encoding.
 2006-02-25 01:34:09 +00:00
DJ Delorie
6772dd07c4 [include/elf] 
* m32c.h: Add relax relocs.

[cpu]
	* m32c.cpu (RL_TYPE): New attribute, with macros.
	(Lab-8-24): Add RELAX.
	(unary-insn-defn-g, binary-arith-imm-dst-defn,
	binary-arith-imm4-dst-defn): Add 1ADDR attribute.
	(binary-arith-src-dst-defn): Add 2ADDR attribute.
	(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
	jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
	attribute.
	(jsri16, jsri32): Add 1ADDR attribute.
	(jsr32.w, jsr32.a): Add JUMP attribute.

[opcodes]
	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

[gas]
	* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
	(tc_gen_reloc): Don't define.
	* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
	(OPTION_LINKRELAX): New.
	(md_longopts): Add it.
	(m32c_relax): New.
	(md_parse_options): Set it.
	(md_assemble): Emit relaxation relocs as needed.
	(md_convert_frag): Emit relaxation relocs as needed.
	(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
	(m32c_apply_fix): New.
	(tc_gen_reloc): New.
	(m32c_force_relocation): Force out jump relocs when relaxing.
	(m32c_fix_adjustable): Return false if relaxing.

[bfd]
	* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
	(m32c_elf_relocate_section): Don't relocate them.
	(compare_reloc): New.
	(relax_reloc): Remove.
	(m32c_offset_for_reloc): New.
	(m16c_addr_encodings): New.
	(m16c_jmpaddr_encodings): New.
	(m32c_addr_encodings): New.
	(m32c_elf_relax_section): Relax jumps and address displacements.
	(m32c_elf_relax_delete_bytes): Adjust for internal syms.  Fix up
	short jumps.

	* reloc.c: Add m32c relax relocs.
	* libbfd.h: Regenerate.
 2006-02-24 22:10:36 +00:00
Paul Brook
ebdca51ad9 Check in correct version of previous patch. 2006-02-24 17:09:33 +00:00
Paul Brook
62b3e31101 2006-02-24 Paul Brook <paul@codesourcery.com> 
gas/
	* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
	arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
	(struct asm_barrier_opt): Define.
	(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
	(parse_psr): Accept V7M psr names.
	(parse_barrier): New function.
	(enum operand_parse_code): Add OP_oBARRIER.
	(parse_operands): Implement OP_oBARRIER.
	(do_barrier): New function.
	(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
	(do_t_cpsi): Add V7M restrictions.
	(do_t_mrs, do_t_msr): Validate V7M variants.
	(md_assemble): Check for NULL variants.
	(v7m_psrs, barrier_opt_names): New tables.
	(insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
	(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
	(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
	(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
	(struct cpu_arch_ver_table): Define.
	(cpu_arch_ver): New.
	(aeabi_set_public_attributes): Use cpu_arch_ver.  Set
	Tag_CPU_arch_profile.
	* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected msr and mrs output.
	* gas/arm/arch7.d: New test.
	* gas/arm/arch7.s: New test.
	* gas/arm/arch7m-bad.l: New test.
	* gas/arm/arch7m-bad.d: New test.
	* gas/arm/arch7m-bad.s: New test.
include/opcode/
	* arm.h: Add V7 feature bits.
opcodes/
	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 2006-02-24 15:36:36 +00:00
H.J. Lu
59cf82fe74 bfd/ 
2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* cpu-ia64-opc.c (ins_immu5b): New.
	(ext_immu5b): Likewise.
	(elf64_ia64_operands): Add IMMU5b.

gas/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.

gas/testsuite/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/opc-i.s: Add tests for tf.
	* gas/ia64/pseudo.s: Likewise.
	* gas/ia64/opc-i.d: Updated.
	* gas/ia64/pseudo.d: Likewise.

include/opcode/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.

opcodes/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.
 2006-02-23 21:36:18 +00:00
H.J. Lu
19a7219fd1 Update copyright years. 2006-02-23 14:49:32 +00:00
H.J. Lu
7f3dfb9cf7 gas/ 
2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (specify_resource): Add the rule 17 from
	SDM 2.2.

gas/testsuite/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add check for vmsw.0.
	* gas/ia64/dv-raw-err.l: Updated.

	* gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1.
	* gas/ia64/opc-b.d: Updated.

opcodes/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 2006-02-23 00:17:24 +00:00
Paul Brook
f40d164325 2005-02-22 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_pld): Remove incorrect write to
	inst.instruction.
	(encode_thumb32_addr_mode): Use correct operand.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected pld opcode.
 2006-02-22 15:03:30 +00:00
Paul Brook
216d22bc1d 2006-02-21 Paul Brook <paul@codesourcery.com> 
* config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 2006-02-21 15:13:54 +00:00
Nick Clifton
d70c5fc7c5 Add support for the Infineon XC16X. 2006-02-17 14:36:28 +00:00
Bob Wilson
431ad2d0db * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting 
from 1, not 0, in error messages.
	(md_assemble): Simplify special-case check for ENTRY instructions.
	(tinsn_has_invalid_symbolic_operands): Do not include opcode and
	operand in error message.
 2006-02-14 00:58:05 +00:00
Nick Clifton
70e45ad9bb (check_range): Ensure that the sign bit of a 32-bit value is propagated into 
the upper bits of a 64-bit long.
 2006-02-10 12:21:43 +00:00
Nick Clifton
52de4c0655 Fix casts to allow for a 64-bit host. 2006-02-10 12:10:21 +00:00
Bob Wilson
21af2bbd73 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for 
each relaxation step.
 2006-02-10 01:02:12 +00:00
Nathan Sidwell
266abb8f72 * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e, 
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
	bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
	bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
	(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
	bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
	bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
	bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
	bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
	bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
	bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
	bfd_mach_mcf_isa_b_usp_float_emac): New.
	(bfd_default_scan): Update coldfire mapping.
	* bfd/bfd-in.h (bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Declare.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
	adjust legacy names.
	(m68k_arch_features): New.
	(bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Define.
	* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
	(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
	(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
	(elf_backend_object_p): Define.
	* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
	* bfd/libbfd.h: Rebuilt.

	* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
	mcf5329_control_regs): New.
	(not_current_architecture, selected_arch, selected_cpu): New.
	(m68k_archs, m68k_extensions): New.
	(archs): Renamed to ...
	(m68k_cpus): ... here.  Adjust.
	(n_arches): Remove.
	(md_pseudo_table): Add arch and cpu directives.
	(find_cf_chip, m68k_ip): Adjust table scanning.
	(no_68851, no_68881): Remove.
	(md_assemble): Lazily initialize.
	(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
	(md_init_after_args): Move functionality to m68k_init_arch.
	(mri_chip): Adjust table scanning.
	(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
	options with saner parsing.
	(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
	m68k_init_arch): New.
	(s_m68k_cpu, s_m68k_arch): New.
	(md_show_usage): Adjust.
	(m68k_elf_final_processing): Set CF EF flags.
	* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
	(tc_init_after_args): Remove.
	* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
	(M68k-Directives): Document .arch and .cpu directives.

	* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
	* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.

	* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
	(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
	(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
	EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
	EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.

	* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
	(m68k_mask): New.
	(cpu_m68k, cpu_cf): New.
	(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
	mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.

	* opcodes/m68k-dis.c (print_insn_m68k): Use
	bfd_m68k_mach_to_features.

	* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
 2006-02-07 19:01:10 +00:00
Arnold Metselaar
134dcee5bc Cleanup of pseudo-ops for constants and new def24,def32 pseudo-ops on z80 2006-02-05 11:57:35 +00:00
Paul Brook
a9931606c2 2006-02-02 Paul Brook <paul@codesourcery.com> 
* config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 2006-02-02 20:19:56 +00:00
Paul Brook
ef8d22e63b 2005-02-02 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
	T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
	T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
	T2_OPCODE_RSB): Define.
	(thumb32_negate_data_op): New function.
	(md_apply_fix): Use it.
gas/testsuite/
	* gas/arm/thumb2_invert.d: New test.
	* gas/arm/thumb2_invert.s: New test.
 2006-02-02 13:34:17 +00:00
Bob Wilson
e7da624184 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol 
fields.
	* config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
	* config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
	subtracted symbols.
	(relaxation_requirements): Add pfinish_frag argument and use it to
	replace setting tinsn->record_fix fields.
	(xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
	and vinsn_to_insnbuf.  Remove references to record_fix and
	slot_sub_symbols fields.
	(xtensa_mark_narrow_branches): Delete unused code.
	(is_narrow_branch_guaranteed_in_range): Handle expr that is not just
	a symbol.
	(convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
	record_fix fields.
	(tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
	(vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
	of the record_fix field.  Simplify error messages for unexpected
	symbolic operands.
	(set_expr_symbol_offset_diff): Delete.
 2006-01-31 19:36:57 +00:00
Paul Brook
791346475b 2006-01-31 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
gas/testsuite/
	* gas/testsuite/gas/arm/iwmmxt-bad.s: Add check for bad register name.
	* gas/testsuite/gas/arm/iwmmxt-bad.l: Ditto.
 2006-01-31 16:19:41 +00:00
Paul Brook
e74cfd166e 2006-01-31 Paul Brook <paul@codesourcery.com> 
Richard Earnshaw <rearnsha@arm.com>

	* gas/config/tc-arm.c: Use arm_feature_set.
	(arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
	arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
	fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
	New variables.
	(insns): Use them.
	(md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
	md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
	arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
	s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
	feature flags.
	(arm_legacy_option_table, arm_option_cpu_value_table): New types.
	(arm_opts): Move old cpu/arch options from here...
	(arm_legacy_opts): ... to here.
	(md_parse_option): Search arm_legacy_opts.
	(arm_cpus, arm_archs, arm_extensions, arm_fpus)
	(arm_float_abis, arm_eabis): Make const.

	* include/opcode/arm.h: Use ARM_CPU_FEATURE.
	(ARM_AEXT_*, FPU_ENDIAN_PURE, FPU_VFP_HARD): New.
	(arm_feature_set): Change to a structure.
	(ARM_CPU_HAS_FEATURE, ARM_MERGE_FEATURE_SETS, ARM_CLEAR_FEATURE,
	ARM_FEATURE): New macros.
 2006-01-31 14:11:13 +00:00
Bob Wilson
d47d412e85 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs. 2006-01-26 05:21:43 +00:00
Jie Zhang
b14273fe33 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate 
in load immediate intruction.
 2006-01-20 17:22:50 +00:00
Jie Zhang
39cd1c7675 * config/bfin-parse.y (value_match): Use correct conversion 
specifications in template string for __FILE__ and __LINE__.
	(binary): Ditto.
	(unary): Ditto.
 2006-01-20 16:57:09 +00:00
Alexandre Oliva
67a4f2b710 include/elf/ChangeLog: 
Introduce TLS descriptors for i386 and x86_64.
* common.h (DT_TLSDESC_GOT, DT_TLSDESC_PLT): New.
* i386.h (R_386_TLS_GOTDESC, R_386_TLS_DESC_CALL, R_386_TLS_DESC):
New.
* x86-64.h (R_X86_64_GOTPC32_TLSDESC, R_X86_64_TLSDESC_CALL,
R_X86_64_TLSDESC): New.
bfd/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* reloc.c (BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC,
BFD_RELOC_386_TLS_DESC_CALL, BFD_RELOC_X86_64_GOTPC32_TLSDESC,
BFD_RELOC_X86_64_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL): New.
* libbfd.h, bfd-in2.h: Rebuilt.
* elf32-i386.c (elf_howto_table): New relocations.
(R_386_tls): Adjust.
(elf_i386_reloc_type_lookup): Map new relocations.
(GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
(GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
(struct elf_i386_link_hash_entry): Add tlsdesc_got field.
(struct elf_i386_obj_tdata): Add local_tlsdesc_gotent field.
(elf_i386_local_tlsdesc_gotent): New macro.
(struct elf_i386_link_hash_table): Add sgotplt_jump_table_size.
(elf_i386_compute_jump_table_size): New macro.
(link_hash_newfunc): Initialize tlsdesc_got.
(elf_i386_link_hash_table_create): Set sgotplt_jump_table_size.
(elf_i386_tls_transition): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf_i386_check_relocs): Likewise.  Allocate space for
local_tlsdesc_gotent.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(allocate_dynrelocs): Count function PLT relocations.  Reserve
space for TLS descriptors and relocations.
(elf_i386_size_dynamic_sections): Reserve space for TLS
descriptors and relocations.  Set up sgotplt_jump_table_size.
Don't zero reloc_count in srelplt.
(elf_i386_always_size_sections): New.  Set up _TLS_MODULE_BASE_.
(elf_i386_relocate_section): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf_i386_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
(elf_backend_always_size_sections): Define.
* elf64-x86-64.c (x86_64_elf_howto): Add R_X86_64_GOTPC32_TLSDESC,
R_X86_64_TLSDESC, R_X86_64_TLSDESC_CALL.
(R_X86_64_standard): Adjust.
(x86_64_reloc_map): Map new relocs.
(elf64_x86_64_rtype_to_howto): New, split out of...
(elf64_x86_64_info_to_howto): ... this function, and...
(elf64_x86_64_reloc_type_lookup): ... use it to map elf_reloc_val.
(GOT_TLS_GDESC, GOT_TLS_GD_BOTH_P): New macros.
(GOT_TLS_GD_P, GOT_TLS_GDESC_P, GOT_TLS_GD_ANY_P): New macros.
(struct elf64_x86_64_link_hash_entry): Add tlsdesc_got field.
(struct elf64_x86_64_obj_tdata): Add local_tlsdesc_gotent field.
(elf64_x86_64_local_tlsdesc_gotent): New macro.
(struct elf64_x86_64_link_hash_table): Add tlsdesc_plt,
tlsdesc_got and sgotplt_jump_table_size fields.
(elf64_x86_64_compute_jump_table_size): New macro.
(link_hash_newfunc): Initialize tlsdesc_got.
(elf64_x86_64_link_hash_table_create): Initialize new fields.
(elf64_x86_64_tls_transition): Handle R_X86_64_GOTPC32_TLSDESC and
R_X86_64_TLSDESC_CALL.
(elf64_x86_64_check_relocs): Likewise.  Allocate space for
local_tlsdesc_gotent.
(elf64_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPC32_TLSDESC and
R_X86_64_TLSDESC_CALL.
(allocate_dynrelocs): Count function PLT relocations.  Reserve
space for TLS descriptors and relocations.
(elf64_x86_64_size_dynamic_sections): Reserve space for TLS
descriptors and relocations.  Set up sgotplt_jump_table_size,
tlsdesc_plt and tlsdesc_got.  Make room for them.  Don't zero
reloc_count in srelplt.  Add dynamic entries for DT_TLSDESC_PLT
and DT_TLSDESC_GOT.
(elf64_x86_64_always_size_sections): New.  Set up
_TLS_MODULE_BASE_.
(elf64_x86_64_relocate_section): Handle R_386_TLS_GOTDESC and
R_386_TLS_DESC_CALL.
(elf64_x86_64_finish_dynamic_symbol): Use GOT_TLS_GD_ANY_P.
(elf64_x86_64_finish_dynamic_sections): Set DT_TLSDESC_PLT and
DT_TLSDESC_GOT.  Set up TLS descriptor lazy resolver PLT entry.
(elf_backend_always_size_sections): Define.
binutils/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* readelf.c (get_dynamic_type): Handle DT_TLSDESC_GOT and
DT_TLSDESC_PLT.
gas/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
(optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
displacement bits.
(build_modrm_byte): Set up zero modrm for TLS desc calls.
(lex_got): Handle @tlsdesc and @tlscall.
(md_apply_fix, tc_gen_reloc): Handle the new relocations.
ld/testsuite/ChangeLog:
Introduce TLS descriptors for i386 and x86_64.
* ld-i386/i386.exp: Run on x86_64-*-linux* and amd64-*-linux*.
Add new tests.
* ld-i386/pcrel16.d: Add -melf_i386.
* ld-i386/pcrel8.d: Likewise.
* ld-i386/tlsbindesc.dd: New.
* ld-i386/tlsbindesc.rd: New.
* ld-i386/tlsbindesc.s: New.
* ld-i386/tlsbindesc.sd: New.
* ld-i386/tlsbindesc.td: New.
* ld-i386/tlsdesc.dd: New.
* ld-i386/tlsdesc.rd: New.
* ld-i386/tlsdesc.s: New.
* ld-i386/tlsdesc.sd: New.
* ld-i386/tlsdesc.td: New.
* ld-i386/tlsgdesc.dd: New.
* ld-i386/tlsgdesc.rd: New.
* ld-i386/tlsgdesc.s: New.
* ld-x86-64/x86-64.exp: Run new tests.
* ld-x86-64/tlsbindesc.dd: New.
* ld-x86-64/tlsbindesc.rd: New.
* ld-x86-64/tlsbindesc.s: New.
* ld-x86-64/tlsbindesc.sd: New.
* ld-x86-64/tlsbindesc.td: New.
* ld-x86-64/tlsdesc.dd: New.
* ld-x86-64/tlsdesc.pd: New.
* ld-x86-64/tlsdesc.rd: New.
* ld-x86-64/tlsdesc.s: New.
* ld-x86-64/tlsdesc.sd: New.
* ld-x86-64/tlsdesc.td: New.
* ld-x86-64/tlsgdesc.dd: New.
* ld-x86-64/tlsgdesc.rd: New.
* ld-x86-64/tlsgdesc.s: New.
 2006-01-18 21:07:51 +00:00
Nick Clifton
8ad7c533ee Fixes for building on 64-bit hosts: 
* config/tc-avr.c (mod_index): New union to allow conversion
        between pointers and integers.
        (md_begin, avr_ldi_expression): Use it.
        * config/tc-i370.c (md_assemble): Add cast for argument to print
        statement.
        * config/tc-tic54x.c (subsym_substitute): Likewise.
        * config/tc-mn10200.c (md_assemble): Use a union to convert the
        opindex field of fr_cgen structure into a pointer so that it can
        be stored in a frag.
        * config/tc-mn10300.c (md_assemble): Likewise.
        * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
        types.
        * config/tc-v850.c: Replace uses of (int) casts with correct
        types.
        * gas/tic54x/address.d: Work with 64bit hosts.
        * gas/tic54x/addrfar.d: Likewise.
        * gas/tic54x/align.d: Likewise.
        * gas/tic54x/all-opcodes.d: Likewise.
        * gas/tic54x/asg.d: Likewise.
        * gas/tic54x/cons.d: Likewise.
        * gas/tic54x/consfar.d: Likewise.
        * gas/tic54x/extaddr.d: Likewise.
        * gas/tic54x/field.d: Likewise.
        * gas/tic54x/labels.d: Likewise.
        * gas/tic54x/loop.d: Likewise.
        * gas/tic54x/lp.d: Likewise.
        * gas/tic54x/macro.d: Likewise.
        * gas/tic54x/math.d: Likewise.
        * gas/tic54x/opcodes.d: Likewise.
        * gas/tic54x/sections.d: Likewise.
       * gas/tic54x/set.d: Likewise.
       * gas/tic54x/struct.d: Likewise.
       * gas/tic54x/subsym.d: Likewise.
 2006-01-11 17:39:50 +00:00
Hans-Peter Nilsson
e0f6ea40b1 PR gas/2101 
* config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
	a local-label reference.
 2006-01-03 05:56:15 +00:00
Bob Wilson
b2d179beda include: 
* xtensa-config.h (XCHAL_HAVE_WIDE_BRANCHES): New.
gas:
	* config/tc-xtensa.c (op_placement_info_struct): Delete single,
	single_size, widest, and widest_size fields.  Add narrowest_slot.
	(xg_emit_insn_to_buf): Remove fmt parameter and compute it here.
	Use xg_get_single_slot to find the slot.
	(finish_vinsn): Use emit_single_op instead of bundle_single_op.
	(bundle_single_op): Rename this to....
	(bundle_tinsn): ...this function, which builds a vliw_insn but does
	not call finish_vinsn.
	(emit_single_op): Use bundle_tinsn instead of bundle_single_op.
	(relax_frag_immed): Get num_slots from cur_vinsn.
	(convert_frag_narrow): Update call to xg_emit_insn_to_buf.
	(convert_frag_immed): Likewise.  Also, get num_slots from cur_vinsn.
	(init_op_placement_info_table): Set narrowest_slot field.  Remove
	code for deleted fields.
	(xg_get_single_size): Return narrowest_size field, not single_size.
	(xg_get_single_format): Return narrowest field, not single.
	(xg_get_single_slot): New.
	(tinsn_to_insnbuf): Rewrite to use tinsn_to_slotbuf.
	* config/xtensa-relax.c (widen_spec_list): Add wide branch relaxations.
	(transition_applies): Check wide branch option availability.
 2005-12-30 23:34:00 +00:00
Bob Wilson
cf523b8ea1 * config/tc-xtensa.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. 2005-12-30 00:57:27 +00:00
Bob Wilson
b7c8023245 * config/tc-xtensa.c (tinsn_to_slotbuf): Do not zero slotbuf. 2005-12-29 21:04:14 +00:00
Nathan Sidwell
f07efa0b37 * config/tc-mt.c (mt_arch): Default to ms1_16_002. 
(md_parse_options): Only allow lowercase.
	(md_show_usage): Update.
 2005-12-27 18:38:05 +00:00
Nick Clifton
0359e808fd PR 1300 
* config/tc-arm.c (md_apply_fix): Fix casts to match type in printf format.
 2005-12-27 11:55:37 +00:00
Nick Clifton
1f6293bd04 Fix typo in previous delta 2005-12-22 15:46:55 +00:00
Nick Clifton
53f42b38a0 Convert to ISO C90 format. Fix formatting and white space usage as well. 2005-12-22 15:39:11 +00:00
Bob Wilson
b5e4a23d9f * config/tc-xtensa.c (xtensa_mark_narrow_branches): Set 
is_aligning_branch flag.
	(find_address_of_next_align_frag): Limit by xtensa_fetch_width.
	(future_alignment_required): Except for frags with is_aligning_branch
	flag set, call frag_wane for frags that do not need to be reexamined
	for aligning.
	(relax_frag_immed): Replace orig_vinsn with cur_vinsn to fix a leak.
	(convert_frag_immed): Likewise.
	(convert_frag_narrow): Check is_aligning_branch flag.
	* config/tc-xtensa.h (xtensa_frag_type): Add is_aligning_branch flag.
 2005-12-20 19:37:26 +00:00
Bob Wilson
65738a7dbc * config/tc-xtensa.c (xg_find_narrowest_format): Optimize 1 slot case. 
(xg_init_vinsn): Remove redundant initialization.
	(xg_clear_vinsn): Zero all the slots with a single memset.
	* config/xtensa-istack.h (vliw_insn): Move insnbuf field after slots.
 2005-12-20 18:13:32 +00:00
Nathan Sidwell
d031aafbfe Second part of ms1 to mt renaming. 
* bfd/archures.c (bfd_arch_mt): Renamed.
	(bfd_mt_arch): Renamed.
	(bfd_archures_list): Adjusted.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/config.bfd (mt): Remove special case targ_archs.
	(mt-*-elf): Rename bfd_elf32_mt_vec.
	* bfd/configure: Rebuilt.
	* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
	(selarchs) Remove mt special case.
	* bfd/cpu-mt.c (arch_info_struct): Adjust.
	(bfd_mt_arch): Renamed, adjust.
	* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
	mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
	mt_elf_howto_table): Renamed, adjusted.
	(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
	elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
	mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
	mt_elf_print_private_bfd_data): Renamed, adjusted.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
	ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
	bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
	elf_backend_gc_sweep_hook, elf_backend_check_relocs,
	eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
	bfd_elf32_bfd_copy_private_bfd_data,
	bfd_elf32_bfd_merge_private_bfd_data,
	bfd_elf32_bfd_print_private_bfd_data): Adjusted.
	* bfd/libbfd.h: Regenerated.
	* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
	BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
	BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
	* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
	(_bfd_target_vector): Adjusted.
	* binutils/readelf.c (guess_is_rela): Use EM_MT.
	(dump_relocations, get_machine_name): Adjust.

	* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
	(define-mach): Adjust.
	* cpu/mt.opc (CGEN_ASM_HASH): Update.
	(mt_asm_hash, mt_cgen_insn_supported): Renamed.
	(parse_loopsize, parse_imm16): Adjust.

	* gas/configure: Rebuilt.
	* gas/configure.in (mt): Remove special case.
	* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
	#includes.
	(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
	Rename, adjust.
	(md_parse_option, md_show_usage, md_begin, md_assemble,
	md_cgen_lookup_reloc, md_atof): Adjust.
	(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
	* gas/config/tc-mt.h (TC_MT): Rename.
	(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
	(md_apply_fix): Adjust.
	(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
	(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.

	* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
	(mt_register_name, mt_register_type, mt_register_reggroup_p,
	mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
	mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
	mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
	mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
	mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
	mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
	_initialize_mt_tdep): Rename & adjust.

	* include/dis-asm.h (print_insn_mt): Renamed.

	* include/elf/common.h (EM_MT): Renamed.
	* include/elf/mt.h: Rename relocs, cpu & other defines.

	* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.

	* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
	(stamp-mt): Adjust rule.
	(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
	adjust.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure: Rebuilt.
	* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
	* opcodes/disassemble.c (ARCH_mt): Renamed.
	(disassembler): Adjust.
	* opcodes/mt-asm.c: Renamed, rebuilt.
	* opcodes/mt-desc.c: Renamed, rebuilt.
	* opcodes/mt-desc.h: Renamed, rebuilt.
	* opcodes/mt-dis.c: Renamed, rebuilt.
	* opcodes/mt-ibld.c: Renamed, rebuilt.
	* opcodes/mt-opc.c: Renamed, rebuilt.
	* opcodes/mt-opc.h: Renamed, rebuilt.

	* sid/Makefile.in: Rebuilt.
	* sid/aclocal.m4: Rebuilt.
	* sid/configure: Rebuilt.
	* sid/sid.spec: Adjust.
	* sid/bsp/Makefile.am: Adjust.
	* sid/bsp/Makefile.in: Rebuilt.
	* sid/bsp/aclocal.m4: Rebuilt.
	* sid/bsp/configrun-sid.in: Adjust.
	* sid/bsp/pregen/Makefile.in: Rebuilt.
	* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
	* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
	* sid/bsp/pregen/pregen-configs.in: Adjust.
	* sid/component/aclocal.m4: Rebuilt.
	* sid/component/configure: Rebuilt.
	* sid/component/tconfig.in: Adjust.
	* sid/component/bochs/aclocal.m4: Rebuilt.
	* sid/component/cache/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
	* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
	* sid/component/cgen-cpu/configure: Rebuilt.
	* sid/component/cgen-cpu/configure.in: Rebult.
	* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
	* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
	* sid/component/cgen-cpu/mt/mt.h: Adjust.
	* sid/component/consoles/Makefile.in: Rebuilt.
	* sid/component/families/aclocal.m4: Rebuilt.
	* sid/component/families/configure: Rebuilt.
	* sid/component/gdb/Makefile.in: Rebuilt.
	* sid/component/gloss/Makefile.in: Rebuilt.
	* sid/component/glue/Makefile.in: Rebuilt.
	* sid/component/ide/Makefile.in: Rebuilt.
	* sid/component/interrupt/Makefile.in: Rebuilt.
	* sid/component/lcd/Makefile.in: Rebuilt.
	* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
	* sid/component/loader/Makefile.am: Rebuilt.
	* sid/component/loader/Makefile.in: Rebuilt.
	* sid/component/mapper/Makefile.in: Rebuilt.
	* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
	* sid/component/memory/Makefile.in: Rebuilt.
	* sid/component/mmu/Makefile.in: Rebuilt.
	* sid/component/parport/Makefile.in: Rebuilt.
	* sid/component/profiling/Makefile.in: Rebuilt.
	* sid/component/rtc/Makefile.in: Rebuilt.
	* sid/component/sched/Makefile.in: Rebuilt.
	* sid/component/testsuite/Makefile.in: Rebuilt.
	* sid/component/timers/aclocal.m4: Rebuilt.
	* sid/component/timers/configure: Rebuilt.
	* sid/component/uart/Makefile.in: Rebuilt.
	* sid/component/uart/testsuite/Makefile.in: Rebuilt.
	* sid/config/config.sub: Adjust.
	* sid/config/info.tcl.in: Adjust.
	* sid/config/sidtargets.m4: Adjust.
	* sid/doc/Makefile.in: Rebuilt.
	* sid/main/dynamic/Makefile.am: Rebuilt.
	* sid/main/dynamic/Makefile.in: Rebuilt.
	* sid/main/dynamic/aclocal.m4: Rebuilt.
	* sid/main/dynamic/configure: Rebuilt.
 2005-12-16 10:23:12 +00:00
Jan Beulich
b190548998 gas/ 
2005-12-14  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (add_prefix): More fine-grained handling of
	REX prefixes. Or new prefix value into i.prefix instead of
	assigning.

gas/testsuite/
2005-12-14  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/rex.[sd]: New.
	* gas/i386/i386.exp: Run new test.
 2005-12-14 08:57:06 +00:00
DJ Delorie
bbc434cbc9 * config/tc-m32c.c (m32c_md_end): Only pad code sections. 2005-12-14 02:27:34 +00:00
Paul Brook
39b41c9ca8 2005-12-12 Paul Brook <paul@codesourcery.com> 
bfd/
	* bfd-in2.h: Regenerate.
	* elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	(check_use_blx): New function.
	(bfd_elf32_arm_process_before_allocation): Don't allocate glue if
	using BLX.
	(elf32_arm_final_link_relocate): Perform bl<->blx conversion for
	R_ARM_CALL and R_ARM_THM.
	(elf32_arm_get_eabi_attr_int): New function.
	(elf32_arm_size_dynamic_sections): Call check_use_blx.
	* libbfd.h: Regenerate.
	* reloc.c: Add BFD_RELOC_ARM_PCREL_CALL and BFD_RELOC_ARM_PCREL_JUMP.
gas/
	* config/tc-arm.c (do_branch): Generate EABI branch relocations.
	(do_bl): New function.
	(do_blx): Generate BFD_RELOC_ARM_PCREL_CALL relocation.
	(do_t_blx): Generate BFD_RELOC_THUMB_PCREL_BRANCH23.
	(insns): Use do_bl.
	(md_pcrel_from_section): Add BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	(md_apply_fix): Merge BFD_RELOC_ARM_PCREL_BRANCH and
	BFD_RELOC_ARM_PCREL_BLX cases.  Handle BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	(tc_gen_reloc): Handle BFD_RELOC_ARM_PCREL_CALL and
	BFD_RELOC_ARM_PCREL_JUMP.
	gas/testsuite/
	* gas/arm/pic.d: Allow R_ARM_CALL relocations.
include/elf/
	* arm.h (elf32_arm_get_eabi_attr_int): Add prototype.
ld/testsuite/
	* ld-arm/arm-call.d: New test.
	* ld-arm/arm-call1.s: New file.
	* ld-arm/arm-call1.s: New file.
	* ld-arm/arm-elf.exp: Add arm-call and mixed-app-v5.
	* ld-arm/arm.ld: Add .glue_7 and .ARM.attribues.
	* ld-arm/mixed-app-v5.d: New file.
	* ld-arm/mixed-app.r: Tweak expected output.
 2005-12-12 17:03:40 +00:00