* elf.c (IS_SECTION_IN_INPUT_SEGMENT): New.
(INCLUDE_SECTION_IN_SEGMENT): Use IS_SECTION_IN_INPUT_SEGMENT.
(rewrite_elf_program_header): Don't preserve segment physical
address in the output segment if the first section in the
corresponding input segment is removed.
(cie_compare): Removed.
(cie_eq, cie_hash, cie_compute_hash): New functions.
(_bfd_elf_discard_section_eh_frame): Rewrite not to rely on FDEs
pointing only to last CIE and allow merging of any duplicate CIEs,
not just duplicate consecutive CIEs.
(_bfd_elf_discard_section_eh_frame_hdr): Delete cies hash table.
* elf-bfd.h (struct cie_header, struct cie): Removed.
(struct eh_frame_sec_info): Remove alloced field.
(struct eh_frame_hdr_info): Remove last_cie, last_cie_sec
and last_cie_inf fields. Add cies field.
* ld-elf/eh5.d: New test.
* ld-elf/eh5.s: New file.
* ld-elf/eh5a.s: New file.
* ld-elf/eh5b.s: New file.
section. Save result of checks in kept_section.
(_bfd_elf_section_already_linked): Tidy. Correct comments.
Ignore all group member sections. Handle special matching of
single-member groups against linkonce sections via their group
section. When such a match is found, set kept_section to the
group member section rather than to the group.
* pei-arm-wince.c (LOCAL_LABEL_PREFIX): Likewise.
* coff-arm.c (LOCAL_LABEL_PREFIX): Only define if not defined before.
* gas/arm/undefined.d: Run test on Windows CE.
* gas/arm/undefined_coff.d: Don't run test on Windows CE.
on error.
(find_arm_glue): Likewise.
(elf32_thumb_to_arm_stub, elf32_arm_create_thumb_stub)
(elf32_arm_to_thumb_stub, elf32_arm_final_link_relocate): Add
ERROR_MESSAGE argument and pass it through.
(elf32_arm_to_thumb_export_stub): Update.
(elf32_arm_relocate_section): Use ERROR_MESSAGE and reloc_dangerous.
(struct _ppc64_elf_section_data): Move "t_symndx" into opd union,
and rename fields. Add sec_type and has_14bit_branch.
(struct ppc_link_hash_table): Remove has_14bit_branch.
(get_opd_info, get_tls_mask, ppc64_elf_edit_opd): Adjust.
(ppc64_elf_relocate_section): Likewise.
(ppc64_elf_check_relocs): Likewise. Set per-section has_14bit_branch.
(ppc64_elf_size_stubs): Don't set default group size here.
(group_sections): Instead do so here, and group sections using
their individual requirements.
and union.
(struct ppc_link_hash_entry): Add "next_dot_sym".
(struct ppc_link_hash_table): Add "dot_syms".
(link_hash_newfunc): Make list of syms starting with a dot.
(ppc_get_stub_entry, adjust_opd_syms): Adjust.
(ppc64_elf_add_symbol_hook): Don't set has_dotsym.
(struct add_symbol_adjust_data): Delete.
(add_symbol_adjust): Simplify params and return.
(ppc64_elf_check_directives): Just process the "dot_syms" lists,
not all syms.
* elf-bfd.h (local_call_stubs): New member.
* elfxx-mips.c (FN_STUB_P, CALL_STUB_P, CALL_FP_STUB_P): New macros.
(mips_elf_calculate_relocation): Handle local mips16 call stubs.
(mips16_stub_section_p): Rename from mips_elf_stub_section_p, use
the new stub macros.
(_bfd_mips_elf_check_relocs): Handle call stubs for code which
mixes mips16 and mips32 functions. Use mips16_stub_section_p. Mark
used stubs with SEC_KEEP. Use the new stub macros.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips16-intermix.d, gas/mips/mips16-intermix.s: New
testcase.
* gas/mips/mips.exp: Run new testcase.
[ ld/testsuite/ChangeLog ]
* ld-mips-elf/mips16-intermix-1.s, ld-mips-elf/mips16-intermix-2.s,
ld-mips-elf/mips16-intermix.d: New testcase.
* ld-mips-elf/mips-elf.exp (mips16_intermix_test): Run new testcases.
* elf.c (_bfd_elf_init_private_section_data): Assert output
section ELF type instead of check if it is SHT_NULL. Copy
OS/PROC specific flags from input section to output section.
* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Make the
size of .rel.dyn reflect the value of DT_RELSZ.
ld/testsuite/
* ld-mips-elf/multi-got-1.d: Remove trailing R_MIPS_NONE entries.
* ld-mips-elf/tls-multi-got-1.got: Likewise.
* ld-mips-elf/tls-multi-got-1.r: Likewise.
* elfxx-mips.c (_bfd_mips_elf_additional_program_headers): Allocate
a PT_NULL header for dynamic objects.
(_bfd_mips_elf_modify_segment_map): Add it.
ld/testsuite/
* ld-mips-elf/multi-got-1.d: Do not expect a particular address
for DT_HASH.
* ld-mips-elf/rel32-o32.d: Bump addresses by 0x20 to account for
the extra program header.
* ld-mips-elf/rel32-n32.d: Likewise.
* ld-mips-elf/tlslib-o32.got: Likewise.
* ld-mips-elf/tlslib-o32-hidden.got: Likewise.
* ld-mips-elf/tlslib-o32-ver.got: Likewise.
* ld-mips-elf/tls-multi-got-1.got: Likewise.
* ld-mips-elf/tls-multi-got-1.r: Likewise.
* ld-mips-elf/rel64.d: Bump addresses by 0x30 to account for the
extra program header.
* ld-mips-elf/tlsdyn-o32.d: Reduce the GOT offset by 32 to account
for the extra program header, and thus the shorter gap between the
text and data segments.
* ld-mips-elf/tlsdyn-o32-1.d: Likewise.
* ld-mips-elf/tlsdyn-o32-2.d: Likewise.
* ld-mips-elf/tlsdyn-o32-3.d: Likewise.
* ld-mips-elf/tlsdyn-o32.got: Bump GOT text addresses by 0x20
to account for the extra program header.
* ld-mips-elf/tlsdyn-o32-1.got: Likewise.
* ld-mips-elf/tlsdyn-o32-2.got: Likewise.
* ld-mips-elf/tlsdyn-o32-3.got: Likewise.
* elfxx-mips.c (sort_dynamic_relocs): Sort relocations against the
same symbol by increasing r_offset.
(sort_dynamic_relocs_64): Likewise. Fix comparisons between very
large and very small symbol indexes.
ld/testsuite/
* ld-mips-elf/tlslib-o32-hidden.got: Sort relocations against the
same symbol in order of increasing r_offset.
* ld-mips-elf/tls-multi-got-1.got: Likewise.
* ld-mips-elf/tls-hidden3.r: Likewise.
* ld-mips-elf/tls-hidden4.r: Likewise.
* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Add DT_DEBUG
and DT_MIPS_RLD_MAP tags for position-independent executables.
Do not add DT_DEBUG to shared libraries for any MIPS target.
ld/testsuite/
* ld-mips-elf/multi-got-1.d: Remove DT_DEBUG tag. Do not require
a specific file offset for .dynamic. Reduce DT_HASH by 8 to account
for removed tag.
* ld-mips-elf/tls-multi-got-1.r: Likewise. Also reduce DT_REL by 8.
Reduce PLTGOT and symbol values by 16 to account for the removed tag.
* ld-mips-elf/textrel-1.d: Remove DT_DEBUG tag.
* ld-mips-elf/rel32-n32.d: Reduce addresses by 16 to account for
removed DT_DEBUG tag.
* ld-mips-elf/rel64.d: Likewise.
* ld-mips-elf/tls-multi-got-1.got: Likewise.
* ld-mips-elf/tlslib-o32-hidden.got: Likewise.
* bfd/elf64-sparc.c: Add FreeBSD support.
(elf64_sparc_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_sparc_freebsd_vec.
* bfd/config.bfd (sparc64-*-freebsd*): Set targ_defvec to bfd_elf64_sparc_freebsd_vec.
* bfd/configure.in: Add entry for bfd_elf64_sparc_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-sparc.c (md_parse_option): Treat any target starting with elf32-sparc
as a viable target for the -32 switch and any target starting with elf64-sparc as a
viable target for the -64 switch.
(sparc_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64
while for 32-bit ELF flavoured output use ELF_TARGET_FORMAT.
* gas/config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf64_sparc_fbsd.sh (OUTPUT_FORMAT): Define as elf64-sparc-freebsd.
* elf-eh-frame.c (skip_cfa_op): Fix handling of DW_CFA_advance_loc.
Handle DW_CFA_{remember,restore}_state, DW_CFA_GNU_window_save,
DW_CFA_val_{offset{,_sf},expression}.
(skip_non_nops): Record number of DW_CFA_set_loc ops.
(_bfd_elf_discard_section_eh_frame): Require skip_non_nops recognizes
all ops. If there are any DW_CFA_set_loc ops and they are pcrel
or going to be pcrel, compute set_loc array.
(_bfd_elf_eh_frame_section_offset): If make_relative, kill relocations
against DW_CFA_set_loc operands.
(_bfd_elf_write_section_eh_frame): Handle DW_CFA_set_loc adjusting.
* ld-elf/eh4.d: New test.
* ld-elf/eh4.s: New file.
* ld-elf/eh4a.s: New file.
* pei-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Enable 16 byte
alignment for .data$, .rdata$ and .text$ sections so that sse
and sse2 code will work for linkonce sections too.
* pe-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
argument and emits the string followed by a comma and then the length of
the string.
(CONST_STRNEQ): New macro. Checks to see if a variable string has a constant
string as its initial characters.
(CONST_STRNCPY): New macro. Copies a constant string to the start of a
variable string.
* bfd-in2.h: Regenerate.
* <remainign files>: Make use of the new macros.
* elf.c (_bfd_elf_copy_private_header_data): Fix group members
that have had their SHT_GROUP section removed.
* objcopy.c (group_signature): New function, split out from..
(setup_section): ..here.
(is_strip_section): Return true for SHT_GROUP sections that are
going to lose their group signature symbol.
2006-09-12 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3197
* elflink.c (elf_link_output_extsym): Compute bucket only if
needed.
ld/testsuite/
2006-09-12 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3197
* ld-elf/hash.d: New test.
* elf32-arm.c (elf32_arm_swap_symbol_out): Remove
unconditional setting of low bit for Thumb symbol
mistakenly left behind after check for external
symbols was added. Fix comment typo.
* elf32-xtensa.c (xtensa_get_property_section_name): Delete.
(xtensa_get_property_section): New.
(xtensa_read_table_entries): Use xtensa_get_property_section.
(relax_property_section, xtensa_get_property_predef_flags): Handle
group name suffixes in property section names.
(match_section_group): New.
gas/
* config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
(INIT_LITERAL_SECTION_NAME): Delete.
(lit_state struct): Remove segment names, init_lit_seg, and
fini_lit_seg. Add lit_prefix and current_text_seg.
(init_literal_head_h, init_literal_head): Delete.
(fini_literal_head_h, fini_literal_head): Delete.
(xtensa_begin_directive): Move argument parsing to
xtensa_literal_prefix function.
(xtensa_end_directive): Deallocate lit_prefix field of lit_state.
(xtensa_literal_prefix): Parse the directive argument here and
record it in the lit_prefix field. Remove code to derive literal
section names.
(linkonce_len): New.
(get_is_linkonce_section): Use linkonce_len. Check for any
".gnu.linkonce.*" section, not just text sections.
(md_begin): Remove initialization of deleted lit_state fields.
(xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
to init_literal_head and fini_literal_head.
(xtensa_move_literals): Likewise. Skip literals for .init and .fini
when traversing literal_head list.
(match_section_group): New.
(cache_literal_section): Rewrite to determine the literal section
name on the fly, create the section and return it.
(xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
(xtensa_switch_to_non_abs_literal_fragment): Likewise.
(xtensa_create_property_segments, xtensa_create_xproperty_segments):
Use xtensa_get_property_section from bfd.
(retrieve_xtensa_section): Delete.
* doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
description to refer to plural literal sections and add xref to
the Literal Directive section.
(Literal Directive): Describe new rules for deriving literal section
names. Add footnote for special case of .init/.fini with
--text-section-literals.
(Literal Prefix Directive): Replace old naming rules with xref to the
Literal Directive section.
ld/
* emulparams/elf32xtensa.sh (.xt.prop): Add .xt.prop.*.
* scripttempl/elfxtensa.sc (.text): Add .literal.*.
* Makefile.am: Add rules to build pe-arm-wince.lo and pei-arm-wince.lo objects.
* Makefile.in: Regenerate.
* pe-arm-wince.c: New file.
* pei-arm-wince.c: New file.
* pei-arm.c: Remove ARM_WINCE block.
* pe-arm.c: Remove ARM_WINCE block. Rename
bfd_arm_pe_allocate_interworking_sections,
bfd_arm_pe_get_bfd_for_interworking, and
bfd_arm_pe_process_before_allocation to
bfd_armpe_allocate_interworking_sections,
bfd_armpe_get_bfd_for_interworking, and
bfd_armpe_process_before_allocation. Move them before including bfd.h.
* bfd.c: ARM wince bfd format names were renamed. Adjust.
* coff-arm.c [ARM_WINCE]: Adjust so Windows CE doesn't end up with unexpected/conflicting relocs.
* targets.c: The arm-wince-pe target got its own new vector. Adjust.
* config.bfd: Likewise.
* configure.in: Likewise.
* configure: Regenerate.
binutils
* configure.in: Split arm-pe and arm-wince-pe. Build dlltool with -DDLLTOOL_ARM_WINCE for Windows CE case.
* configure: Regenerate.
* dlltool.c: Add support for arm-wince.
gas
* Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
* Makefile.in: Regenerate.
* config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were renamed. Adjust.
ld
* Makefile.am: Split arm-wince into its own emulation.
* Makefile.in: Regenerate.
* configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets.
* pe-dll.c : Define PE_ARCH_arm_wince.
(pe_detail_list): Add PE_ARCH_arm_wince case.
(make_one): Handle PE_ARCH_arm_epoc and PE_ARCH_arm_wince cases.
* emulparams/arm_wince_pe.sh: New file.
* emultempl/pe.em: Handle new TARGET_IS_arm_wince_pe define.
Remap bfd_arm_allocate_interworking_sections, bfd_arm_get_bfd_for_interworking and
bfd_arm_process_before_allocation for arm-pe and arm-wince-pe targets too.
(gld_${EMULATION_NAME}_recognized_file): Handle arm-wince and arm-epoc bfd format names.
2006-08-16 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3015
* elf.c (get_program_header_size): Add a PT_GNU_RELRO segment
only if there is a PT_DYNAMIC segment.
(_bfd_elf_map_sections_to_segments): Likewise.
(assign_file_positions_for_load_sections): Set PT_GNU_RELRO
segment alignment to 1.
ld/testsuite/
2006-08-16 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3015
* ld-elf/binutils.exp: Add tests for "-z relro".
(elf32_mn10300_count_hash_table_entries): New.
(elf32_mn10300_list_hash_table_entries): New.
(sort_by_value): New.
(mn10300_elf_relax_section): Don't skip data sections; restrict
code-specific tests to code-specific areas so that potential
indirect calls can be detected. Check for multiple local symbols
at the same address and merge their flags.
(elf32_mn10300_link_hash_newfunc): Initialize value.
* coff-arm.c (coff_arm_rtype_to_howto) [COFF_WITH_PE]: Handle ARM_SECREL.
(coff_arm_reloc_type_lookup): Map BFD_RELOC_32_SECREL to ARM_SECREL.
* pe-arm.c [COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
* pei-arm.c [TARGET_UNDERSCORE]: Define for ARM_WINCE like in pe-arm.c.
[COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
* config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF only block.
(pe_directive_secrel) [TE_PE]: New function.
(md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file, loc, loc_mark_labels.
[TE_PE]: Handle secrel32.
(output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn call.
(output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
(arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
(md_section_align): Only round section sizes here for AOUT targets.
(tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
(tc_pe_dwarf2_emit_offset): New function.
(md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
(cons_fix_new_arm): Handle O_secrel.
* config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out of OBJ_ELF only block.
[TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare tc_pe_dwarf2_emit_offset.
* ld-pe/pe.exp: Enable tests on arm-wince-pe.
* ld-pe/secrel.d: Adjust test to work on arm-wince-pe too.
* lexsup.c: Add --print-gc-sections and --no-print-gc-sections switches.
* ld.texinfo: Document new switches.
* NEWS: Mention new switches.
* bfdlink.h (struct bfd_link_info): New field: print_gc_sections.
* elflink.c (elf_gc_sweep): If info.print_gc_sections is true, list removed sections to stderr.
2006-08-02 Richard Sandiford <richard@codesourcery.com>
Kazu Hirata <kazu@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and
bfd_elf32_shlvxworks_vec.
* configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo.
(bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise.
(bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise.
(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise.
(bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise.
(bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise.
(bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise.
(bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas.
* configure: Regenerate.
* Makefile.am: Regenerate dependencies.
* Makefile.in: Regenerate.
* elf-vxworks.c (elf_vxworks_gott_symbol_p): New function.
(elf_vxworks_add_symbol_hook): Use it.
(elf_vxworks_link_output_symbol_hook): Likewise. Use the hash
table entry to check for weak undefined symbols and to obtain
the original bfd.
(elf_vxworks_emit_relocs): Use target_index instead of this_idx.
* elf32-sh-relocs.h: New file, split from elf32-sh.c.
(R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field,
SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the
special_function field.
(R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too.
(R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise.
(R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise.
(R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise.
(R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise.
(R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise.
(SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file.
* elf32-sh.c: Include elf32-vxworks.h.
(MINUS_ONE): Define.
(sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32
set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set
to sh_elf_reloc.
(sh_vxworks_howto_table): New variable. Include elf32-sh-relocs.h
with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and
SH_ELF_RELOC set to bfd_elf_generic_reloc.
(vxworks_object_p, get_howto_table): New functions.
(sh_elf_reloc_type_lookup): Fix typo. Use get_howto_table.
(sh_elf_info_to_howto): Use get_howto_table.
(sh_elf_relax_section): Honor the partial_inplace field of the
R_SH_DIR32 howto.
(sh_elf_relax_delete_bytes): Likewise.
(elf_sh_plt_info): New structure.
(PLT_ENTRY_SIZE): Replace both definitions with...
(ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for
INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_entry_be): Update sizes of both definitions accordingly.
(elf_sh_plt0_entry_le): Likewise.
(elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise.
(elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise.
(elf_sh_plts): New structure, with separate definitions for
INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_entry): Delete both definitions.
(elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise.
(elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise.
(elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise.
(elf_sh_plt_reloc_offset): Likewise.
(movi_shori_putval): Delete in favor of...
(install_plt_field): ...this new function, with separate definitions
for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(get_plt_info): New function, with separate definitions
for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
(elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete.
(VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros.
(vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants.
(vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise.
(vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise.
(get_plt_index, get_plt_offset): New functions.
(elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields.
(sh_elf_link_hash_table_create): Initialize them.
(sh_elf_create_dynamic_sections): Call
elf_vxworks_create_dynamic_sections for VxWorks.
(allocate_dynrelocs): Use htab->plt_info to get the size of PLT
entries. Allocate relocation entries in .rela.plt.unloaded if
generating a VxWorks executable.
(sh_elf_always_size_sections): New function.
(sh_elf_size_dynamic_sections): Extend .rela.plt handling to
.rela.plt.unloaded.
(sh_elf_relocate_section): Use get_howto_table. Honor
partial_inplace when calculating the addend for dynamic
relocations. Use get_plt_index.
(sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field
and htab->plt_info. Fill in the bra .plt offset for VxWorks
executables. Populate .rela.plt.unloaded. Do not make
_GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
(sh_elf_finish_dynamic_sections): Use install_plt_field and
htab->plt_info. Handle cases where there is no special PLT header.
Populate the first relocation in .rela.plt.unloaded and fix up
the remaining entries.
(sh_elf_plt_sym_val): Use get_plt_info.
(elf_backend_always_size_sections): Define.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks.
(TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise.
(elf32_bed, elf_backend_want_plt_sym): Likewise.
(elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise.
(elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_link_output_symbol_hook): Likewise.
(elf_backend_emit_relocs): Likewise.
(elf_backend_final_write_processing): Likewise.
(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise.
* targets.c (bfd_elf32_shlvxworks_vec): Declare.
(bfd_elf32_shvxworks_vec): Likewise.
(_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and
bfd_elf32_shvxworks_vec.
gas/
* config/tc-sh.c (apply_full_field_fix): New function.
(md_apply_fix): Use it instead of md_number_to_chars. Do not fill
in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
(tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
* config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
ld/
2006-08-02 Richard Sandiford <richard@codesourcery.com>
Kazu Hirata <kazu@codesourcery.com>
Phil Edwards <phil@codesourcery.com>
* Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and
eshlelf_vxworks.o.
(eshelf_vxworks.c, eshlelf_vxworks.c): New rules.
* Makefile.in: Regenerate.
* configure.tgt (sh-*-vxworks): Use shelf_vxworks and
shlelf_vxworks.
* emulparams/shelf_vxworks.sh: New file.
* emulparams/shlelf_vxworks.sh: Likewise.
* emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}.
(OTHER_END_SYMBOLS): Likewise _ehdr.
(DATA_END_SYMBOLS): Likewise _edata.
* emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd
is indeed an ELF file before dealing with --force-dynamic.
ld/testsuite/
* ld-sh/rd-sh.exp: Treat vxworks1-static.d specially.
* ld-sh/sh-vxworks.exp: New file.
* ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to
sh-*-vxworks.
* ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd,
* ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd,
* ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s,
* ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd,
* ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s,
* ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s,
* ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd,
* ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd,
* ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s,
* ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s,
* ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
* bfd/elf64-x86-64.c: Add FreeBSD support.
(elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
(i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
bfd/
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM.
gas/
* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
(md_convert_frag): Use correct reloc for add_pc. Use
BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
gas/testsuite/
* gas/arm/thumb2_add.d: New test.
* gas/arm/thumb2_add.s: New test.
2006-07-12 H.J. Lu <hongjiu.lu@intel.com>
PR ld/2884
* elflink.c (_bfd_elf_merge_symbol): Copy the symbol info from
the old versioned dynamic definition to the new one with
non-default visibility. Hide the symbol if it is hidden or
internal.
ld/testsuite/
2006-07-12 H.J. Lu <hongjiu.lu@intel.com>
PR ld/2884
* ld-elf/begin.c: New file.
* ld-elf/end.c: Likewise.
* ld-elf/endhidden.c: Likewise.
* ld-elf/endprotected.c: Likewise.
* ld-elf/foo.c: Likewise.
* ld-elf/foo.map: Likewise.
* ld-elf/hidden.out: Likewise.
* ld-elf/main.c: Likewise.
* ld-elf/normal.out: Likewise.
* ld-elf/shared.exp: Likewise.
* lib/ld-lib.exp (run_cc_link_tests): New.
2006-07-12 Matthew R. Dempsky <mrd@alkemio.org>
* cpu-m68k.c (bfd_m68k_compatible): Handle CPU32.
ld/testsuite/
2006-07-12 Richard Sandiford <richard@codesourcery.com>
* ld-m68k/merge-ok-1c.d: New test.
* ld-m68k/m68k.exp: Run it.
bfd/
* elf32-arm.c (elf32_arm_swap_symbol_out): Don't set low
bit for undefined symbols.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/use-thumb-lib.s: New file.
* ld-arm/use-thumb-lib.sym: New file.
to R_ARM_LDC_SB_G{0,1,2} respectively.
bfd/
* bfd-in2.h: Regenerate.
* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
R_ARM_LDC_SB_G2): New relocation types.
(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
and friends.
(elf32_arm_howto_table_3): Delete; contents merged into
elf32_arm_howto_table_2.
(elf32_arm_howto_from_type): Adjust correspondingly.
(elf32_arm_reloc_map): Extend with the above relocations.
(calculate_group_reloc_mask): New function.
(identify_add_or_sub): New function.
(elf32_arm_final_link_relocate): Support for the above
relocations.
* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
codes to correspond to the above relocations.
gas/
* config/tc-arm.c (enum parse_operand_result): New.
(struct group_reloc_table_entry): New.
(enum group_reloc_type): New.
(group_reloc_table): New array.
(find_group_reloc_table_entry): New function.
(parse_shifter_operand_group_reloc): New function.
(parse_address_main): New function, incorporating code
from the old parse_address function. To be used via...
(parse_address): wrapper for parse_address_main; and
(parse_address_group_reloc): new function, likewise.
(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
OP_ADDRGLDRS, OP_ADDRGLDC.
(parse_operands): Support for these new operand codes.
New macro po_misc_or_fail_no_backtrack.
(encode_arm_cp_address): Preserve group relocations.
(insns): Modify to use the above operand codes where group
relocations are permitted.
(md_apply_fix): Handle the group relocations
ALU_PC_G0_NC through LDC_SB_G2.
(tc_gen_reloc): Likewise.
(arm_force_relocation): Leave group relocations for the linker.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/group-reloc-alu.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.l: New test.
* gas/arm/group-reloc-alu-encoding-bad.s: New test.
* gas/arm/group-reloc-alu-parsing-bad.d: New test.
* gas/arm/group-reloc-alu-parsing-bad.l: New test.
* gas/arm/group-reloc-alu-parsing-bad.s: New test.
* gas/arm/group-reloc-alu.s: New test.
* gas/arm/group-reloc-ldc.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
* gas/arm/group-reloc-ldc.s: New test.
* gas/arm/group-reloc-ldr.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
* gas/arm/group-reloc-ldr.s: New test.
* gas/arm/group-reloc-ldrs.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
* gas/arm/group-reloc-ldrs.s: New test.
ld/testsuite/
* ld-arm/group-relocs-alu-bad.d: New test.
* ld-arm/group-relocs-alu-bad.s: New test.
* ld-arm/group-relocs.d: New test.
* ld-arm/group-relocs-ldc-bad.d: New test.
* ld-arm/group-relocs-ldc-bad.s: New test.
* ld-arm/group-relocs-ldr-bad.d: New test.
* ld-arm/group-relocs-ldr-bad.s: New test.
* ld-arm/group-relocs-ldrs-bad.d: New test.
* ld-arm/group-relocs-ldrs-bad.s: New test.
* ld-arm/group-relocs.s: New test.
* ld-arm/arm-elf.exp: Wire in new tests.
* elf32-mips.c: Expand comment about ABI-mandated pagesize values.
(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): define in a more obvious way.
* elf64-mips.c, elfn32-mips.c (ELF_MAXPAGESIZE): Fix value for IRIX6.
Delete old comments.
(ELF_COMMONPAGESIZE): Define in a more obvious way.
[ ld/ChangeLog ]
* emulparams/elf64bmip.sh, emulparams/elf64btsmip.sh (COMMONPAGESIZE):
Define.
[ ld/testsuite/ChangeLog ]
* ld-mips-elf/multi-got-no-shared.d: Adjust for recent change of
ELF_MAXPAGESIZE.
* elflink.c (elf_link_add_object_symbols): Fix the warning message about
mismatched alignments to allow for the case where the common alignment
has been deduced from the section alignment.
* bfd.c (_bfd_default_error_handler): Update comment to explain why bfd
and asection varargs are out of order.
Explicitly catch and abort on NULL bfd and asection arguments.
* elfxx-mips.c (mips_elf_link_hash_table): Add function_stub_size.
(STUB_ORI): New macro.
(STUB_LI16U): Fix formatting.
(MIPS_FUNCTION_STUB_SIZE): Delete.
(MIPS_FUNCTION_STUB_MAX_SIZE): Likewise.
(MIPS_FUNCTION_STUB_NORMAL_SIZE): New macro.
(MIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(_bfd_mips_elf_adjust_dynamic_symbol): Use htab->function_stub_size
instead of MIPS_FUNCTION_STUB_SIZE.
(count_section_dynsyms): New function, split out from
_bfd_mips_elf_final_link.
(_bfd_mips_elf_always_size_sections): Get a worst-case estimate
of the number of dynamic symbols needed and use it to set up
function_stub_size. Use function_stub_size rather than
MIPS_FUNCTION_STUB_SIZE to determine the size of the stub section.
Use 16-byte stubs for 0x10000 dynamic symbols.
(_bfd_mips_elf_size_dynamic_sections): Use htab->function_stub_size
instead of MIPS_FUNCTION_STUB_SIZE. Fix formatting.
(_bfd_mips_elf_finish_dynamic_symbol): Likewise. Change the
size of the stub buffer from MIPS_FUNCTION_STUB_MAX_SIZE to
MIPS_FUNCTION_STUB_BIG_SIZE. Tweak the check for unhandled dynindxes.
Use MIPS_FUNCTION_STUB_BIG_SIZE rather than a hard-coded 20.
Use STUB_ORI rather than STUB_LI16U for big stubs.
(_bfd_mips_elf_link_hash_table_create): Initialize function_stub_size.
(_bfd_mips_elf_final_link): Use count_section_dynsyms.
ld/testsuite/
* ld-mips-elf/stub-dynsym-1.s,
* ld-mips-elf/stub-dynsym-1.ld,
* ld-mips-elf/stub-dynsym-1-7fff.d,
* ld-mips-elf/stub-dynsym-1-8000.d,
* ld-mips-elf/stub-dynsym-1-fff0.d,
* ld-mips-elf/stub-dynsym-1-10000.d,
* ld-mips-elf/stub-dynsym-1-2fe80.d: New test.
* ld-mips-elf/mips-elf.exp: Run it.
(STUB_LUI): New macro.
(STUB_LI16U): Ditto.
(STUB_LI16S): Ditto.
(MIPS_FUNCTION_STUB_SIZE): Rewrote to take info parameter.
(_bfd_mips_elf_adjust_dynamic_symbol): Pass info parameter to
MIPS_FUNCTION_STUB_SIZE.
(_bfd_mips_elf_always_size_sections): Ditto.
(_bfd_mips_elf_size_dynamic_sections): Ditto.
(_bfd_mips_elf_finish_dynamic_sections): Ditto.
(_bfd_mips_elf_finish_dynamic_symbol): Rewrote stub generation
to allow larger symbol table indexes.
PR ld/2723
* elflink.c (bfd_elf_final_link): Don't output section symbols
for special ELF sections.
ld/testsuite/
Update for removal of some section syms.
