Commit graph

408 commits

Author SHA1 Message Date
James Bowman
f46e4eb78b sim: ft32: new port
FT32 is a new high performance 32-bit RISC core developed by FTDI for
embedded applications.
2015-03-28 02:12:33 -04:00
Joel Brobecker
32d0add0a6 Update year range in copyright notice of all files owned by the GDB project.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2015-01-01 13:32:14 +04:00
Mike Frysinger
f32d1b7f58 sim: msp430: start a test framework
The current sim lacks any sort of tests.  Start a basic framework and
add a simple one to test the add insn.
2014-03-10 23:59:59 -04:00
Mike Frysinger
1a8a700e3a sim: convert old style prototypes
Most of these prototypes have been killed off, but we have a few left
in the sim tree.  Clean them up so we can enable the -W flag for it.
2014-03-04 02:54:50 -05:00
Joel Brobecker
ecd75fc8ee Update Copyright year range in all files maintained by GDB. 2014-01-01 07:54:24 +04:00
Mike Frysinger
daff015bcd sim: bfin: tests: make run-tests.sh executable
I meant for this script to be +x, but missed when doing the initial CVS
commit.  It wasn't possible to fix w/CVS, but it is w/git, so do it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

2012-12-03  Mike Frysinger  <vapier@gentoo.org>

	* run-tests.sh: Add +x file mode.
2013-12-07 02:03:33 -05:00
Alan Modra
bf3d9781ec Regenerate sim configure files to pick up support for powerpc64le in
libtool.m4.
2013-09-23 00:32:27 +00:00
Mike Frysinger
19b7bc4bd8 sim: bfin: run-tests.sh: fix typo in usage exit 2013-06-24 01:59:10 +00:00
Mike Frysinger
7f5884f775 sim: bfin: se_all32bitopcodes: skip debug insns under the sim
Since the sim has a few fake debug insns that the hardware does not, we
need to check for those before attempting to run them.  Otherwise we'll
randomly trigger the sim debug asserts/aborts/halts insns.  On the
hardware, these are proper invalid insns, and the table catches that.
2013-06-24 01:52:33 +00:00
Mike Frysinger
531d5282c0 sim: bfin: speed up all insn testcases slightly
The main body of the "all insn" test is executed once per tested insn, and
we test millions of insns here.  Any shrinkage we can do in this loop will
speed things up nicely (since it's multiplied per tested insn).

To that end, simplify the end-of-table test into one less insn, and omit
the SSYNC when we build for the sim.  When we build to run on the hardware,
this insn matters, but the sim doesn't have write store buffers in the chip
that might get in the way (memory writes are atomic).
2013-06-24 01:44:55 +00:00
Mike Frysinger
88924e5fa2 sim: bfin: trim trailing whitespace 2013-06-23 06:23:54 +00:00
Mike Frysinger
b6857b1e6c sim: bfin: tweak run-tests for parallel usage 2013-06-17 04:58:56 +00:00
Mike Frysinger
9fb7353ff0 sim: bfin: add helpful info for generating test tables 2013-06-17 04:47:26 +00:00
Mike Frysinger
7a56db5f46 sim: bfin: drop RET[ENI] setup
Since these insns run in usermode, there should be no need to setup
RET[ENI] to safe values.  They won't be dereferenced, and any insn
that returns via them are valid only in supervisor mode.  Since this
is in the main exception code path, saving any insn at all is good
as it gets multiplied quickly (as in O(n^2) times).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-06-17 04:45:54 +00:00
Mike Frysinger
590919de6c sim: arm: add support for MOVW and MOVT instructions
From: Jayant R. Sonar <Jayant.Sonar@kpitcummins.com>

This patch adds simulator support for handling the armv7 instructions
'movw (immediate)' and 'movt'.

Compiler frequently use these instructions to load the 32bit addresses of
global variables, string pointers etc. into the general registers.

In absence of support of these instructions:
1. GDB run simulator fails to print even simple "hello world" string
   on console.
2. Loading of global variable addresses into the registers fail causing
   arithmetic operation failures.

Patch has been regression tested for arm-none-eabi (-march=armv7-a).
2013-05-15 17:49:44 +00:00
Joel Brobecker
8acc9f485b Update years in copyright notice for the GDB files.
Two modifications:
  1. The addition of 2013 to the copyright year range for every file;
  2. The use of a single year range, instead of potentially multiple
     year ranges, as approved by the FSF.
2013-01-01 06:41:43 +00:00
Joel Brobecker
51b318dec8 [sim] Update old contact info in GPL license notices
sim/ChangeLog:

        Update old contact info in GPL license notices.
2012-12-19 07:18:22 +00:00
Joel Brobecker
3fd725ef34 Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.
gdb/sim/ChangeLog:

        Update the non-FSF-copyrighted files in sim to GPLv3 or later.
2012-12-19 07:12:02 +00:00
H.J. Lu
6bb11ab3b2 Fix sim build when configured with --enable-plugins
* common/Make-common.in: Use lt_cv_dlopen_libs under PLUGINS
	condition.
	* common/acinclude.m4: Define lt_cv_dlopen_libs.
	* arm/configure: Regenerate.
	* avr/configure: Regenerate.
	* bfin/configure: Regenerate.
	* common/configure: Regenerate.
	* cr16/configure: Regenerate.
	* cris/configure: Regenerate.
	* d10v/configure: Regenerate.
	* erc32/configure: Regenerate.
	* frv/configure: Regenerate.
	* h8300/configure: Regenerate.
	* igen/configure: Regenerate.
	* iq2000/configure: Regenerate.
	* lm32/configure: Regenerate.
	* m32c/configure: Regenerate.
	* m32r/configure: Regenerate.
	* m68hc11/configure: Regenerate.
	* mcore/configure: Regenerate.
	* microblaze/configure: Regenerate.
	* mips/configure: Regenerate.
	* mn10300/configure: Regenerate.
	* moxie/configure: Regenerate.
	* ppc/configure: Regenerate.
	* rl78/configure: Regenerate.
	* rx/configure: Regenerate.
	* sh/configure: Regenerate.
	* sh64/configure: Regenerate.
	* testsuite/configure: Regenerate.
	* v850/configure: Regenerate.
2012-11-20 14:41:26 +00:00
Steve Ellcey
cc2202431b 2012-09-24 Steve Ellcey <sellcey@mips.com>
* mips/basic.exp: Add mips*-mti-elf* target.
	* configure.ac: Add mips*-mti-elf* target.
	* configure: Regenerate.
2012-09-24 18:03:18 +00:00
Joel Brobecker
5f3ef9d035 Define PACKAGE macro in all sims' config.h.
Some of the common includes in include/gdb such as callback.h
include bfd.h.  But there was a recent change in bfd-in.h to
require that config.h be included before bfd.h can be included:

    /* PR 14072: Ensure that config.h is included first.  */
    #if !defined PACKAGE && !defined PACKAGE_VERSION
    #error config.h must be included before this header
    #endif

PACKAGE_VERSION is always defined by default by the AC_INIT autoconf
macro, but PACKAGE isn't.  This patch updates the SIM_AC_COMMON macro
to define it, and then regenerates all configure scripts and config.in
files.

sim/common/changeLog:

        * acinclude.m4 (SIM_AC_COMMON): Define PACKAGE.
        * config.in, configure: Regenerate.

sim/ChangeLog:

        * configure: Regenerate.

sim/arm/ChangeLog:

        * config.in, configure: Regenerate.

sim/avr/ChangeLog:

	* config.in, configure: Regenerate.

sim/bfin/ChangeLog:

	* config.in, configure: Regenerate.

sim/cr16/ChangeLog:

	* config.in, configure: Regenerate.

sim/cris/ChangeLog:

	* config.in, configure: Regenerate.

sim/d10v/ChangeLog:

	* config.in, configure: Regenerate.

sim/erc32/ChangeLog:

	* config.in, configure: Regenerate.

sim/frv/ChangeLog:

	* config.in, configure: Regenerate.

sim/h8300/ChangeLog:

	* config.in, configure: Regenerate.

sim/iq2000/ChangeLog:

	* config.in, configure: Regenerate.

sim/lm32/ChangeLog:

	* config.in, configure: Regenerate.

sim/m32c/ChangeLog:

	* config.in, configure: Regenerate.

sim/m32r/ChangeLog:

	* config.in, configure: Regenerate.

sim/m68hc11/ChangeLog:

	* config.in, configure: Regenerate.

sim/mcore/ChangeLog:

	* config.in, configure: Regenerate.

sim/microblaze/ChangeLog:

	* config.in, configure: Regenerate.

sim/mips/ChangeLog:

	* config.in, configure: Regenerate.

sim/mn10300/ChangeLog:

	* config.in, configure: Regenerate.

sim/moxie/ChangeLog:

	* config.in, configure: Regenerate.

sim/ppc/ChangeLog:

	* configure: Regenerate.

sim/rl78/ChangeLog:

	* config.in, configure: Regenerate.

sim/rx/ChangeLog:

	* config.in, configure: Regenerate.

sim/sh/ChangeLog:

	* config.in, configure: Regenerate.

sim/sh64/ChangeLog:

	* config.in, configure: Regenerate.

sim/v850/ChangeLog:

	* config.in, configure: Regenerate.

sim/testsuite/ChangeLog:

	* configure: Regenerate.
2012-06-15 17:20:10 +00:00
Mike Frysinger
740d60f83d sim: bfin: add shift astat tests
These are randomly generated tests to track down issues in ASTAT
handling with shift insns.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:59:55 +00:00
Mike Frysinger
e0dc84cdd4 sim: bfin: more astat tests
These are the randomly generated tests that directed some of the recent
astat related fixes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 05:24:57 +00:00
Mike Frysinger
e8c9a03df0 sim: bfin: enable some parallel tests
Now that we check for valid sub-insns in parallel insns, we can
enable the tests that explicitly validate those code paths.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 04:18:56 +00:00
Mike Frysinger
8faad9bd0f sim: bfin: unify se_all helpers more
Now that we have the se_all helpers together and working, we can see
what pieces are duplicated in each test and unify them in the common
header file.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09 03:42:43 +00:00
Mike Frysinger
44ac5dbe32 sim: bfin: skip .c/.S tests if no compiler is available
Similar to logic in the cris exp, attempt a simple compile and if it fails
(presumably due to the compiler being broken), skip all the related tests.
Fortunately, most tests (~600 out of ~800) are pure assembly, so people should
still get pretty good coverage.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-25 16:51:46 +00:00
Mike Frysinger
45e4eeb430 sim: bfin: disable redundant test that makes 32bit gas angry 2012-03-25 07:56:12 +00:00
Mike Frysinger
8f784a0e6a sim: bfin: fix typos in large constants in tests
Truncate constants that are larger than 32bits but get loaded into 32bit
registers.  These high bits don't get used and don't really make sense.
2012-03-25 06:43:43 +00:00
Mike Frysinger
ad03ad841d sim: testsuite: regen configure after rl78 addition 2012-03-24 05:37:10 +00:00
Mike Frysinger
a9c90fc78f sim: cris: update testsuite output after strsignal change 2012-03-24 05:33:42 +00:00
Mike Frysinger
8fe8b60120 sim: testsuite: regen configure after rl78 addition 2012-03-23 04:30:55 +00:00
Mike Frysinger
af209c380f sim: cris: update testsuite output after strsignal change 2012-03-21 04:50:01 +00:00
Mike Frysinger
5c73fae010 sim/testsuite/: split up arch-specific changelogs 2012-03-21 04:46:59 +00:00
Mike Frysinger
565904581b sim: bfin: add exhaustive parallel-insn tests 2012-03-19 05:39:45 +00:00
Mike Frysinger
5f2804c950 sim: bfin: unify se_all*opcodes tests
The current se_all*opcodes tests are very similar in how they work.
In preparation for adding more tests along these lines, unify the
common bits into a framework that others can include and build off
of easily.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 05:34:30 +00:00
Mike Frysinger
6aafca16ed sim: bfin: add tests for new shift behavior 2012-03-19 05:25:50 +00:00
Mike Frysinger
dbe9145095 sim: bfin: add tests for new shift behavior 2012-03-19 05:17:50 +00:00
Mike Frysinger
026789b1f8 sim: tests: ignore generated tests 2012-03-19 03:51:09 +00:00
Mike Frysinger
191a54be54 sim: bfin: import optimizations from 32bit test into 16bit test
The 32bit allopcodes test had quite a bit of optimization added to it
so that it ran in a reasonable amount of time out of uncached memory.
Port those changes over to the 16bit test so the two share common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-19 02:49:18 +00:00
Joel Brobecker
c5a5708100 Copyright year update in most files of the GDB Project.
gdb/ChangeLog:

        Copyright year update in most files of the GDB Project.
2012-01-04 08:28:28 +00:00
Mike Frysinger
783981cfd6 sim: testsuite: regenerate configure
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-10-18 00:16:14 +00:00
Mike Frysinger
39c1f96aef sim: bfin: use store buffer for VIT_MAX insns
The VIT_MAX insns can be used in parallel, so we need to use the store
buffer so we don't clobber the output register before we get a chance
to do a memory store with it.

Reported-by: Kai Iskratsch <kai@stella.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29 03:19:47 +00:00
Nick Clifton
9294f12bf1 PR sim/12737
* sim/arm/iwmmxt/wcmpgt.cgs: Remove expectation of failure.
	* sim/arm/iwmmxt/wmac.cgs: Remove expectation of failure.
	* sim/arm/iwmmxt/wsra.cgs: Remove expectation of failure.
	* sim/arm/xscale/blx.cgs: Remove expectation of failure.
2011-07-01 12:15:17 +00:00
Mike Frysinger
4bd2c0c31c sim: bfin: add tests for recent dsp fixes
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-18 20:27:26 +00:00
Mike Frysinger
6248039b9e sim: bfin: add missing gitignore file 2011-06-05 21:32:34 +00:00
Mike Frysinger
1d7b4a7037 sim: bfin: import testsuite
Now that the common sim testsuite code supports .S and .c files, we
can import the Blackfin testsuite.  There are about ~800 tests here,
so I'm only attaching a compressed patch of them.  Other than adding
files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was
updated to mark Blackfin as having a testsuite, and sim/configure
regenerated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:44:22 +00:00
Mike Frysinger
0641104b2e sim: tests: support .S/.c files
Rather than requiring all sim tests to be preprocessed .s files, add
support for .S and .c files so we can easily write code using a higher
level language like C.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-16 18:48:31 +00:00
Hans-Peter Nilsson
3fc8ee5409 PR sim/12737
* sim/arm/iwmmxt/wcmpgt.cgs, sim/arm/iwmmxt/wmac.cgs,
	sim/arm/iwmmxt/wsra.cgs, sim/arm/xscale/blx.cgs: Kfail.
2011-05-11 04:59:28 +00:00
Joseph Myers
4d393d60c4 gdb:
* configure.host (xscale*): Don't handle target.
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.

gdb/gdbserver:
	* README: Don't mention xscale*-*-linux*.
	* configure.srv (xscale*-*-linux*): Don't handle target.

gdb/testsuite:
	* gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target.
	* gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle
	targets.
	* gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't
	handle targets.

sim:
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.
	* configure: Regenerate.

sim/testsuite:
	* configure: Regenerate.
	* sim/arm/allinsn.exp (xscale*-*-*): Don't handle target.
	* sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle
	targets.
	* sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of
	xscale*-*-*.
	* sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target.
	* sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of
	xscale*-*-*.
2011-05-04 19:28:16 +00:00
Hans-Peter Nilsson
e88b07bd4a * testutils.inc: Correct comment syntax fallout from
copyright update.
	* utils-dsp.inc, utils-fpu.inc, utils-mdmx.inc: Ditto.
2011-01-05 23:12:37 +00:00