Commit graph

11 commits

Author SHA1 Message Date
Andrew Cagney
6dbaff8f60 Finish implementation of sim-memopt.
Use in d30v and tic80.
Make available a generic sim_read, sim_write implementation.
1997-09-04 10:08:44 +00:00
Andrew Cagney
a34abff813 o Add modulo argument to sim_core_attach
o	Add sim-memopt module - memory option processing.
1997-09-04 03:47:39 +00:00
Andrew Cagney
fdd64f952d Add support for suspending/resumeing the simulator in sim-modules.
Use in sim-events.
1997-09-03 07:26:11 +00:00
Andrew Cagney
4b2a6aed84 Use sim_state_alloc to create common sim object. 1997-09-01 03:26:31 +00:00
Andrew Cagney
18c319ae59 Add --target=BFDTARGET and --architecture=MACHINE options. 1997-08-28 09:44:42 +00:00
Andrew Cagney
7a418800c1 Start of implementation of a distributed (between processors)
simulator core object.
1997-05-05 13:21:04 +00:00
David Edelsohn
e6a434469b Tweak comment. 1997-05-02 16:51:04 +00:00
David Edelsohn
c967f1874a * Makefile.in (sim-options_h): Define.
(sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
	(sim-model.o): Add new rule.
	(cgen-{scache,trace,utils}.o): Add new rules.
	* aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
	* cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
	Indent output by 2 spaces.
	* cgen-scache.h (scache_print_profile): Update.
	* cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
	Use trace_printf, not fprintf.
	(trace_extract): Use trace_printf, not cgen_trace_printf.
	* genmloop.sh (!FAST case): Increment `insn_count'.
	* sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
	(sim_cpu_base): Rename member `sd' to `state' to be consistent with
	access macro's name.
	* sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
	Change return type to SIM_RC.
	(sim_core_{install,uninstall}): New functions.
	* sim-core.h (sim_core_{install,uninstall}): Declare.
	(sim_core_init): Use EXTERN_SIM_CORE to define it.
	Change return type to SIM_RC.
	* sim-model.h (models,machs,model_install): Declare.
	* sim-module.c (modules): Add scache_install, model_install.
	(sim_post_argv_init): Set cpu->state backlinks.
	* sim-options.c (standard_options): Delete --simcache-size,--max-insns.
	(standard_option_handler): Likewise.
	* sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
	sim-profile.h.
	(*): Assume ANSI C.
	(profile_options): Delete --profile-simcache.
	(profile_option_handler): Likewise.
	(profile_print_insn): Change `sd' arg to `cpu'.  Indent output 2
	spaces.
	(profile_print_{memory,model}): Likewise.
	(profile_print_simcache): Delete.
	(profile_print_speed): New function.
	(profile_print): Rewrite.
	* sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
	(WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
	(PROFILE_DATA): Delete members simcache_{hits,misses}.
	(PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
	(PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
	(profile_print): Update prototype.
1997-05-01 18:05:37 +00:00
David Edelsohn
5bfbd72555 Add macros for CPU_FOO_FILE, CPU_STATE. 1997-04-17 14:07:43 +00:00
David Edelsohn
0f2811d1c5 * Make-common.in (sim-options.o, sim-load.o): Add rules for.
(sim_main_headers): Add sim-trace.h.
	* run.c (exec_bfd, target_byte_order): Delete.
	(main): Pass -E <endian> to sim_open.  Delete code to load sections,
	call sim_load instead.  Check return code of sim_create_inferior.
	* sim-base.h (CURRENT_STATE): Define.
	(sim_state_base): Make typedef.  New members options, prog_argv,
	prog_bfd, text_{section,start,end}, start_addr, simcache_size,
	mem_size, memory [+ corresponding access macros].
	(sim_cpu_base): New typedef.
	* sim-trace.h: New file.
	* sim-basics.h: #include it.
	* sim-load.c: New file.
1997-04-17 09:37:02 +00:00
David Edelsohn
e77fd2694b New files. 1997-04-03 02:37:44 +00:00