Commit graph

11 commits

Author SHA1 Message Date
Nick Clifton
f432110413 Update the address and phone number of the FSF 2005-05-07 07:34:31 +00:00
Tomer Levi
47add74de7 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
* crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
2004-12-23 13:52:11 +00:00
Tomer Levi
89a649f7ae 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
* crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
	(no_op_insn): Initialize array with instructions that have no
	operands.
	* crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
2004-11-29 16:34:35 +00:00
Tomer Levi
42048ee72f 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
* crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register mode.
* crx-dis.c: Likewise.
2004-11-05 11:01:00 +00:00
Tomer Levi
343cbeea1e 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
* crx-opc.c (REV_COP_INST): New macro, reverse operand order of COP_INST macro.
2004-10-28 10:29:56 +00:00
Tomer Levi
ec20305230 * crx-opc.c (crx_instruction): Update data structure according to the rearrangement done in CRX opcode header file.
(crx_regtab):  Likewise.
(crx_optab):  Likewise.
(crx_instruction): Reorder load/stor instructions, remove unsupported formats.
support new Co-Processor instruction 'cpi'.
2004-10-27 10:24:39 +00:00
Tomer Levi
396e337840 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
* crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3, us4, us5 (respectively).
	Remove unsupported 'popa' instruction.
	Reverse operands order in store co-processor instructions.
2004-10-25 09:45:36 +00:00
Nick Clifton
48c9f030c9 Add support for CRX co-processor opcodes 2004-10-07 14:18:17 +00:00
Nick Clifton
42851540ac Add LD and GAS testsuites for CRX port.
Fix several crx bugs.
2004-09-03 14:31:41 +00:00
Nick Clifton
670ec21de9 Add CRX insns: pushx, popx
Add support to GAS for expressions which are the difference of two symbols
2004-07-27 11:37:12 +00:00
Nick Clifton
1fe1f39c06 Add new port: crx-elf 2004-07-07 17:28:53 +00:00