bfd/
* config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks.
* configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need
elf-vxworks.lo.
* configure: Regenerate.
* Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo.
(BFD32_BACKENDS_CFILES): Add elf-vxworks.c.
(elf32-i386.lo): Depend on elf-vxworks.h.
(elf-vxworks.lo): New rule.
* Makefile.in: Regenerate.
* elf-bfd.h (elf_backend_data): Update type of
elf_backend_emit_relocs.
(_bfd_elf_link_output_relocs): Update prototype.
* elflink.c (_bfd_elf_link_output_relocs): Always use
bed->elf_backend_emit_relocs when outputting relocations.
* elfxx-target.h (elf_backend_emit_relocs): Default to
_bfd_elf_link_output_relocs.
* targets.c (bfd_elf32_i386_vxworks_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec.
* elf32-i386.c: Add elf32-i386-vxworks target BFD.
(elf_i386_plt0_entry): Remove padding.
(elf_i386_pic_plt0_entry): Ditto.
(PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define.
(PLT_NON_JUMP_SLOT_RELOCS): Define.
(elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and
plt0_pad_byte fields.
(elf_i386_link_hash_table_create): Zero them.
(elf_i386_create_dynamic_sections): Create static relocation section.
(allocate_dynrelocs): Allocate space for static PLT relocations.
(elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT
symbols. Give PLT symbols function type. Don't strip PLT sections
if we have exported symbols from them.
(elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static
relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on
VxWorks.
(elf_i386_finish_dynamic_sections): Allow different pad bytes.
Add relocation for GOT location. Fill in PLT static relocations.
(elf_i386_vxworks_link_hash_table_create): New function.
(elf_i386_vxworks_link_output_symbol_hook): New function.
* elf-vxworks.h: New file.
gas/
* config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS.
gas/testsuite/
* gas/i386/i386.exp: Don't run divide test on vxworks.
ld/
* Makefile.am: Add eelf_i386_vxworks.
* Makefile.in: Regenerate.
* configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks.
* emulparams/elf_i386_vxworks.sh: New file.
* emulparams/vxworks.sh: New file.
* scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
list traversal. Use bfd_section_list_prepend.
* config/tc-mmix.c (mmix_frob_file): Don't needlessly iterate
over the section list.
* config/tc-xtensa.c (xtensa_remove_section): Delete.
(xtensa_insert_section): Delete.
(xtensa_move_seg_list_to_beginning): Use bfd_section_list_remove
and bfd_section_list_prepend.
(xtensa_reorder_seg_list): Use bfd_section_list_remove and
bfd_section_list_insert_after.
2005-04-26 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-multi.h (FAKE_LABEL_NAME): Defined.
* read.c (pseudo_set): Disallow symbol set to common symbol.
PR 857
* write.c (write_object_file): Report common symbol name when
disallowing local symbol set to common symbol.
(adjust_reloc_syms): Disallow local symbol set to undefined
symbol.
gas/testsuite/
2005-04-26 H.J. Lu <hongjiu.lu@intel.com>
* gas/all/assign.s: Make `x' and `y' global.
(xg_is_narrow_insn, xg_expand_narrow): Remove. Merge into...
(xg_is_single_relaxable_insn): ...here. Add "targ" and "narrow_only"
parameters.
(xg_assembly_relax, xg_find_narrowest_format, relaxation_requirements,
convert_frag_narrow): Use new version of xg_is_single_relaxable_insn.
* config/tc-i386.c (md_begin): Allow hyphens in mnemonics.
include/opcode/ChangeLog:
* i386.h: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr. Provide aliases without hyphens.
opcodes/ChangeLog:
* i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
Add xcrypt-ctr.
2005-04-15 Jan Beulich <jbeulich@novell.com>
* config/obj-elf.c (obj_elf_struct): New.
(elf_pseudo_table). Use it for .offset and .struct.
gas/testsuite/
2005-04-15 Jan Beulich <jbeulich@novell.com>
* gas/elf/struct.[sd]: New.
* gas/elf/elf.exp: Run new test.
* config/tc-mips.c (IS_ZEXT_32BIT_NUM): New macro.
(normalize_address_expr): New function to sign-extend address
offsets that fit into 32 bits in 32-bit mode.
(macro_build_ldst_constoffset): Use normalize_address_expr()
instead of a handcoded sequence.
(load_register): Likewise. Report oversized numbers in a useful
way.
(macro) [ld_st, ldd_std]: Reject all oversized offsets, not only
for constant addresses. Report oversized numbers in a useful way.
(mips_ip): Use normalize_address_expr() for addresses.
gas/testsuite/:
* gas/mips/ldstla-32.s: Exclude offsets that are now meant to fail
and include more instructions/offsets that are meant to succeed.
Use $4 instead $3 to avoid register dependencies.
* gas/mips/ldstla-32.d: Update accordingly.
* gas/mips/ldstla-32-shared.d: Likewise.
* gas/mips/ldstla-32-mips3.d: New test based on the above, except
for mips3.
* gas/mips/ldstla-32-mips3-shared.d: Similarly, for PIC.
* gas/mips/ldstla-32-mips3.s: Source for the new tests.
* gas/mips/ldstla-32-1.s: New test for offsets that are meant to
fail.
* gas/mips/ldstla-32-mips3-1.s: Likewise, for mips3.
* gas/mips/ldstla-32-1.l: Stderr output for the new test.
* gas/mips/ldstla-32-mips3-1.l: Likewise.
* gas/mips/mips.exp: Run the new tests.
* i386.h (i386_optab): Mark VIA PadLock instructions as ImmExt and
adjust them accordingly.
gas/ChangeLog:
* config/tc-i386.c (output_insn): Handle VIA PadLock instructions
similar to other instructions now that they're marked as ImmExt.
(xtensa_find_unaligned_branch_targets, get_aligned_diff,
future_alignment_required): Use branch_align_power to check section
alignment as well as xtensa_fetch_width when aligning branch targets.
2005-04-04 H.J. Lu <hongjiu.lu@intel.com>
* elf.c (bfd_elf_set_group_contents): Ignore linker created
group section.
(assign_section_numbers): Accept link_info. Check SHT_GROUP
sections for relocatable files only. Remove the linker created
group sections.
(_bfd_elf_compute_section_file_positions): Pass link_info to
assign_section_numbers.
* elfxx-ia64.c (elfNN_ia64_object_p): New.
(elf_backend_object_p): Defined.
gas/
2005-04-04 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-ia64.c (start_unwind_section): Undo the change
of 2004-08-18.
(generate_unwind_image, dot_endp): Likewise.
* config/tc-ia64.c (ia64_handle_align): Move le_nop and
le_nop_stop arrays and initializers to file scope.
(md_begin): When generating code for anything other than
Itanium 1, use MMI instead of MFI NOP bundles as a filler.
2005-04-01 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_apply_fix3): Also handle BFD_RELOC_X86_64_32S.
(tc_gen_reloc): Handle BFD_RELOC_X86_64_32S in the default case.
gas/testsuite/
2005-04-01 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-pcrel.[sd]: New.
* gas/i386/i386.exp: Run new test.
* bfd/bfd-in2.h: Regenerate.
* bfd/elf32-arm.c (elf32_arm_is_target_special_symbol): Rename call to
bfd_elf32_is_arm_mapping_symbol_name.
(elf32_arm_output_symbol_hook): Likewise.
(arm_elf_find_function): Likewise, and include STT_NOTYPE in test for
mapping symbols.
(is_arm_mapping_symbol_name): Function moved from here...
* bfd/cpu-arm.c (bfd_elf32_is_arm_mapping_symbol_name): ...to here,
renamed and made global.
* gas/config/tc-arm.c (mapping_state): Change documentation in function
comment to cross-reference spec instead. Change type of mapping symbols
to BSF_NO_TYPE.
(arm_adjust_symtab): Don't change type of mapping symbols here.
* gas/testsuite/gas/arm/mapping.d: Update expected output.
* ld/testsuite/ld-arm/arm-app-abs32.d: Likewise.
* ld/testsuite/ld-arm/arm-app.d: Likewise.
* ld/testsuite/ld-arm/mixed-app.d: Likewise.
indicates whether personality routine index N has been output for this
section.
(mapping_state): tc_segment_info_data now struct not enum.
(arm_elf_change_section): Likewise, and marked_pr_dependency is now
handled on section change.
(create_unwind_entry): Previous code to output dependency removed.
(s_arm_unwind_fnend): Output dependency if it hasn't been done already
for this section.
* gas/config/tc-arm.h (TC_SEGMENT_INFO_TYPE): Redefined as struct
arm_segment_info_type.
(arm_segment_info_type): New struct.
* gas/testsuite/gas/arm/unwind.d: Update expected output.
(xtensa_frob_label): Compute "freq" before possibly switching frags.
Insert a LOOP_END frag before every loop target, and do not overload
DESIRE_ALIGN_IF_TARGET frags with loop end information.
(xg_assemble_vliw_tokens): Use do_align_targets.
(xtensa_fix_target_frags): Remove code to convert a
DESIRE_ALIGN_IF_TARGET frag to a LOOP_END frag when there is a
negatable branch at the end of a loop.
(frag_can_negate_branch): Delete.
