I was running this by hand to test out --ppc476-workaround. Another
bootstrap test doesn't take all that long, so let's add it to the
testsuite.
* ld-bootstrap/bootstrap.exp: Add ppc476 workaround test.
* ld-bootstrap/ppc476.t: New file.
Intel MPX introduces 4 bound registers, which will be used for parameter
passing in x86-64. Bound registers are cleared by branch instructions.
Branch instructions with BND prefix will keep bound register contents.
This leads to 2 requirements to 64-bit MPX run-time:
1. Dynamic linker (ld.so) should save and restore bound registers during
symbol lookup.
2. Change the current 16-byte PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
ff 25 00 10 00 jmpq *GOT+16(%rip)
0f 1f 40 00 nopl 0x0(%rax)
and 16-byte PLT1:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
which clear bound registers, to preserve bound registers.
We use 2 new relocations:
to mark branch instructions with BND prefix.
When linker sees any R_X86_64_PC32_BND or R_X86_64_PLT32_BND relocations,
it switches to a different PLT0:
ff 35 08 00 00 00 pushq GOT+8(%rip)
f2 ff 25 00 10 00 bnd jmpq *GOT+16(%rip)
0f 1f 00 nopl (%rax)
to preserve bound registers for symbol lookup and it also creates an
external PLT section, .pl.bnd. Linker will create a BND PLT1 entry
in .plt:
68 00 00 00 00 pushq $index
f2 e9 00 00 00 00 bnd jmpq PLT0
0f 1f 44 00 00 nopl 0(%rax,%rax,1)
and a 8-byte BND PLT entry in .plt.bnd:
f2 ff 25 00 00 00 00 bnd jmpq *name@GOTPCREL(%rip)
90 nop
Otherwise, linker will create a legacy PLT1 entry in .plt:
68 00 00 00 00 pushq $index
e9 00 00 00 00 jmpq PLT0
66 0f 1f 44 00 00 nopw 0(%rax,%rax,1)
and a 8-byte legacy PLT in .plt.bnd:
ff 25 00 00 00 00 jmpq *name@GOTPCREL(%rip)
66 90 xchg %ax,%ax
The initial value of the GOT entry for "name" will be set to the the
"pushq" instruction in the corresponding entry in .plt. Linker will
resolve reference of symbol "name" to the entry in the second PLT,
.plt.bnd.
Prelink stores the offset of pushq of PLT1 (plt_base + 0x10) in GOT[1]
and GOT[1] is stored in GOT[3]. We can undo prelink in GOT by computing
the corresponding the pushq offset with
GOT[1] + (GOT offset - &GOT[3]) * 2
Since for each entry in .plt except for PLT0 we create a 8-byte entry in
.plt.bnd, there is extra 8-byte per PLT symbol.
We also investigated the 16-byte entry for .plt.bnd. We compared the
8-byte entry vs the the 16-byte entry for .plt.bnd on Sandy Bridge.
There are no performance differences in SPEC CPU 2000/2006 as well as
micro benchmarks.
Pros:
No change to undo prelink in dynamic linker.
Only 8-byte memory overhead for each PLT symbol.
Cons:
Extra .plt.bnd section is needed.
Extra 8 byte for legacy branches to PLT.
GDB is unware of the new layout of .plt and .plt.bnd.
bfd/
* elf64-x86-64.c (elf_x86_64_bnd_plt0_entry): New.
(elf_x86_64_legacy_plt_entry): Likewise.
(elf_x86_64_bnd_plt_entry): Likewise.
(elf_x86_64_legacy_plt2_entry): Likewise.
(elf_x86_64_bnd_plt2_entry): Likewise.
(elf_x86_64_bnd_arch_bed): Likewise.
(elf_x86_64_link_hash_entry): Add has_bnd_reloc and plt_bnd.
(elf_x86_64_link_hash_table): Add plt_bnd.
(elf_x86_64_link_hash_newfunc): Initialize has_bnd_reloc and
plt_bnd.
(elf_x86_64_copy_indirect_symbol): Also copy has_bnd_reloc.
(elf_x86_64_check_relocs): Create the second PLT for Intel MPX
in 64-bit mode.
(elf_x86_64_allocate_dynrelocs): Handle the second PLT for IFUNC
symbols. Resolve call to the second PLT if it is created.
(elf_x86_64_size_dynamic_sections): Keep the second PLT section.
(elf_x86_64_relocate_section): Resolve PLT references to the
second PLT if it is created.
(elf_x86_64_finish_dynamic_symbol): Use BND PLT0 and fill the
second PLT entry for BND relocation.
(elf_x86_64_finish_dynamic_sections): Use MPX backend data if
the second PLT is created.
(elf_x86_64_get_synthetic_symtab): New.
(bfd_elf64_get_synthetic_symtab): Likewise. Undefine for NaCl.
ld/
* emulparams/elf_x86_64.sh (TINY_READONLY_SECTION): New.
ld/testsuite/
* ld-x86-64/mpx.exp: Run bnd-ifunc-1 and bnd-plt-1.
* ld-x86-64/bnd-ifunc-1.d: New file.
* ld-x86-64/bnd-ifunc-1.s: Likewise.
* ld-x86-64/bnd-plt-1.d: Likewise.
execute permission regardless of the underlying PT_LOAD segment permissions.
Deleting this code allows the default linker behavior which is to set the
dynamic segment to the same permissions as the sections that make it up.
This change alters one existing test case to check the segment flags for
PT_DYNAMIC.
bfd/ChangeLog
* elfxx-mips.c(_bfd_mips_elf_modify_segment_map): Deleted hard coding of
PT_DYNAMIC segment flags.
ld/testsuite/ChangeLog
* ld-mips-elf/pic-and-nonpic-3a.sd: Check DYNAMIC segment flags.
It is added for
commit 409ff343a4
Author: Alan Modra <amodra@gmail.com>
Date: Tue Nov 8 13:49:11 2011 +0000
* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Mark syms in
executables when export_dynamic.
* ld-elf/rdynamic-1.c: New file.
* ld-elf/rdynamic-1.rd: Likewise.
* ld-elf/shared.exp (build_tests): Add rdynamic-1.
An assignment to dot in an output section that allocates space of
course keeps the output section. Here, I'm changing the behaviour for
assignments that don't allocate space. The idea is not so much to
allow people to force output of an empty section with ". = .", but
to fix cases where an otherwise empty section has padding added by an
alignment expression that changes with relaxation or .eh_frame
editing. Such a section might have zero size before relaxation and so
be stripped incorrectly.
ld/
* ld.texinfo (Output Section Discarding): Mention assigning to dot
as a way of keeping otherwise empty sections.
* ldexp.c (is_dot, is_value, is_sym_value, is_dot_ne_0,
is_dot_plus_0, is_align_conditional): New predicates.
(exp_fold_tree_1): Set SEC_KEEP when assigning to dot inside an
output section, except for some special cases.
* scripttempl/elfmicroblaze.sc: Use canonical form to align at
end of .heap and .stack.
ld/testsuite/
* ld-shared/elf-offset.ld: Align end of .bss with canonical form
of ALIGN that allows an empty .bss to be removed.
* ld-arm/arm-dyn.ld: Likewise.
* ld-arm/arm-lib.ld: Likewise.
* ld-elfvsb/elf-offset.ld: Likewise.
* ld-mips-elf/mips-dyn.ld: Likewise.
* ld-mips-elf/mips-lib.ld: Likewise.
* ld-arm/arm-no-rel-plt.ld: Remove duplicate ALIGN.
* ld-powerpc/vle-multiseg-1.ld: Remove ALIGN at start of section.
ALIGN address of section instead.
* ld-powerpc/vle-multiseg-2.ld: Likewise.
* ld-powerpc/vle-multiseg-3.ld: Likewise.
* ld-powerpc/vle-multiseg-4.ld: Likewise.
* ld-powerpc/vle-multiseg-6.ld: Likewise.
* ld-scripts/empty-aligned.d: Check section headers not program
headers. Remove xfail and notarget.
* ld-scripts/empty-aligned.t: Use canonical ALIGN for end of .text2.
After resolving a versioned reference, foo@VER1, to a default versioned
definition, foo@@VER1, from a shared object, we also merge it with
the existing regular default symbol definition, foo. When foo is IFUNC
and foo@@VER1 aren't, we will merge 2 incompatible definitions. This
patch avoids merging foo@@VER1 definition with foo definition if
one is IFUNC and the other isn't.
There is nothing linker can do when a type mismatched default definition
are made dynamic by info->shared, info->export_dynamic or h->ref_dynamic.
But we do want to avoid exporting it when building PIE. Let's remove
those checks.
bfd/
PR ld/2404
* elflink.c (_bfd_elf_merge_symbol): Don't check info->shared,
info->export_dynamic, nor !h->ref_dynamic for type mismatch when
adding the default version.
ld/testsuite/
PR ld/2404
* ld-elf/shared.exp: Add a PIE test for PR ld/2404.
PR ld/2404 was fixed without a testcase. This patch to add one.
PR ld/2404
* ld-elf/pr2404.out: New file.
* ld-elf/pr2404a.c: Likewise.
* ld-elf/pr2404b.c: Likewise.
* ld-elf/shared.exp (build_tests): Build libpr2404a.so and
libpr2404b.a.
(run_tests): Run pr2404.
Modifies ld machinery tracking linker script assignments to notice all
assignments, not just those symbols mentioned in DEFINED().
ld/
PR ld/14962
* ldlang.h (struct lang_definedness_hash_entry): Add by_object and
by_script. Make iteration a single bit field.
(lang_track_definedness, lang_symbol_definition_iteration): Delete.
(lang_symbol_defined): Declare.
* ldlang.c (lang_statement_iteration): Expand comment a little.
(lang_init <lang_definedness_table>): Make it bigger.
(lang_track_definedness, lang_symbol_definition): Delete.
(lang_definedness_newfunc): Update.
(lang_symbol_defined): New function.
(lang_update_definedness): Create entries here. Do track whether
script definition of symbol is valid, even when also defined in
an object file.
* ldexp.c (fold_name <DEFINED>): Update.
(fold_name <NAME>): Allow self-assignment for absolute symbols
defined in a linker script.
ld/testsuite/
* ld-scripts/pr14962-2.d,
* ld-scripts/pr14962-2.t: New test.
* ld-scripts/expr.exp: Run it.
Rather than hacking every backend to not discard dynamic relocations
against an undefined hidden __ehdr_start, make it appear to be defined
early. We want __ehdr_start hidden before size_dynamic_sections so
that it isn't put in .dynsym, but we do need the dynamic relocations
for a PIE or shared library with a non-PIC reference. Defining it
early is wrong if we don't actually define the symbol later to its
proper value. (In some cases we want to leave the symbol undefined,
for example, when the ELF header isn't loaded, and we don't have this
infomation available in before_allocation.)
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation): Define
__ehdr_start before size_dynamic_sections and restore afterwards.
ld/testsuite/
* ld-elf/ehdr_start-shared.d: New.
* ld-elf/ehdr_start-userdef.d: xfail frv.
* ld-elf/ehdr_start-weak.d: Likewise.
* ld-elf/ehdr_start.d: Likewise.
This patch fixes 2 GNU_RELRO segment bugs:
1. lang_size_sections didn't properly align base to the maximum
alignment power of sections between DATA_SEGMENT_ALIGN and
DATA_SEGMENT_RELRO_END.
2. ld failed to adjust LOAD segment to generate GNU_RELRO segment
when LOAD segment doesn't fit GNU_RELRO segment. This is
https://sourceware.org/bugzilla/show_bug.cgi?id=14207
We "fixed" ld by not generating GNU_RELRO segment. This patch
adjusts LOAD segment to generate GNU_RELRO segment. It fixes
PR ld/16322 and at the same time it also fixes PR binutils/16323
since now we can adjust LOAD segment if it is too small.
bfd/
PR ld/14207
PR ld/16322
PR binutils/16323
* elf.c (_bfd_elf_map_sections_to_segments): Don't check section
size for PT_GNU_RELRO segment.
(assign_file_positions_for_load_sections): If PT_LOAD segment
doesn't fit PT_GNU_RELRO segment, adjust its p_filesz and p_memsz.
ld/
PR ld/14207
PR ld/16322
PR binutils/16323
* ldlang.c (lang_size_sections): Properly align RELRO base.
ld/testsuite/
PR ld/14207
PR ld/16322
PR binutils/16323
* ld-elf/pr16322.d: New file.
* ld-elf/pr16322.s: Likewise.
* ld-x86-64/pr14207.d: Expect PT_GNU_RELRO segment.
It is a good pratice to set the SHF_INFO_LINK bit when the sh_info field
represents a section header index.
bfd/
PR binutils/16317
* elf.c (assign_section_numbers): Set the SHF_INFO_LINK bit for
SHT_REL/SHT_RELA sections when setting the sh_info field.
binutils/testsuite/
PR binutils/16317
* binutils-all/readelf.s: Updated.
* binutils-all/readelf.s-64: Likewise.
ld/testsuite/
PR binutils/16317
* ld-elf/linkinfo1.s: New file.
* ld-elf/linkinfo1a.d: Likewise.
* ld-elf/linkinfo1b.d: Likewise.
2013-12-18 Vidya Praveen <vidyapraveen@arm.com>
* lib/ld-lib.exp (check_lto_available): Support cflags, ldflags and
test by compiling for an executable rather than shared library.
bfd/
* elf.c (assign_file_positions_except_relocs): Set e_type in ELF
header to ET_EXEC for -pie -Ttext-segment=.
2013-12-10 H.J. Lu <hongjiu.lu@intel.com>
* ld-pie/vaddr-0.d: New file.
* ld-pie/vaddr-1.d: Likewise.
* ld-pie/vaddr.s: Likewise.
Make the ifunc-21 and ifunc-22 tests more generic to support
aarch64_be and ELF targets.
ld/testsuite/ChangeLog:
2013-12-11 Will Newton <will.newton@linaro.org>
* ld-aarch64/ifunc-21.d: Make test more generic to support
aarch64_be and ELF targets.
* ld-aarch64/ifunc-22.d: Likewise.
These files are source files and have no business being +x. We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* binutils-all/objcopy.exp: Consider mips-mti-elf the same as
mips-sde-elf
* binutils-all/readelf.exp: Likewise
gas/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* gas/mips/mips.exp: Consider mips-mti-elf the same as mips-sde-elf
ld/testsuite/
2013-11-27 Matthew Fortune <matthew.fortune@imgtec.com>
* ld-mips-elf/mips-elf.exp: Consider mips-mti-elf the same as
mips-sde-elf
The code for handling GOT references to ifunc symbols in static links
was missing.
bfd/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol):
Handle STT_GNU_IFUNC symbols correctly in static links.
ld/testsuite/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add ifunc-22.
* ld-aarch64/ifunc-22.d: New file.
* ld-aarch64/ifunc-22.s: Likewise.
The .got.plt header size was not being correctly taken into account
when calculating the offset for relocations against ifunc symbols.
bfd/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Ensure
PLT_INDEX is calculated using correct header size.
ld/testsuite/ChangeLog:
2013-11-26 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Add ifunc-21 test.
* ld-aarch64/ifunc-21.d: New file.
* ld-aarch64/ifunc-21.s: Likewise.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_before_allocation):
Don't use bfd_elf_record_link_assignment to mark __ehdr_start
hidden. Instead, just do it directly here, and only if it was
referenced but not defined.
ld/testsuite/
* ld-elf/ehdr_start-userdef.t: New file.
* ld-elf/ehdr_start-userdef.d: New file.
* ld-elf/ehdr_start-strongref.s: New file.
* ld-elf/ehdr_start-missing.t: New file.
* ld-elf/ehdr_start-missing.d: New file.
* ld-elf/ehdr_start-weak.d: New file.
* ld-mips-elf/ehdr_start-2.nd: Expect __ehdr_start to be global.
Commit 34a79995c4 changed how STT_FILE
symbols were emitted but this testcase got missed in the cleanup.
ld/testsuite/ChangeLog:
2013-11-14 Will Newton <will.newton@linaro.org>
* ld-arm/script-type.sym: Remove redundant STT_FILE symbol.
bfd/
* archures.c (bfd_mach_i386_nacl): Fix definition so it doesn't
collide with bfd_mach_l1om.
* bfd-in2.h: Regenerate.
* elf32-i386.c (elf32_i386_nacl_elf_object_p): New function.
(elf_backend_object_p): Use that in elf32-i386-nacl definition.
* elf64-x86-64.c (elf64_x86_64_nacl_elf_object_p): New function.
(elf_backend_object_p): Use that in elf64-x86-64-nacl definition.
(elf32_x86_64_nacl_elf_object_p): New function.
(elf_backend_object_p): Use that in elf32-x86-64-nacl definition.
binutils/
* objdump.c (dump_dwarf): Grok bfd_mach_x86_64_nacl and
bfd_mach_x64_32_nacl as equivalent to bfd_mach_x86_64.
ld/testsuite/
* ld-x86-64/x86-64.exp (mixed1, mixed2): Loosen error string match
so it accepts "i386:nacl" in place of "i386".
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/lp64-2.d: Likewise.
* ld-x86-64/lp64-3.d: Likewise.
Changing addis r2,r12,..; addi r2,r2,.. to lis r2,..; addi r2,r2..
in non-PIC executables has the benefit of removing a dependency on r12.
bfd/
* elf64-ppc.c (ppc64_elf_relocate_section): Edit global entry
prologue to non-PIC in non-PIC executables.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Adjust for non-PIC global entry.
On PowerPC64 ELFv2 readelf emits [<localentry>: 8] describing extra
symbol st_other bits.
* ld-elfvers/vers24.rd: Allow extra readelf output after
symbol visibility.
* ld-ifunc/ifunc.exp: Likewise.
I think HJ has already fixed the binutils and ld tests with his
2013-09-27 readelf change, but this allows them to pass with wider
address output as per Nick's 2013-09-12 readelf change.
binutils/testsuite/
* binutils-all/x86-64/compressed-1a.d: Allow wide display of addresses.
gas/testsuite/
* gas/cfi/cfi-x86_64.d: Match when lacking end of section padding.
ld/testsuite/
* ld-pe/cfi.d: Allow wide display of addresses.
This change is to support the new ELFv2 ABI, which uses the value in
r12 on function entry to calculate the got/toc pointer.
bfd/
* elf64-ppc.c (build_plt_stub): Switch stubs to use r11 as base
reg and r12 as destination.
(ppc_build_one_stub): Likewise.
(ppc64_elf_build_stubs): Likewise for glink.
ld/testsuite/
* ld-powerpc/tls.s: Add proper .opd entry for _start.
* ld-powerpc/tlstoc.s: Likewise.
* ld-powerpc/relbrlt.d: Update for changed stubs.
* ld-powerpc/tls.d: Update for changed stubs and _start .opd entry.
* ld-powerpc/tls.g: Likewise.
* ld-powerpc/tlsexe.d: Likewise.
* ld-powerpc/tlsexe.g: Likewise.
* ld-powerpc/tlsexe.r: Likewise.
* ld-powerpc/tlsexetoc.d: Likewise.
* ld-powerpc/tlsexetoc.g: Likewise.
* ld-powerpc/tlsexetoc.r: Likewise.
* ld-powerpc/tlsso.d: Likewise.
* ld-powerpc/tlsso.g: Likewise.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlstoc.d: Likewise.
* ld-powerpc/tlstoc.g: Likewise.
* ld-powerpc/tlstocso.d: Likewise.
* ld-powerpc/tlstocso.g: Likewise.
* ld-powerpc/tlstocso.r: Likewise.
There's no real need to emit these always: They're needed only if we
indeed want to emit a localized symbol. Hence defer emission until we
at least did the basic early checks that would lead to no such symbol
getting emitted. This in particular avoids emitting such a symbol in
the majority of (if not all) "ld -r" cases.
I hope my set of cross build tests caught all the test cases needing
adjustment - please forgive if I missed a few.
bfd/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* elflink.c (struct elf_outext_info): Add field file_sym_done.
(bfd_elf_final_link): Initialize new field. Move fake STT_FILE
symbol emission from here ...
(elf_link_output_extsym): ... to here.
gas/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* gas/microblaze/relax_size.elf: Drop expectation of no longer
present STT_FILE symbol.
* gas/microblaze/relax_size2.elf: Likewise.
ld/testsuite/
2013-10-29 Jan Beulich <jbeulich@suse.com>
* ld-cris/tls-e-tpoffcomm1.d: Drop expectation of no longer
present STT_FILE symbol.
* ld-mmix/bpo-18.d: Likewise.
* ld-mmix/bpo-22.d: Likewise.
* ld-mmix/greg-6.d: Likewise.
* ld-mmix/greg-7.d: Likewise.
* ld-mmix/loc4.d: Likewise.
* ld-mmix/local1.d: Likewise.
* ld-mmix/local3.d: Likewise.
* ld-mmix/local5.d: Likewise.
* ld-mmix/local7.d: Likewise.
* ld-mmix/loct-1.d: Likewise.
* ld-sh/sh64/abi32.xd: Likewise.
* ld-sh/sh64/abi64.xd: Likewise.
* ld-sh/sh64/cmpct1.xd: Likewise.
* ld-sh/sh64/crange1.rd: Likewise.
* ld-sh/sh64/crange2.rd: Likewise.
* ld-sh/sh64/crange3-cmpct.rd: Likewise.
* ld-sh/sh64/crange3-media.rd: Likewise.
* ld-sh/sh64/crange3.rd: Likewise.
* ld-sh/sh64/crangerel1.rd: Likewise.
* ld-sh/sh64/crangerel2.rd: Likewise.
* ld-sh/sh64/mix1.xd: Likewise.
* ld-sh/sh64/mix2.xd: Likewise.
* ld-sh/sh64/shdl32.xd: Likewise.
* ld-sh/sh64/shdl64.xd: Likewise.
* elfxx-mips.c (mips_use_local_got_p): New function.
(mips_elf_count_got_symbols, mips_elf_calculate_relocation): Use it.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
GOT and absolute references.
ld/testsuite/
* ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.rd: Fix symbol value of extf4.
No longer expect extf3, extf4 and extd2 to be in the global GOT.
* archures.c (bfd_mach_i386_nacl, bfd_mach_i386_i386_nacl): New macros.
(bfd_mach_x86_64_nacl, bfd_mach_x64_32_nacl): New macros.
* cpu-i386.c (bfd_arch_i386_onebyte_nop_fill): New function.
(bfd_i386_nacl_arch): New variable.
(bfd_x86_64_nacl_arch, bfd_x64_32_nacl_arch): New variables.
(bfd_x64_32_arch_intel_syntax): Link them into the list.
* bfd-in2.h: Regenerate.
ld/
* emulparams/elf_i386_nacl.sh (ARCH): Set to i386:nacl.
* emulparams/elf_x86_64_nacl.sh (ARCH): Set to i386:x86-64:nacl.
* emulparams/elf32_x86_64_nacl.sh (ARCH): Set to i386:x64-32:nacl.
ld/testsuite/
* ld-x86-64/x86-64.exp (Mixed x86_64 and i386 input test 1):
Loosen string match to admit i386:x86-64*.
(Mixed x86_64 and i386 input test 2): Likewise.
* ld-x86-64/ilp32-2.d: Likewise.
* ld-x86-64/ilp32-3.d: Likewise.
* ld-x86-64/lp64-2.d: Likewise.
* ld-x86-64/lp64-3.d: Likewise.
* ld-x86-64/ia32-2.d: Likewise, and i386.* too.
* ld-x86-64/ia32-3.d: Likewise.
* elf-nacl.c (nacl_modify_segment_map): Fix logic reordering the
elf_segment_map list. If an executable segment is page-aligned
but does not end with a full page, then append a fake section into
the segment map entry that pads out the page.
(nacl_final_write_processing): New function. Write the code fill
laid out in nacl_modify_segment_map.
* elf-nacl.h: Declare it.
* elf32-arm.c (elf32_arm_nacl_final_write_processing): New function.
(elf_backend_final_write_processing): Define it for NaCl backend.
* elf32-i386.c (elf_backend_final_write_processing): Likewise.
* elf64-x86-64.c (elf_backend_final_write_processing): Likewise.
* elf-nacl.c (segment_eligible_for_headers): Rename MAXPAGESIZE
parameter to MINPAGESIZE.
(nacl_modify_segment_map): Use minpagesize instead of maxpagesize.
* elf32-arm.c (ELF_MINPAGESIZE, ELF_COMMONPAGESIZE): Set to
0x10000 for NaCl targets.
ld/testsuite/
* ld-x86-64/ilp32-4-nacl.d: Loosen .shstrtab line regexp to match
any file offset.
* ld-x86-64/tlsbin-nacl.rd: Update expected code segment PT_LOAD.
* ld-x86-64/tlsbindesc-nacl.rd: Likewise.
* ld-scripts/rgn-at3.d: XFAIL for *-*-nacl* targets.
* ld-scripts/rgn-over8-ok.d: Likewise.
explicit patterns for test target qualification. Define extra
tool flags for *-*-hpux* and tic6x-*-* targets. Link with a
linker script. Use alternative patterns for targets that do not
eliminate copy relocs, currently mn10300-*-* and vax-*-*.
* ld-elf/comm-data2.s: Handle HPUX's `.comm' syntax.
* ld-elf/comm-data2.ld: New test linker script.
* ld-elf/comm-data2.xd: Match section's VMA too. Ignore ASCII
data dump.
* ld-elf/comm-data2r.rd: New test pattern.
* ld-elf/comm-data2r.sd: New test pattern.
* ld-elf/comm-data2r.xd: New test pattern.
* ld-mips-elf/comm-data.exp: Use check_shared_lib_support rather
than an explicit pattern for test target qualification. Link
with a linker script.
* ldgram.y: Likewise
* ldlex.l: Likewise
* NEWS: Mention the new feature.
* ld.texinfo: Document the new feature.
* ld-scripts/log2.exp: New: Run the new log2 test.
* ld-scripts/log2.s: Source for the new test.
* ld-scripts/log2.t: Linker script for new test.
* elf32-arm.c (elf32_arm_final_link_relocate): Use origin of output
segment containing the relocating symbol instead of assuming 0 for
sb group relocations.
* ld-arm/group-relocs-ldr-bad.s: Redefine bar into foo section
beyond 16 bit offset width.
* ld-arm/group-relocs-ldrs-bad.s: Likewise.
* ld-arm/group-relocs-ldr-bad.d: Adjust expected result.
* ld-arm/group-relocs-ldrs-bad.d: Likewise.
* ld-arm/group-relocs.s: Add comments. Move symbols used for sb
group relocations into .data section. Drop section zero. Use pc/r0
as base register when pc/sb group relocations are used.
* ld-arm/group-relocs.d: Adjust expected result.
* ld-arm/group-relocs-alu-bad-2.d: New test for sb group relocation.
* ld-arm/group-relocs-ldc-bad-2.d: Likewise.
* ld-arm/group-relocs-ldr-bad-2.d: New test for pc group relocation.
* ld-arm/group-relocs-ldrs-bad-2.d: Likewise.
* ld-arm/unresolved-2.d: Add sb relocation failure test.
* ld-arm/group-relocs-alu-bad-2.s: New test source.
* ld-arm/group-relocs-ldr-bad-2.s: Likewise.
* ld-arm/group-relocs-ldrs-bad-2.s: Likewise.
* ld-arm/group-relocs-ldc-bad-2.s: Likewise.
* ld-arm/unresolved-2.s: Likewise.
* ld-arm/arm-elf.exp: For group-relocs, drop section zero start
definition. Run the new tests.
* ld-vax-elf/export-class-call.rd: New test.
* ld-vax-elf/export-class-call.xd: New test.
* ld-vax-elf/export-class-data.dd: New test.
* ld-vax-elf/export-class-data.rd: New test.
* ld-vax-elf/export-class-data.xd: New test.
* ld-vax-elf/export-class.ld: New test linker script.
* ld-vax-elf/export-class-call.s: New test source.
* ld-vax-elf/export-class-data.s: New test source.
* ld-vax-elf/export-class-def.s: New test source.
* ld-vax-elf/vax-elf.exp: Run the new tests.
* ld-vax-elf/vax-export-class.rd: New test.
* ld-vax-elf/vax-export-class.xd: New test.
* ld-vax-elf/export-class.exp: New test script.
* elf32-vax.c (elf_vax_check_relocs) <R_VAX_GOT32, R_VAX_PLT32>:
Don't check symbol visibility here. Remove a check already
asserted for.
(elf_vax_instantiate_got_entries): Use SYMBOL_REFERENCES_LOCAL
instead of individual checks.
(elf_vax_relocate_section) <R_VAX_GOT32, R_VAX_PLT32>: Only
check the offset to decide if produce a GOT or PLT entry.
Remove redundant assertions. Remove code to produce GOT entries
for local symbols. Remove a duplicate comment and add a comment
on GOT relocations.
(elf_vax_finish_dynamic_symbol): Remove code to produce RELATIVE
dynamic relocs.
ld/testsuite/
* ld-vax-elf/got-local-exe.xd: New test.
* ld-vax-elf/got-local-lib.xd: New test.
* ld-vax-elf/got-local-aux.s: New test source.
* ld-vax-elf/got-local-def.s: New test source.
* ld-vax-elf/got-local-ref.s: New test source.
* ld-vax-elf/vax-elf.exp: Run the new tests.
PR ld/15762
* ld-elf/shared.exp (build_tests): Check .gnu.warning section
in the libbarw.so library.
* ld-elf/libbarw.rd: New.
* lib/ld-lib.exp (run_cc_link_tests): Support checking on
output with warning message.
thumb only targets.
(elf32_arm_final_link_relocate): Likewise.
* ld-arm/thumb-b-lks-sym.d: Updated to be more flexible.
* ld-arm/thumb-bl-lks-sym.d: Likewise.
(elf32_arm_stub_long_branch_arm_nacl_pic): New variable.
(arm_build_one_stub): Increase MAXRELOCS to 3.
(arm_type_of_stub): Use them if GLOBALS->nacl_p.
(struct elf32_arm_link_hash_table): Give add_stub_section member's
pointee type a third argument.
(elf32_arm_create_or_find_stub_sec): Update caller.
(elf32_arm_size_stubs): Update argument type.
* bfd-in.h (elf32_arm_size_stubs): Update decl.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* emultempl/armelf.em (elf32_arm_add_stub_section): Take third
argument ALIGNMENT_POWER, use it instead of constant 3.
* ld-arm/farcall-arm-nacl.d: New file.
* ld-arm/farcall-arm-nacl-pic.d: New file.
* ld-arm/farcall-data-nacl.d: New file.
* ld-arm/arm-elf.exp (armeabitests_common): Add extra element to
"action" lists for those cases to use a different dump file for NaCl
targets.
Massage $armeabitests_common to drop the extra element or the one
before it, depending on [istarget "arm*-*-nacl*"].
* ld-arm/arm-elf.exp (armelftests_common): Move all "Cortex-A8
erratum fix", Thumb-only and interworking cases to ...
(armelftests_nonacl): ... here.
(armeabitests_common): Move all "erratum 760522 fix", Thumb-only
and interworking cases to ...
(armeabitests_nonacl): ... here.
* mips.h (EF_MIPS_NAN2008): New macro.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Handle
EF_MIPS_NAN2008.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
binutils/
* readelf.c (get_machine_flags): Handle EF_MIPS_NAN2008.
gas/
* config/tc-mips.c (mips_flag_nan2008): New variable.
(options): Add OPTION_NAN enum value.
(md_longopts): Handle it.
(md_parse_option): Likewise.
(s_nan): New function.
(mips_elf_final_processing): Handle EF_MIPS_NAN2008.
(md_show_usage): Add -mnan.
* doc/as.texinfo (Overview): Add -mnan.
* doc/c-mips.texi (MIPS Opts): Document -mnan.
(MIPS NaN Encodings): New node. Document .nan directive.
(MIPS-Dependent): List the new node.
gas/testsuite/
* gas/mips/nan-2008-1.d: New test.
* gas/mips/nan-2008-2.d: New test.
* gas/mips/nan-2008-3.d: New test.
* gas/mips/nan-2008-4.d: New test.
* gas/mips/nan-legacy-1.d: New test.
* gas/mips/nan-legacy-2.d: New test.
* gas/mips/nan-legacy-3.d: New test.
* gas/mips/nan-legacy-4.d: New test.
* gas/mips/nan-legacy-5.d: New test.
* gas/mips/nan-error-1.l: New list test.
* gas/mips/nan-error-2.l: New list test.
* gas/mips/nan-2008-override.s: New test source.
* gas/mips/nan-2008.s: New test source.
* gas/mips/nan-legacy-override.s: New test source.
* gas/mips/nan-legacy.s: New test source.
* gas/mips/nan-error-1.s: New test source.
* gas/mips/nan-error-2.s: New test source.
* gas/mips/mips.exp: Run the new tests.
ld/testsuite/
* ld-mips-elf/nan-2008.d: New test.
* ld-mips-elf/nan-legacy.d: New test.
* ld-mips-elf/nan-mixed-1.d: New test.
* ld-mips-elf/nan-mixed-2.d: New test.
* ld-mips-elf/nan-2008.s: New test source.
* ld-mips-elf/nan-legacy.s: New test source.
bfd/
* elf32-s390.c: Rewrite GOT accesses using larl if possible.
* elf64-s390.c: Likewise.
ld/testsuite/
* ld-s390/gotreloc-1.s: New file.
* ld-s390/gotreloc-1.ver: New file.
* ld-s390/gotreloc_31-1.dd: New file.
* ld-s390/gotreloc_64-1.dd: New file.
* ld-s390/s390.exp: Run the new tests. Run 31 bit tests also on 64
bit.
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
include/elf/
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
gdb/
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
ld/
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
ld/testsuite/
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
opcodes/
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
* elf64-aarch64.c (elf64_aarch64_final_link_relocate): Call
aarch64_resolve_relocation and bfd_elf_aarch64_put_addend to
handle the relocations of R_AARCH64_JUMP26, R_AARCH64_CALL26,
R_AARCH64_LD64_GOT_LO12_NC, R_AARCH64_ADR_GOT_PAGE and
R_AARCH64_GOT_LD_PREL19.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'.
* ld-aarch64/ifunc-7c.d: New test.
