Commit graph

12791 commits

Author SHA1 Message Date
GDB Administrator
e7622e5214 Automatic date update in version.in 2016-06-17 00:00:20 +00:00
H.J. Lu
ca45f6e990 Add missing ChangeLog entries
commit bf52d7c720
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Wed Jun 15 10:35:38 2016 -0700

    Don't check undefined symbol for IFUNC reloc
2016-06-16 12:38:34 -07:00
H.J. Lu
bf52d7c720 Don't check undefined symbol for IFUNC reloc
Since x86 elf_*_check_relocs is called after all symbols have been
resolved, there is no need to check undefined symbols for relocations
against IFUNC symbols.

bfd/

	* elf32-i386.c (elf_i386_check_relocs): Don't check undefined
	symbols for relocations against IFUNC symbols.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.

ld/

	* testsuite/ld-i386/i386.exp: Run pr19636-2e-nacl.
	* testsuite/ld-i386/pr19636-2e.d: Skip for NaCl targets.
	Remove .rel.plt section.
	* testsuite/ld-i386/pr19636-2e-nacl.d: New file.
2016-06-16 11:28:29 -07:00
Marcin Kościelnicki
f92339b8f3 bfd/s390: Fix DT_PLTRELSZ in presence of R_390_IRELATIVE.
This was broken by 4ade44b727,
which changed the calculation to use the .rela.plt linker section
instead of its output section - thus skipping .rela.iplt .
Fix the calculations to include it.

bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_sections): Include
	.rela.iplt in DT_PLTRELSZ.
	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise,
	for DT_PLTRELSZ and DT_RELASZ as well.
2016-06-16 17:22:14 +02:00
H.J. Lu
081b1afe5a Skip relocations in non-loaded, non-alloced sections
Don't do anything special with non-loaded, non-alloced sections.
In particular, any relocs in such sections should not affect GOT
and PLT reference counting (ie. we don't allow them to create GOT
or PLT entries), there's no possibility or desire to optimize TLS
relocs, and there's not much point in propagating relocs to shared
libs that the dynamic linker won't relocate.

	* elf32-i386.c (elf_i386_check_relocs): Skip relocations in
	non-loaded, non-alloced sections.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-16 05:52:34 -07:00
H.J. Lu
4c23f2ffa8 Check SEC_ALLOC before allocating dynamic relocation
* elf32-i386.c (elf_i386_check_relocs): Check SEC_ALLOC before
	allocating dynamic relocation.
	* elf64-x86-64.c (elf_x86_64_check_relocs): Likewise.
2016-06-15 18:42:56 -07:00
GDB Administrator
77b1142d4e Automatic date update in version.in 2016-06-16 00:00:19 +00:00
Senthil Kumar Selvaraj
31eef93e71 Fix PR ld/20254
This patch fixes another edge case related to alignment property
records - reloc offsets adjacent to property record offsets were not
getting adjusted during relaxation.

bfd/

	PR ld/20254
	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust reloc
	offsets until reloc_toaddr.

ld/

	PR ld/20254
	* testsuite/ld-avr/avr-prop-6.d: New test.
	* testsuite/ld-avr/avr-prop-6.s: New test.
2016-06-15 12:47:46 +05:30
GDB Administrator
2a1d8bb347 Automatic date update in version.in 2016-06-15 00:00:21 +00:00
H.J. Lu
c428ce9d90 Check R_*_IRELATIVE in x86 reloc_type_class
elf_{i386|x86_64}_reloc_type_class should return reloc_class_ifunc for
R_386_IRELATIVE/R_X86_64_IRELATIVE relocations.  There is no need to
check symbol type for STN_UNDEF symbol index.

	* elf32-i386.c (elf_i386_reloc_type_class): Check R_386_IRELATIVE.
	Don't check symbol type for STN_UNDEF symbol index.
	* elf64-x86-64.c (elf_x86_64_reloc_type_class): Check
	R_X86_64_IRELATIVE.  Don't check symbol type for STN_UNDEF symbol
	index.
2016-06-14 10:18:26 -07:00
H.J. Lu
897463b12b Fix elf_x86_64_reloc_type_class 2016-06-14 10:10:45 -07:00
Thomas Preud'homme
60a019a089 Fix feature checks based on ARM architecture value
2016-06-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (using_thumb_only): Force review of arch check logic for
	new architecture.
	(using_thumb2): Try Tag_THUMB_ISA_use first and check
	for exact arch value then.  Force review of arch check logic for new
	architecture.
	(arch_has_arm_nop): Update and fix arch check logic.  Force review of
	that logic for new architecture.
	(arch_has_thumb2_nop): Remove.
	(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
	(elf32_arm_final_link_relocate): Likewise but using thumb2.
2016-06-14 12:02:53 +01:00
Alan Modra
3860d2b4b7 Delete bfd_my_archive macro
Many more places use abfd->my_archive rather than bfd_my_archive (abfd),
so let's make the code consistently use the first idiom.

bfd/
	* bfd-in.h (bfd_my_archive): Delete.
	* bfd-in2.h: Regenerate.
binutils/
	* ar.c: Expand uses of bfd_my_archive.
	* size.c: Likewise.
ld/
	* ldlang.c: Expand uses of bfd_my_archive.
	* ldmain.c: Likewise.
	* ldmisc.c: Likewise.
	* plugin.c: Likewise.
2016-06-14 13:24:37 +09:30
Alan Modra
b0cffb4767 Set my_archive for thin archives
LTO plugin support in plugin_maybe_claim wants to close the IR bfd
after replacing it with the recompiled object, but can't do so for
archive elements due to various pointers that access the archive bfd.
Thin archives have the same problem.  They too cannot have their
element bfds closed.

	PR ld/20241
bfd/
	* archive.c (open_nested_file): Set my_archive.
	* bfd.c (_bfd_default_error_handler <%B>): Exclude archive file name
	for thin archives.
	* bfdio.c (bfd_tell): Don't adjust origin for thin archives.
	(bfd_seek): Likewise.
	* bfdwin.c (bfd_get_file_window): Likewise.
	* cache.c (cache_bmmap): Likewise.
	(bfd_cache_lookup_worker): Don't look in my_archive for thin archives.
	* mach-o.c (bfd_mach_o_follow_dsym): Don't open my_archive for
	thin archives.
	* plugin.c (try_claim): Likewise.
	* xcofflink.c (xcoff_link_add_dynamic_symbols): Use import path of
	file within thin archive, not the archive.
binutils/
	* bucomm.c (bfd_get_archive_filename): Return file name within thin
	archive.
ld/
	* ldmain.c (add_archive_element): Just print file name of file within
	thin archives.
	* ldmisc.c (vfinfo): Likewise.
	* plugin.c (plugin_object_p): Open file within thin archives.
	(plugin_maybe_claim): Expand comment.
2016-06-14 13:12:00 +09:30
GDB Administrator
57bc0e78e9 Automatic date update in version.in 2016-06-14 00:00:19 +00:00
H.J. Lu
712ec27916 Add the GOT base for GOT32 relocs against IFUNC
Add the GOT base for R_386_GOT32/R_386_GOT32X relocations against IFUNC
symbols if there is no base register and disallow them for PIC.

bfd/

	PR ld/20244
	* elf32-i386.c (elf_i386_relocate_section): Add the .got.plt
	section address for R_386_GOT32/R_386_GOT32X relocations against
	IFUNC symbols if there is no base register and return error for
	PIC.

ld/

	PR ld/20244
	* testsuite/ld-i386/i386.exp: Run pr20244-2a, pr20244-2b,
	pr20244-2c and pr20244-2d.
	* testsuite/ld-i386/no-plt.exp: Run pr20244-3a and pr20244-3b.
	* testsuite/ld-i386/pr20244-2.s: New file.
	* testsuite/ld-i386/pr20244-2a.d: Likewise.
	* testsuite/ld-i386/pr20244-2b.d: Likewise.
	* testsuite/ld-i386/pr20244-2c.d: Likewise.
	* testsuite/ld-i386/pr20244-2d.d: Likewise.
	* testsuite/ld-i386/pr20244-3a.c: Likewise.
	* testsuite/ld-i386/pr20244-3b.S: Likewise.
	* testsuite/ld-i386/pr20244-3c.S: Likewise.
	* testsuite/ld-i386/pr20244-3d.S: Likewise.
2016-06-13 11:11:23 -07:00
H.J. Lu
ca8c86efe7 Add 2 i386 tests to call IFUNC functions via GOT
bfd/

	* elf32-i386.c (elf_i386_relocate_section): Simplify IFUNC
	GOT32 adjustment for static executables.

ld/

2016-06-13  H.J. Lu  <hongjiu.lu@intel.com>

	* testsuite/ld-i386/i386.exp: Run ifunc-1a and ifunc-1b.
	* testsuite/ld-i386/ifunc-1a.c: New file.
	* testsuite/ld-i386/ifunc-1b.S: Likewise.
	* testsuite/ld-i386/ifunc-1c.S: Likewise.
	* testsuite/ld-i386/ifunc-1d.S: Likewise.
2016-06-13 09:27:12 -07:00
Maciej W. Rozycki
0c9663cbd4 MIPS/BFD: Update outdated comment about o32 R_MIPS_PC32 reloc support
Complement:

commit b47468a6db
Author: Catherine Moore <clm@redhat.com>
Date:   Mon May 6 15:25:45 2013 +0000

and the return of support for R_MIPS_PC32 there.

	bfd/
	* elf32-mips.c (elf_mips_gnu_pcrel32): Update comment.
2016-06-13 16:59:37 +01:00
Claudiu Zissulescu
815dc1bcdc [ARC] Fix condition.
bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf_arc_relocate_section): Fixed condition.
2016-06-13 17:45:38 +02:00
Cupertino Miranda
3b63d2cee1 [ARC] Fixes related to reordering of .got and .got.plt
- Correctly solved relocations on the .got header.
- This bug arrised from enabling RELRO (-z combreloc).
  Because the .got and .got.plt sections were split in new linker
  scripts the header is no longer part of sgotplt contents.
  Changed the patch to sgot contents instead.
- Latest fix to .got header relocs.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf_arc_finish_dynamic_sections): Changed.
2016-06-13 16:10:00 +02:00
Cupertino Miranda
2ab2f40d58 [ARC] General bug fixes
Fail safe for trying to reloc GOT and PLT on non dynamic linker.  Fix
issue with dynamic relocs not being generated with -pie.  Removed some
structures that were not being used.  Fixed typo changing RELENT to
RELAENT.  Fix for all SECTOFF relocations.

bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (arc_local_data, arc_local_data): Removed.
	(SECTSTART): Changed.
	(elf_arc_relocate_section): Fixed mistake in PIE related
	condition.
	(elf_arc_size_dynamic_sections): Changed DT_RELENT to DT_RELAENT.
2016-06-13 16:07:02 +02:00
Cupertino Miranda
0f7f3789ca [ARC] Generate DT_RELACOUNT.
bfd/
2016-06-13  Cupertino Miranda  <cmiranda@synospsy.com>

	* elf32-arc.c (elf32_arc_reloc_type_class): Defined function to
	enable support for "-z combreloc" and DT_RELACOUNT.
	(elf_backend_reloc_type_class): Likewise
2016-06-13 16:04:04 +02:00
GDB Administrator
1d3843e0b7 Automatic date update in version.in 2016-06-13 00:00:15 +00:00
H.J. Lu
74d7f0aa5b Subtract GOT base only with a base register
When relocating R_386_GOT32 in "op $0, bar@GOT", we shouldn't subtract
GOT base without a base register and we should disallow it without a
base register for PIC.

bfd/

	PR ld/20244
	* elf32-i386.c (elf_i386_relocate_section): When relocating
	R_386_GOT32, return error without a base register for PIC and
	subtract the .got.plt section address only with a base register.

ld/

	PR ld/20244
	* testsuite/ld-i386/i386.exp: Run pr20244-1a and pr20244-1b.
	* testsuite/ld-i386/pr20244-1.s: New file.
	* testsuite/ld-i386/pr20244-1a.d: Likewise.
	* testsuite/ld-i386/pr20244-1b.d: Likewise.
	* testsuite/ld-i386/pr20244-1c.d: Likewise.
2016-06-11 21:24:01 -07:00
GDB Administrator
0a41a307ca Automatic date update in version.in 2016-06-12 00:00:17 +00:00
Alan Modra
ef53be8916 Use size_t rather than bfd_size_type
I noticed when writing _bfd_elf_strtab_save/restore that size_t would
be better than bfd_size_type for a number of things in elf-strtab.c.
Using a 64-bit bfd_size_type on a 32-bit host doesn't make much sense
for array sizes and indices.

	* elf-strtab.c (struct strtab_save): Use size_t for "size".
	(struct elf_strtab_hash): Likewise for "size" and "alloced".
	(_bfd_elf_strtab_init): Formatting.
	(_bfd_elf_strtab_add): Return size_t rather than bfd_size_type.
	(_bfd_elf_strtab_addref): Take size_t idx param.
	(_bfd_elf_strtab_delref, _bfd_elf_strtab_refcount): Likewise.
	(_bfd_elf_strtab_offset): Likewise.
	(_bfd_elf_strtab_clear_all_refs): Use size_t idx.
	(_bfd_elf_strtab_save): Use size_t "idx" and "size" vars.
	(_bfd_elf_strtab_restore, _bfd_elf_strtab_emit): Similarly.
	(_bfd_elf_strtab_finalize): Similarly.
	* elf-bfd.h (_bfd_elf_strtab_add): Update prototypes.
	(_bfd_elf_strtab_addref, _bfd_elf_strtab_delref): Likewise.
	(_bfd_elf_strtab_refcount, _bfd_elf_strtab_offset): Likewise.
	* elf.c (bfd_elf_get_elf_syms): Calculate symbol buffer size
	using bfd_size_type.
	(bfd_section_from_shdr): Delete amt.
	(_bfd_elf_init_reloc_shdr): Likewise.
	(_bfd_elf_link_assign_sym_version): Likewise.
	(assign_section_numbers): Use size_t reloc_count.
	* elflink.c (struct elf_symbuf_head): Use size_t "count".
	(bfd_elf_link_record_dynamic_symbol): Use size_t for some vars.
	(elf_link_is_defined_archive_symbol): Likewise.
	(elf_add_dt_needed_tag): Likewise.
	(elf_finalize_dynstr): Likewise.
	(elf_link_add_object_symbols): Likewise.
	(bfd_elf_size_dynamic_sections): Likewise.
	(elf_create_symbuf): Similarly.
	(bfd_elf_match_symbols_in_sections): Likewise.
	(elf_link_swap_symbols_out): Likewise.
	(elf_link_check_versioned_symbol): Likewise.
	(bfd_elf_gc_record_vtinherit): Likewise.
	(bfd_elf_gc_common_finalize_got_offsets): Likewise.
2016-06-11 17:24:56 +09:30
GDB Administrator
de5b02b698 Automatic date update in version.in 2016-06-11 00:00:19 +00:00
GDB Administrator
936f2d3c42 Automatic date update in version.in 2016-06-10 00:00:18 +00:00
Denis Chertykov
5c41dbc302 Fix PR 20221 - adjust syms and relocs only if relax shrunk section.
This patch fixes an edge case in linker relaxation that causes symbol
values to be computed incorrectly in the presence of align directives
in input source code.

bfd/
	* elf32-avr.c (elf32_avr_relax_delete_bytes): Adjust syms
	and relocs only if shrinking occurred.

ld/
	* testsuite/ld-avr/avr-prop-5.d: New.
	* testsuite/ld-avr/avr-prop-5.s: New.
2016-06-09 19:17:43 +03:00
GDB Administrator
6b10ba223f Automatic date update in version.in 2016-06-09 00:00:15 +00:00
H.J. Lu
6eaa7fb59b Support i386 TLS code sequences without PLT
We can generate i386 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *___tls_get_addr@GOT(%reg)

where EBX register isn't required as GOT base, instead of direct call:

call ___tls_get_addr[@PLT]

which requires EBX register as GOT base.

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, 7-byte lea instruction before call instruction
is replaced by 6-byte one to make room for indirect call.  For local
dynamic model, we simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte
lea instruction.  Since linker may convert

call ___tls_get_addr[@PLT]

to

addr32 call ____tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

	* elf64-i386.c (elf_i386_link_hash_entry): Add tls_get_addr.
	(elf_i386_link_hash_newfunc): Initialize tls_get_addr to 2.
	(elf_i386_check_tls_transition): Check indirect call and direct
	call with the addr32 prefix for general and local dynamic models.
	Set the tls_get_addr feild.
	(elf_i386_convert_load_reloc): Always use addr32 prefix for
	indirect ___tls_get_addr call via GOT.
	(elf_i386_relocate_section): Handle GD->LE, GD->IE and LD->LE
	transitions with indirect call and direct call with the addr32
	prefix.

ld/

	* testsuite/ld-i386/i386.exp: Run libtlspic2.so, tlsbin2,
	tlsgd3, tlsld2, tlsgd4, tlspie3a, tlspie3b and tlspie3c.
	* testsuite/ld-i386/pass.out: New file.
	* testsuite/ld-i386/tls-def1.c: Likewise.
	* testsuite/ld-i386/tls-gd1.S: Likewise.
	* testsuite/ld-i386/tls-ld1.S: Likewise.
	* testsuite/ld-i386/tls-main1.c: Likewise.
	* testsuite/ld-i386/tls.exp: Likewise.
	* testsuite/ld-i386/tlsbin2-nacl.rd: Likewise.
	* testsuite/ld-i386/tlsbin2.dd: Likewise.
	* testsuite/ld-i386/tlsbin2.rd: Likewise.
	* testsuite/ld-i386/tlsbin2.sd: Likewise.
	* testsuite/ld-i386/tlsbin2.td: Likewise.
	* testsuite/ld-i386/tlsbinpic2.s: Likewise.
	* testsuite/ld-i386/tlsgd3.dd: Likewise.
	* testsuite/ld-i386/tlsgd3.s: Likewise.
	* testsuite/ld-i386/tlsgd4.d: Likewise.
	* testsuite/ld-i386/tlsgd4.s: Likewise.
	* testsuite/ld-i386/tlsld2.s: Likewise.
	* testsuite/ld-i386/tlspic2-nacl.rd: Likewise.
	* testsuite/ld-i386/tlspic2.dd: Likewise.
	* testsuite/ld-i386/tlspic2.rd: Likewise.
	* testsuite/ld-i386/tlspic2.sd: Likewise.
	* testsuite/ld-i386/tlspic2.td: Likewise.
	* testsuite/ld-i386/tlspic3.s: Likewise.
	* testsuite/ld-i386/tlspie3.s: Likewise.
	* testsuite/ld-i386/tlspie3a.d: Likewise.
	* testsuite/ld-i386/tlspie3b.d: Likewise.
	* testsuite/ld-i386/tlspie3c.d: Likewise.
2016-06-08 12:01:50 -07:00
GDB Administrator
33c2b983b4 Automatic date update in version.in 2016-06-08 00:00:19 +00:00
Marcin Kościelnicki
3b67f09464 bfd/s390: Misc minor fixes.
The only non-comment fix here is in the code writing out the 3 fixed
.got.plt entries - it mistakenly put a 64-bit 0 at offsets 8 and 12
instead of 8 and 16.

bfd/ChangeLog:

	* elf32-s390.c (elf_s390_finish_dynamic_symbol): Fix comment.
	* elf64-s390.c (elf_s390x_plt_entry): Fix comment.
	(elf_s390_relocate_section): Fix comment.
	(elf_s390_finish_dynamic_sections): Fix initialization of fixed
	.got.plt entries.
2016-06-07 18:14:15 +02:00
Andreas Krebbel
161db27905 Fix PLT first entry GOT operand calculation.
Embedding the .plt section in another revealed a bug in the way the
larl operand of the first magic plt entry is being calculated.  Fixed
with the attached patch.

bfd/ChangeLog:

	* elf64-s390.c (elf_s390_finish_dynamic_sections): Subtract plt
	section offset when calculation the larl operand in the first PLT
	entry.

ld/ChangeLog:

	* testsuite/ld-s390/pltoffset-1.dd: New test.
	* testsuite/ld-s390/pltoffset-1.ld: New test.
	* testsuite/ld-s390/pltoffset-1.s: New test.
	* testsuite/ld-s390/s390.exp: Run new test.
2016-06-07 16:47:10 +02:00
Alan Modra
14b57c7c6a PowerPC VLE
VLE is an encoding, not a particular processor architecture, so it
isn't really proper to select insns based on PPC_OPCODE_VLE.  For
example
{"evaddw",  VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
{"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}},
shows two insns that have the same encoding, both available with VLE.
Enabling both with VLE means we can't disassemble the second variant
even if -Maltivec is given rather than -Mspe.  Also, we don't check
user assembly against the processor type as well as we could.

Another problem is that when using the VLE encoding, insns from the
main ppc opcode table are not available, except those using opcode 4
and 31.  Correcting this revealed two errors in the ld testsuite,
use of "nop" and "rfmci" when -mvle.

This patch fixes those problems in the opcode table, and removes
PPCNONE.  I find a plain 0 distracts less from other values.

In addition, I've implemented code to recognize some machine values
from the apuinfo note present in ppc32 objects.  It's not a complete
disambiguation since we're lacking info to detect newer chips, but
what we have should help with disassembly.

include/
	* elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
	PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
	PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
	PPC_APUINFO_VLE: Define.
opcodes/
	* ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
	cpu for "vle" to e500.
	* ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
	(PPCNONE): Delete, substitute throughout.
	(powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
	except for major opcode 4 and 31.
	(vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
bfd/
	* cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry
	to match other 32-bit archs.
	* elf32-ppc.c (_bfd_elf_ppc_set_arch): New function.
	(ppc_elf_object_p): Call it.
	(ppc_elf_special_sections): Use APUINFO_SECTION_NAME.  Fix
	overlong line.
	(APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here.
	* elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch.
	* bfd-in.h (_bfd_elf_ppc_at_tls_transform,
	_bfd_elf_ppc_at_tprel_transform): Move to..
	* elf-bfd.h: ..here.
	(_bfd_elf_ppc_set_arch): Declare.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR,
	PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE,
	PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define.
	(ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden
	by vle_opcodes, and that vle flag doesn't enable opcodes.  Don't
	add vle_opcodes twice.
	(ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL.
ld/
	* testsuite/ld-powerpc/apuinfo1.s: Delete nop.
	* testsuite/ld-powerpc/apuinfo-vle2.s: New.
	* testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
2016-06-07 22:04:38 +09:30
GDB Administrator
e5f5f1fc49 Automatic date update in version.in 2016-06-07 00:00:16 +00:00
H.J. Lu
e2cbcd9156 Support x86-64 TLS code sequences without PLT
We can generate x86-64 TLS code sequences for general and local dynamic
models without PLT, which uses indirect call via GOT:

call *__tls_get_addr@GOTPCREL(%rip)

instead of direct call:

call __tls_get_addr[@PLT]

Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.

For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call.  For local dynamic model, we
simply use 5-byte indirect call.

TLS linker optimization is updated to recognize new instruction patterns.
For local dynamic model to local exec model transition, we generate
4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and
generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.  Since linker may convert

call *__tls_get_addr@GOTPCREL(%rip)

to

addr32 call __tls_get_addr

when producing static executable, both patterns are recognized.

bfd/

	* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add tls_get_addr.
	(elf_x86_64_link_hash_newfunc): Initialize tls_get_addr to 2.
	(elf_x86_64_check_tls_transition): Check indirect call and
	direct call with the addr32 prefix for general and local dynamic
	models.  Set the tls_get_addr feild.
	(elf_x86_64_convert_load_reloc): Always use addr32 prefix for
	indirect __tls_get_addr call via GOT.
	(elf_x86_64_relocate_section): Handle GD->LE, GD->IE and LD->LE
	transitions with indirect call and direct call with the addr32
	prefix.

ld/

	* testsuite/ld-x86-64/pass.out: New file.
	* testsuite/ld-x86-64/tls-def1.c: Likewise.
	* testsuite/ld-x86-64/tls-gd1.S: Likewise.
	* testsuite/ld-x86-64/tls-ld1.S: Likewise.
	* testsuite/ld-x86-64/tls-main1.c: Likewise.
	* testsuite/ld-x86-64/tls.exp: Likewise.
	* testsuite/ld-x86-64/tlsbin2-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.dd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.rd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.sd: Likewise.
	* testsuite/ld-x86-64/tlsbin2.td: Likewise.
	* testsuite/ld-x86-64/tlsbinpic2.s: Likewise.
	* testsuite/ld-x86-64/tlsgd10.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd10.s: Likewise.
	* testsuite/ld-x86-64/tlsgd11.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd11.s: Likewise.
	* testsuite/ld-x86-64/tlsgd12.d: Likewise.
	* testsuite/ld-x86-64/tlsgd12.s: Likewise.
	* testsuite/ld-x86-64/tlsgd13.d: Likewise.
	* testsuite/ld-x86-64/tlsgd13.s: Likewise.
	* testsuite/ld-x86-64/tlsgd14.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd14.s: Likewise.
	* testsuite/ld-x86-64/tlsgd5c.s: Likewise.
	* testsuite/ld-x86-64/tlsgd6c.s: Likewise.
	* testsuite/ld-x86-64/tlsgd9.dd: Likewise.
	* testsuite/ld-x86-64/tlsgd9.s: Likewise.
	* testsuite/ld-x86-64/tlsld4.dd: Likewise.
	* testsuite/ld-x86-64/tlsld4.s: Likewise.
	* testsuite/ld-x86-64/tlsld5.dd: Likewise.
	* testsuite/ld-x86-64/tlsld5.s: Likewise.
	* testsuite/ld-x86-64/tlsld6.dd: Likewise.
	* testsuite/ld-x86-64/tlsld6.s: Likewise.
	* testsuite/ld-x86-64/tlspic2-nacl.rd: Likewise.
	* testsuite/ld-x86-64/tlspic2.dd: Likewise.
	* testsuite/ld-x86-64/tlspic2.rd: Likewise.
	* testsuite/ld-x86-64/tlspic2.sd: Likewise.
	* testsuite/ld-x86-64/tlspic2.td: Likewise.
	* testsuite/ld-x86-64/tlspic3.s: Likewise.
	* testsuite/ld-x86-64/tlspie2.s: Likewise.
	* testsuite/ld-x86-64/tlspie2a.d: Likewise.
	* testsuite/ld-x86-64/tlspie2b.d: Likewise.
	* testsuite/ld-x86-64/tlspie2c.d: Likewise.
	* testsuite/ld-x86-64/tlsgd5.dd: Updated.
	* testsuite/ld-x86-64/tlsgd6.dd: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run libtlspic2.so, tlsbin2,
	tlsgd5b, tlsgd6b, tlsld4, tlsld5, tlsld6, tlsgd9, tlsgd10,
	tlsgd11, tlsgd14, tlsgd12, tlsgd13, tlspie2a, tlspie2b and
	tlspie2c.
2016-06-06 11:07:16 -07:00
GDB Administrator
b5966800ea Automatic date update in version.in 2016-06-06 00:00:15 +00:00
GDB Administrator
1704fca7da Automatic date update in version.in 2016-06-05 00:00:19 +00:00
Christian Groessler
2ac27cd3c1 Add z8k ld testsuite and fix range check in coff-z8k.c
bfd/
	* coff-z8k.c (extra_case): Fix range check for R_JR relocation.

ld/
	* ld/testsuite/ld-z8k/0filler.s: New file.
	* ld/testsuite/ld-z8k/branch-target.s: New file.
	* ld/testsuite/ld-z8k/branch-target2.s: New file.
	* ld/testsuite/ld-z8k/calr-back-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-back-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/calr-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/calr-opcode.s: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/dbjnz-opcode.s: New file.
	* ld/testsuite/ld-z8k/djnz-back-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-back-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/djnz-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/djnz-opcode.s: New file.
	* ld/testsuite/ld-z8k/filler.s: New file.
	* ld/testsuite/ld-z8k/jr-back-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-back-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/jr-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/jr-opcode.s: New file.
	* ld/testsuite/ld-z8k/ldr-back-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-back-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-back-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-back-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/ldr-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/ldr-opcode.s: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-8001.d: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-8002.d: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-fail-8001.d: New file.
	* ld/testsuite/ld-z8k/ldrb-forw-fail-8002.d: New file.
	* ld/testsuite/ld-z8k/ldrb-opcode.s: New file.
	* ld/testsuite/ld-z8k/ldrb-opcode2.s: New file.
	* ld/testsuite/ld-z8k/other-file.s: New file.
	* ld/testsuite/ld-z8k/reloc.dd: New file.
	* ld/testsuite/ld-z8k/reloc.ld: New file.
	* ld/testsuite/ld-z8k/relocseg.dd: New file.
	* ld/testsuite/ld-z8k/relocseg.ld: New file.
	* ld/testsuite/ld-z8k/relocseg1.dd: New file.
	* ld/testsuite/ld-z8k/test-ld.sh: New file.
	* ld/testsuite/ld-z8k/this-file.s: New file.
	* ld/testsuite/ld-z8k/z8k.exp: New file.
2016-06-04 22:15:52 +02:00
GDB Administrator
de3da64574 Automatic date update in version.in 2016-06-04 00:00:18 +00:00
GDB Administrator
e94321588d Automatic date update in version.in 2016-06-03 00:00:18 +00:00
Nick Clifton
99914dfd71 Add "arm_any" architecture type to allow -m option to various binutils to match any ARM architecture.
PR target/20088
	* cpu-arm.c (processors): Add "arm_any" type to match any ARM
	architecture.
	(arch_info_struct): Likewise.
	(architectures): Likewise.
2016-06-02 17:17:03 +01:00
Vineet Gupta
4ad0bb5f3a Allow ARC Linux targets that do not use uclibc.
bfd    * config.bfd: Replace -uclibc with *.

gas    * configure.tgt: Replace -uclibc with *.

ld     * configure.tgt: Replace -uclibc with *.
2016-06-02 15:03:47 +01:00
H.J. Lu
3ddf1bdd42 Replace data32 with data16 in comments
The 0x66 prefix is data16, not data32 in 64-bit.

	* elf64-x86-64.c: Replace data32 with data16 in comments.
2016-06-02 06:50:45 -07:00
Alan Modra
5b677558bc Revert PR16467 change
This reverts the pr16467 change, which was incorrect due to faulty
analysis of the pr16467 testcase.  The failure was not due to a
mismatch in symbol type (ifunc/non-ifunc) but due to a symbol loop
being set up.

See https://sourceware.org/ml/binutils/2016-06/msg00013.html for some
rambling on versioned symbols and ELF shared library symbol overriding
that explain this patch.

bfd/
	PR ld/20159
	PR ld/16467
	* elflink.c (_bfd_elf_merge_symbol): Revert PR16467 change.
	(_bfd_elf_add_default_symbol): Don't indirect to/from defined
	symbol given a version by a script different to the version
	of the symbol being added.
	(elf_link_add_object_symbols): Use _bfd_elf_strtab_save and
	_bfd_elf_strtab_restore.  Don't fudge dynstr references.
	* elf-strtab.c (_bfd_elf_strtab_restore_size): Delete.
	(struct strtab_save): New.
	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): New functions.
	* elf-bfd.h (_bfd_elf_strtab_restore_size): Delete.
	(_bfd_elf_strtab_save, _bfd_elf_strtab_restore): Declare.
2016-06-02 12:28:39 +09:30
Trevor Saunders
1fe0971e41 add more extern C
opcodes/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* nds32-asm.h: Add extern "C".
	* sh-opc.h: Likewise.

bfd/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf32-hppa.h: Add extern "C".
	* elf32-nds32.h: Likewise.
	* elf32-tic6x.h: Likewise.

include/ChangeLog:

2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* elf/mips.h: Likewise.
	* elf/sh.h: Likewise.
	* opcode/d10v.h: Likewise.
	* opcode/d30v.h: Likewise.
	* opcode/ia64.h: Likewise.
	* opcode/mips.h: Likewise.
	* opcode/ppc.h: Likewise.
	* opcode/sparc.h: Likewise.
	* opcode/tic6x.h: Likewise.
	* opcode/v850.h: Likewise.
2016-06-01 21:26:32 -04:00
GDB Administrator
65ce606bc4 Automatic date update in version.in 2016-06-02 00:00:19 +00:00
Nick Clifton
885a10879e Add new Serbian translation for the bfd library.
* po/sr.po: New Serbian translation.
	* configure.ac (ALL_LINGUAS): Add sr.
	* configure: Regenerate.
2016-06-01 16:51:55 +01:00
GDB Administrator
75c039be62 Automatic date update in version.in 2016-06-01 00:00:18 +00:00