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6353 commits

Author SHA1 Message Date
Nick Clifton
e407c74b5b * archures.c: Add support for MIPS r5900
* bfd-in2.h: Add support for MIPS r5900
	* config.bfd: Add support for Sony Playstation 2
	* cpu-mips.c: Add support for MIPS r5900
	* elfxx-mips.c: Add support for MIPS r5900 (extension of r4000)

	* config/tc-mips.c: Add support for MIPS r5900
	Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq.
	* config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot.
	* config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900.
	* config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
	* config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900.
	* configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu).

	* config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900.

	* elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software.
	* opcode/mips.h: Add support for r5900 instructions including lq and sq.

	* configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk).
	* emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32.
	* emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32.
	* Makefile.am: Add linker scripts for Sony Playstation 2 ELF files.

	* opcodes/mips-dis.c: Add names for CP0 registers of r5900.
	* opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq.

	* opcodes/mips-opc.c: Add support for MIPS r5900 CPU.
	Add support for 128 bit MMI (Multimedia Instructions).
	Add support for EE instructions (Emotion Engine).
	Disable unsupported floating point instructions (64 bit and undefined compare operations).
	Enable instructions of MIPS ISA IV which are supported by r5900.
	Disable 64 bit co processor instructions.
	Disable 64 bit multiplication and division instructions.
	Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)).
	Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900.
	Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
2013-01-04 17:22:53 +00:00
Yufeng Zhang
fb098a1efc opcodes/
2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* aarch64-opc.c (aarch64_print_operand): Change to print
	AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal
	in comment.
	* aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag
	from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and
	OP_MOV_IMM_WIDE.

gas/testsuite/

2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/int-insns.d: Update.
	* gas/aarch64/mov.d: Update.
	* gas/aarch64/reloc-insn.d: Update.

ld/testsuite/

2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>

	* ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to
	the objdump directive.
	* ld-aarch64/emit-relocs-266.d: Ditto.
	* ld-aarch64/emit-relocs-268.d: Ditto.
	* ld-aarch64/emit-relocs-269.d: Ditto.
	* ld-aarch64/emit-relocs-270.d: Ditto.
	* ld-aarch64/emit-relocs-271.d: Ditto.
	* ld-aarch64/emit-relocs-272.d: Ditto.
2013-01-04 14:59:33 +00:00
Nick Clifton
a32c3ff848 * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,
PLIL1STRM, PLIL2KEEP, PLIL2STRM, PLIL3KEEP and PLIL3STRM.

        * gas/aarch64/system.d: Update.
2013-01-04 13:32:06 +00:00
H.J. Lu
6265840747 Update copyright year to 2013
binutils/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* version.c (print_version): Update copyright year to 2013.

gas/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* as.c (parse_args): Update copyright year to 2013.

ld/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* ldver.c (ldversion): Update copyright year to 2013.

opcodes/

2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (process_copyright): Update copyright year to 2013.
2013-01-02 17:15:38 +00:00
Yufeng Zhang
95830fd17d gas/
2013-01-02  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
	and "cortex57".
2013-01-02 14:56:30 +00:00
Nick Clifton
517bb291f2 PR gas/14987
* gas/arm/neon-ldst-es.s: Add whitespace test.
	* gas/arm/neon-ldst-es.d: Update expected disassembly.

	* config/tc-arm.c (parse_address_main): Skip whitespace before a
	closing bracket.
2013-01-02 13:38:57 +00:00
Richard Earnshaw
bacf7d35e0 Fix commit date in previous commit. 2012-12-20 16:31:15 +00:00
Richard Earnshaw
d709e4e6c7 2012-12-20 Greta Yorsh <Greta.Yorsh@arm.com>
* config/tc-arm.c (rfefa,rfeea,rfeed): Fix encoding.
	(rfe,srs,srsea,srsfa,srsed,srsfd): Add missing mnemonics.

	* gas/arm/srs-t2.s: Add tests for missing srs modes.
	* gas/arm/srs-t2.l: Update expected output.
	* gas/arm/srs-arm.s: Add tests for missing srs modes.
	* gas/arm/srs-arm.l: Update expected output.
	* gas/arm/archv6.s: Add tests for missing rfe modes.
	* gas/arm/archv6.d: Update expected output.
2012-12-20 16:19:53 +00:00
Michael Eager
886e427f80 PR ld/14736
bfd:
	* elf32-microblaze.c (calc_fixup): Add end range.
gas/testsuite:
	* gas/microblaze/relax_size.exp: New file - test object size after linker
	relaxation
	* gas/microblaze/relax_size.s: Likewise
	* gas/microblaze/relax_size.elf: Likewise
	* gas/microblaze/relax_size2.s: Likewise
	* gas/microblaze/relax_size2.elf: Likewise
2012-12-18 16:01:02 +00:00
Nick Clifton
5bf135a788 Add copyright notices 2012-12-17 16:56:12 +00:00
Michael Eager
69b06cc85f Microblaze: Add support for handling TLS symbol suffixes and generating
TLS relocs for General Dynamic and Local Dynamic models.

bfd/Changelog
          * reloc.c: Add new relocations
          * bfd-in2.h: Regenerated
          * libbfd.h: Regenerated
          * elf32-microblaze.c (microblaze_elf_howto_raw):
            Add TLS relocations
            (microblaze_elf_reloc_type_lookup): Likewise
            (elf32_mb_link_hash_entry): define TLS reference types
            (elf32_mb_link_hash_table): add TLS Local dynamic GOT entry
            #define has_tls_reloc if section has TLS relocs
            (dtprel_base), (check_unique_offset): New
            (microblaze_elf_output_dynamic_relocation): output simple
            dynamic relocation into SRELOC.
            (microblaze_elf_relocate_section): Accommodate TLS relocations.
            (microblaze_elf_check_relocs): Likewise
            (update_local_sym_info): New
            (microblaze_elf_copy_indirect_symbol): Add tls_mask.
            (allocate_dynrelocs): Handle TLS symbol
            (microblaze_elf_size_dynamic_sections): Set size and offset
            (microblaze_elf_finish_dynamic_symbol): Use
             microblaze_elf_output_dynamic_relocation

gas/Changelog
          * config/tc-microblaze.c: Define TLS offsets
            (md_relax_table): Add TLS offsets
            (imm_types), (match_imm), (get_imm_otype): New to support
            TLS offsets.
            (tc_microblaze_fix_adjustable): Add TLS relocs.
            (md_convert_frag): Support TLS offsets.
            (md_apply_fix), (md_estimate_size_before_relax), (tc_gen_reloc):
            Add TLS relocs

include/Changelog
          * elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
2012-12-11 16:56:53 +00:00
Nick Clifton
752937aa0c Add copyright notices 2012-12-10 12:48:03 +00:00
Yufeng Zhang
67a324470a gas/
2012-12-06  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/tc-aarch64.c (exp_has_bignum_p): Remove.
	(my_get_expression): Not get rid of bignums.
	(s_ltorg): Increase the range of 'align'.
	(programmer_friendly_fixup): Allow bignum expression.

gas/testsuite/

2012-12-06  Yufeng Zhang  <yufeng.zhang@arm.com>

	* gas/aarch64/illegal.s: Add test for unaccepted LDR literal.
	* gas/aarch64/illegal.l: Update.
	* gas/aarch64/programmer-friendly.s: Add tests for LDR literal with
	the auto-generation of literal in pool.
	* gas/aarch64/programmer-friendly.d: Update.
2012-12-06 15:45:38 +00:00
Michael Eager
94dda8b768 opcodes/Changelog:
* microblaze-opc.h: Rename INST_TYPE_RD_R1_SPECIAL to
	INST_TYPE_R1_R2_SPECIAL
	* microblaze-dis.c (print_insn_microblaze): Same.
gas/Changelog
	* gas/config/tc-microblaze.c: Rename INST_TYPE_RD_R1_SPECIAL to
	INST_TYPE_R1_R2_SPECIAL, don't set RD for wic.
2012-11-29 21:09:01 +00:00
Julian Brown
d406f3e430 gas/
* config/tc-arm.c (md_apply_fix): Fix conversion of BL to BLX for
    local targets in Thumb mode.

    gas/testsuite/
    * gas/arm/bl-local-2.s: New test.
    * gas/arm/bl-local-2.d: New.
2012-11-28 16:53:01 +00:00
Roland McGrath
6595185552 binutils/testsuite/
* lib/binutils-common.exp (is_zlib_supported): New function.
	* lib/utils-lib.exp (run_dump_test): If as options include
	--compress-debug-sections and zlib is not available, report
	the test as unsupported.
	* binutils-all/compress.exp: Bail out if zlib is not available.
	* binutils-all/objdump.exp (objdump compressed debug):
	Mark unsupported if zlib is not available.
	* binutils-all/readelf.exp (readelf_compressed_wa_test): Likewise.

gas/testsuite/
	* lib/gas-defs.exp (run_dump_test): If as options include
	--compress-debug-sections and zlib is not available, report
	the test as unsupported.

ld/testsuite/
	* ld-elf/compress.exp: Bail out if zlib is not supported.
	* lib/ld-lib.exp (run_dump_test): If as options include
	--compress-debug-sections and zlib is not available, report
	the test as unsupported.
2012-11-27 17:26:11 +00:00
Alan Modra
776fc41826 include/opcode/
* ppc.h (ppc_parse_cpu): Update prototype.
opcodes/
	* ppc-dis.c (ppc_parse_cpu): Add "sticky" param.  Track bits
	set from ppc_opts.sticky in it.  Delete "retain_mask".
	(powerpc_init_dialect): Choose default dialect from info->mach
	before parsing -M options.  Handle more bfd_mach_ppc variants.
	Update common default to power7.
gas/
	* config/tc-ppc.c (sticky): New var.
	(md_parse_option, ppc_machine): Update ppc_parse_cpu calls.
gas/testsuite/
	* gas/ppc/astest2.d: Pass -Mppc to objdump.
ld/testsuite/
	* ld-powerpc/plt1.d: Update for default "at" branch hints.
	* ld-powerpc/tlsexe.d: Likewise.
	* ld-powerpc/tlsexetoc.d: Likewise.
	* ld-powerpc/tlsopt1.d: Likewise.
	* ld-powerpc/tlsopt1_32.d: Likewise.
	* ld-powerpc/tlsopt2.d: Likewise.
	* ld-powerpc/tlsopt2_32.d: Likewise.
	* ld-powerpc/tlsopt4.d: Likewise.
	* ld-powerpc/tlsopt4_32.d: Likewise.
	* ld-powerpc/tlsso.d: Likewise.
	* ld-powerpc/tlstocso.d: Likewise.
2012-11-23 03:28:13 +00:00
Michael Eager
abe9f67d45 Add swap byte (swapb) and swap halfword (swaph) opcodes.
binutils/opcodes
          * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES.
          * microblaze-opcm.h (microblaze_instr): Likewise
binutils/gas/testsuite
          * gas/microblaze/allinsn.s: Add swapb, swaph
          * gas/microblaze/allinsn.d: Likewise
2012-11-21 17:54:11 +00:00
Michael Eager
0db4b3260c Add stack high register and stack low register for MicroBlaze
hardware assisted stack protection, stores stack low / stack high limits
for detecting stack overflow / underflow

binutils/opcodes
          * microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
          * microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK
binutils/gas
          * config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR
binutils/gas
          * gas/microblaze/allinsn.s: Test use of SHR, SLR
          * gas/microblaze/allinsn.d: Likewise
2012-11-21 17:34:14 +00:00
Roland McGrath
bacebabc8e gas/
* config/tc-arm.c (arm_symbol_chars): New variable.
	* config/tc-arm.h (tc_symbol_chars): New macro, defined to that.

gas/testsuite/
	* gas/arm/macro-pld.s: New file.
	* gas/arm/macro-pld.d: New file.
2012-11-20 17:53:46 +00:00
H.J. Lu
9b30cccca9 Fix opcode for 64-bit jecxz
gas/testsuite/

	PR gas/14859
	* gas/i386/x86-64-opcode.s: Add jecxz.
	* gas/i386/x86-64-opcode.d: Updated.

opcodes/

	PR gas/14859
	* i386-opc.tbl: Fix opcode for 64-bit jecxz.
	* i386-tbl.h: Regenerated.
2012-11-20 14:21:33 +00:00
Andreas Krebbel
0b7fe784ac 2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-opc.txt: Fix srstu and strag opcodes.

2012-11-20  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/zarch-z9-109.d: Fix srstu opcode.
	* gas/s390/zarch-z900.d: Replace lasp with strag.
2012-11-20 11:58:30 +00:00
Yufeng Zhang
3e0baa280f gas/ChangeLog
2012-11-20  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/tc-aarch64.c (first_error_fmt): Add ATTRIBUTE_UNUSED to the
	local variable "ret".
2012-11-20 10:29:00 +00:00
David S. Miller
668b27eacf Fix sparc bitness overrides in GAS. Noticed by Eric Botcazou.
gas/

	* config/tc-sparc.c (md_parse_option): Only certain arch
	specifications should override the object to be 32-bit
	or 64-bit.
2012-11-20 08:37:52 +00:00
Michael Eager
d3da77419a opcodes/
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
	update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
	and increase MAX_OPCODES.
	(op_code_struct):  add mbar and sleep
	* microblaze-opcm.h (microblaze_instr): add mbar
	Define IMM_MBAR and IMM5_MBAR_MASK
	* microblaze-dis.c: Add get_field_imm5_mbar
	(print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE

gas/
	* config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5

gas/testsuite/
	* gas/microblaze/allinsn.s: Add mbar and sleep
	* gas/microblaze/allinsn.d: Likewise
2012-11-14 17:05:24 +00:00
Michael Eager
ed8ec0ec78 Add clz opcode.
opcodes/
	* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add clz insn
	* microblaze-opcm.h (microblaze_instr): add clz

gas/testsuite/
	* gas/microblaze/allinsn.s: Add clz insn
	* gas/microblaze/allinsn.d: Likewise
2012-11-14 16:45:01 +00:00
Michael Eager
e692c2171e Add the endian reversing versions of load/store instructions;
2012-11-14  Edgar E. Iglesias <edgar.iglesias@gmail.com>

	* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct):  add lbur,
	lhur, lwr, sbr, shr, swr
	* microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
	swr

2012-11-14  David Holsgrove  <david.holsgrove@xilinx.com>

	* gas/microblaze/allinsn.exp: New file - test newly added opcodes
	* gas/microblaze/allinsn.s: Likewise
	* gas/microblaze/allinsn.d: Likewise
2012-11-14 16:19:30 +00:00
Ulrich Weigand
46b596ff8c gas/ChangeLog:
* config/tc-ppc.c (md_apply_fix): Leave field zero when emitting
	an ELF reloc on data as well.

gas/testsuite/ChangeLog:

	* gas/ppc/astest.d: Update for fixup changes.
	* gas/ppc/astest64.d: Likewise.
	* gas/ppc/astest2.d: Likewise.
	* gas/ppc/astest2_64.d: Likewise.
	* gas/ppc/test1elf32.d: Likewise.
	* gas/ppc/test1elf64.d: Likewise.
2012-11-14 13:44:45 +00:00
H.J. Lu
8f5846c8af Correct gas microblaze ChangeLog entry 2012-11-12 16:39:48 +00:00
Michael Eager
477a32403b Add missing test cases.
* gas/microblaze/endian.exp: New file - endian testcase for microblaze / microblazeel.
	* gas/microblaze/endian.s: Likewise.
	* gas/microblaze/endian_be.d: Likewise.
	* gas/microblaze/endian_le.d: Likewise.
	* gas/microblaze/endian_le_elf.d: Likewise.
2012-11-12 00:23:25 +00:00
Maciej W. Rozycki
0420f52b94 * read.h (s_vendor_attribute): Move to...
* config/obj-elf.h (obj_elf_vendor_attribute): ... here.
	* read.c (potable): Remove "gnu_attribute".
	(skip_whitespace, skip_past_char, skip_past_comma): Delete, move
	to config/obj-elf.c.
	(s_vendor_attribute): Delete, move to obj_elf_vendor_attribute
	in config/obj-elf.c.
	(s_gnu_attribute): Delete, move to obj_elf_gnu_attribute in
	config/obj-elf.c.
	* config/obj-elf.c (elf_pseudo_table): Add "gnu_attribute".
	(skip_whitespace, skip_past_char, skip_past_comma): New, moved
	from read.c.
	(obj_elf_vendor_attribute): New, moved from s_vendor_attribute
	in read.c.
	(obj_elf_gnu_attribute): New, moved from s_gnu_attribute in
	read.c.
	* config/tc-arm.c (s_arm_eabi_attribute): Rename
	s_vendor_attribute to obj_elf_vendor_attribute.
	* config/tc-tic6x.c (s_tic6x_c6xabi_attribute): Likewise.
2012-11-09 18:07:10 +00:00
Nick Clifton
de863c7475 2012-11-09 Nick Clifton <nickc@redhat.com>
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
	(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
	* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
	* config.bfd: Likewise.
	* configure.in: Add bfd_elf32_v850_rh850_vec.
	* cpu-v850.c: Update printed description.
	* cpu-v850_rh850.c: New file.
	* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
	relocs.
	(v850_elf_perform_relocation): Likewise.
	(v850_elf_final_link_relocate): Likewise.
	(v850_elf_relocate_section): Likewise.
	(v850_elf_relax_section): Likewise.
	(v800_elf_howto_table): New.
	(v850_elf_object_p): Add support for RH850 ABI values.
	(v850_elf_final_write_processing): Likewise.
	(v850_elf_merge_private_bfd_data): Likewise.
	(v850_elf_print_private_bfd_data): Likewise.
	(v800_elf_reloc_map): New.
	(v800_elf_reloc_type_lookup): New.
	(v800_elf_reloc_name_lookup): New.
	(v800_elf_info_to_howto): New.
	(bfd_elf32_v850_rh850_vec): New.
	(bfd_arch_v850_rh850): New.
	* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.

	* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
	(guess_is_rela): Add EM_V800.
	(dump_relocations): Likewise.
	(get_machine_name): Update EM_V800.
	(get_machine_flags): Add support for RH850 ABI flags.
	(is_32bit_abs_reloc): Add support for RH850 ABI reloc.

	* config/tc-v850.c (v850_target_arch): New.
	(v850_target_format): New.
	(set_machine): Use v850_target_arch.
	(md_begin): Likewise.
	(md_show_usage): Document new switches.
	(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
	-m4byte-align.
	* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
	(TARGET_FORMAT): Use v850_target_format.
	* doc/c-v850.texi: Document new options.

	* v850.h: Add RH850 ABI values.

	* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
	* Makefile.in: Regenerate.
	* configure.tgt (v850*-*-*): Make v850_rh850 the default
	emulation. Add vanilla v850 as an extra emulation.
	* emulparams/v850_rh850.sh: New file.
	* scripttempl/v850_rh850.sc: New file.

	* configure.in: Add bfd_v850_rh850_arch.
	* configure: Regenerate.
	* disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
Nick Clifton
708e2187a3 2012-11-09 Nick Clifton <nickc@redhat.com>
* elf32-rx.c (describe_flags): New function.  Returns a buffer
	containing a description of the E_FLAG_RX_... values set.
	(rx_elf_merge_private_bfd_data): Use it.
	(rx_elf_print_private_bfd_data): Likewise.
	(elf32_rx_machine): Skip EF_RX_CPU_RX check.
	(elf32_rx_special_sections): Define.
	(elf_backend_special_sections): Define.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* config/obj-elf.c (obj_elf_change_section): Allow init array
	sections to have the SHF_EXECINSTR attribute for the RX target.
	* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
	(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
	(md_longopts): Add -mgcc-abi and -mrx-abi.
	(md_parse_option): Add support for OPTION_USES_GCC_ABI and
	OPTION_USES_RX_ABI.
	* doc/as.texinfo (RX Options): Add mention of remaining RX
	options.
	* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* rx.h (EF_RX_CPU_RX): Add comment.
	(E_FLAG_RX_ABI): Define.

2012-11-09  Nick Clifton  <nickc@redhat.com>

	* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
	true.
	(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
	(PARSE_AND_LIST_ARG_CASES): Add support for
	--flag-mismatch-warnings.
2012-11-09 17:00:44 +00:00
Michael Eager
f23200ada9 Add microblazeel target support to bfd, gas and ld.
binutils/bfd/Changelog

 2012-11-09  Edgar E. Iglesias <edgar.iglesias@gmail.com>

          * config.bfd: Add microblazeel-*-*
          * configure.in: Likewise.
          * configure: Regenerate.
          * elf32-microblaze.c (microblaze_elf_relocate_section):
            Add endian awareness.
            (microblaze_elf_merge_private_bfd_data): New.
            (microblaze_bfd_write_imm_value_32): New.
            (microblaze_bfd_write_imm_value_64): New.
            (microblaze_elf_relax_section): Add endian awareness.
            (microblaze_elf_add_symbol_hook): Define TARGET_LITTLE_NAME,
            TARGET_LITTLE_SYM and bfd_elf32_bfd_merge_private_bfd_data.
          * targets.c: Add bfd target bfd_elf32_microblazeel_vec.

binutils/gas/Changelog

 2012-11-09  Edgar E. Iglesias <edgar.iglesias@gmail.com>

          * tc-microblaze.c (md_longopts): Define OPTION_EB and
            OPTION_EL for target.
            (md_parse_option): Likewise.
          * tc-microblaze.h: Set elf32-microblazeel if not
            target_big_endian for TARGET_FORMAT.
          * configure.tgt: Add microblazeel and set endian per target.

binutils/gas/testsuite/Changelog

 2012-11-09  David Holsgrove  <david.holsgrove@xilinx.com>

          * gas/microblaze/endian.exp: New file - endian
            testcase for microblaze / microblazeel.
          * gas/microblaze/endian.s: Likewise.
          * gas/microblaze/endian_be.d: Likewise.
          * gas/microblaze/endian_le.d: Likewise.
          * gas/microblaze/endian_le_elf.d: Likewise.
          * gas/microblaze/reloc_sym.d: Update to accept targets
            other than elf32-microblaze.
          * gas/microblaze/special_reg.d: Likewise.

binutils/ld/Changelog

 2012-11-09  Edgar E. Iglesias <edgar.iglesias@gmail.com>

          * Makefile.am: Add eelf32microblazeel.c and eelf32mbel_linux.c.
          * Makefile.in: Regenerated.
          * configure.tgt: Add microblazeel and set endian per target.
          * emulparams/elf32mb_linux.sh: Add OUTPUT_FORMAT.
          * emulparams/elf32microblaze.sh: Likewise.
          * emulparams/elf32mbel_linux.sh: New file.
          * emulparams/elf32microblazeel.sh: Likewise.
2012-11-09 16:25:12 +00:00
Sean Keys
0570af4ff1 2012-11-07 James Murray <jsm@jsm-net.demon.co.uk>
* config/tc-m68hc11.c: Fix R_M68HC12_16B relocation for movb/w
2012-11-09 14:40:27 +00:00
H.J. Lu
5bb3703f01 Remove trailing redundant `;'
bfd/

	* aout-tic30.c (MY_final_link_callback): Remove trailing
	redundant `;'.
	* coff-h8500.c (extra_case): Likewise.
	(bfd_coff_reloc16_get_value): Likewise.
	* dwarf2.c (_bfd_dwarf2_cleanup_debug_info): Likewise.
	* elf.c (_bfd_elf_slurp_version_tables): Likewise.
	* elf32-frv.c (elf32_frv_relocate_section): Likewise.
	* elf32-v850.c (v850_elf_perform_relocation): Likewise.
	* opncls.c (bfd_calc_gnu_debuglink_crc32): Likewise.
	* plugin.c (add_symbols): Likewise.
	* reloc.c (bfd_check_overflow): Likewise.
	* vms-lib.c (_bfd_vms_lib_archive_p): Likewise.

binutils/

	* coffgrok.c (coff_grok): Remove trailing redundant `;'.
	* resrc.c (open_input_stream): Likewise.

gas/

	* config/atof-ieee.c (gen_to_words): Remove trailing redundant
	`;'.
	* config/atof-vax.c (flonum_gen2vax): Likewise.
	* config/tc-d10v.c (write_2_short): Likewise.
	* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
	* config/tc-s390.c (tc_s390_force_relocation): Likewise.
	* config/tc-v850.c (md_parse_option): Likewise.
	* config/tc-xtensa.c (find_address_of_next_align_frag): Likewise.
	* dwarf2dbg.c (out_header): Likewise.
	* symbols.c (dollar_label_name): Likewise.
	(fb_label_name): Likewise.

ld/

	* testplug.c (record_add_file): Remove trailing redundant `;'.

opcodes/

	* aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
	* ia64-gen.c (fetch_insn_class): Likewise.
2012-11-09 08:29:34 +00:00
Maciej W. Rozycki
5821951ca6 gas/
* config/tc-mips.c (mips_ip) <'u'>: Default to BFD_RELOC_LO16.

	gas/testsuite/
	* gas/mips/lui.d: New test.
	* gas/mips/micromips@lui.d: New test.
	* gas/mips/lui-1.l: New list test.
	* gas/mips/lui-2.l: New list test.
	* gas/mips/lui.s: New test source.
	* gas/mips/lui-1.s: New test source.
	* gas/mips/lui-2.s: New test source.
	* gas/mips/mips.exp: Run the new tests.
2012-11-08 18:21:25 +00:00
Alan Modra
6febeb7413 Regenerate. 2012-11-08 03:03:26 +00:00
Sean Keys
fcdc4d0c03 2012-11-07 James Murray <jsm@jsm-net.demon.co.uk>
* config/tc-m68hc11.c: Fix R_M68HC12_16B relocation for movb/w
2012-11-07 20:36:33 +00:00
Michael Eager
34ecb04d42 2012-11-07 David Holsgrove <david.holsgrove@xilinx.com>
* config/tc-microblaze.c: Remove special register condition check
	for INST_TYPE_RFSL related instructions.

2012-11-07  David Holsgrove  <david.holsgrove@xilinx.com>

	* testsuite/gas/microblaze/special_reg.exp: Add test case.
	* testsuite/gas/microblaze/special_reg.s: Likewise.
	* testsuite/gas/microblaze/special_reg.d: Likewise.
2012-11-07 15:36:09 +00:00
Alan Modra
234fa27ce0 * config/tc-xgate.c: Make some functions static. Formatting
style and whitespace fixes.  Wrap overly long lines.  Format
	help message.
2012-11-06 10:03:32 +00:00
Alan Modra
1849850340 bfd/
* coff-tic4x.c (tic4x_coff0_vec, tic4x_coff0_beh_vec,
	tic4x_coff1_vec, tic4x_coff1_beh_vec, tic4x_coff2_vec,
	tic4x_coff2_beh_vec): Allow SEC_CODE and SEC_READONLY in
	section flags.
gas/
	* config/tc-tic4x.c: Remove alignment TODO comments.
	(tic4x_do_align): Enable subseg_text_p test.
2012-11-06 05:51:18 +00:00
Alan Modra
a38a07e07c bfd/
* elf64-ppc.c (struct ppc_link_hash_table): Add dot_toc_dot.
	(ppc64_elf_size_stubs): Lookup ".TOC.".
	(ppc64_elf_relocate_section): Resolve special symbol ".TOC.".
gas/
	* config/tc-ppc.c (ppc_elf_adjust_symtab): New function, split out..
	(ppc_frob_file_before_adjust): ..from here.
	(md_apply_fix): Set BSF_KEEP on .TOC. if not @tocbase.
	* config/tc-ppc.h (ppc_elf_adjust_symtab): Declare.
	(tc_adjust_symtab): Define.
2012-11-06 05:18:03 +00:00
Alan Modra
1ec2d25ebf * config/tc-ppc.c (md_apply_fix): Fix xcoff build breakage from
last patch.
2012-11-06 03:20:31 +00:00
Sean Keys
9798e45d7e * config/tc-xgate.c: Remove bogus use of <fx_pcrel_adjust>.
* config/tc-m68hc11.c: Likewise.
2012-11-06 00:49:37 +00:00
Alan Modra
d17dce5567 * configure.in: Apply 2012-09-10 change to config.in here. 2012-11-05 10:45:32 +00:00
Alan Modra
3b8b57a949 * config/tc-ppc.c (md_chars_to_number): Delete.
(ppc_setup_opcodes): Assert num_powerpc_operands fit.
	(ppc_is_toc_sym): Move earlier in file.
	(md_assemble): Move code setting reloc from md_apply_fix.  Combine
	non-ELF code setting fixup with ELF code.  Stash opindex in
	fx_pcrel_adjust.  Adjust fixup offset for VLE.  Don't set
	fx_no_overflow here.
	(md_apply_fix): Rewrite to use ppc_insert_operand for all
	resolved instruction fields.  Leave insn field zero when
	emitting an ELF reloc in most cases.
2012-11-05 10:00:12 +00:00
Alan Modra
552c607f04 * write.h (struct fix <fx_pcrel_adjust>): Make it a signed char.
* config/tc-m68k.c (tc_gen_reloc, md_pcrel_from): Remove explicit
	sign extendion of fx_pxrel_adjust.
2012-11-05 07:10:37 +00:00
Maciej W. Rozycki
c06dec1422 * config/tc-mips.c (is_delay_slot_valid): Simplify expression. 2012-11-01 23:03:16 +00:00
Maciej W. Rozycki
ddaf2c4191 gas/
* config/tc-mips.c (append_insn): Set fx_no_overflow for 16-bit
	microMIPS branch relocations.

	gas/testsuite/
	* gas/mips/micromips-b16.d: New test.
	* gas/mips/micromips-b16.s: New test source.
	* gas/mips/mips.exp: Run the new test.
2012-11-01 22:54:11 +00:00