macro_build for nori case.
(SWITCH_TABLE): Define.
(mips_force_relocation): Force a relocation for a switch table
entry.
(md_apply_fix): Write switch table entry value into file.
(tc_gen_reloc): Use BFD_RELOC_GPREL32 for a switch table entry,
and set the addend to the difference between the reloc address and
the subtrahend.
(elf_tc_make_sections): Likewise.
(hppa_tc_make_sections, hppa_tc_symbol): Delete extern decls.
* config/tc-hppa.c (hppa_tc_make_sections): Delete function.
(hppa_tc_symbol): Likewise.
* config/obj-elf.c (elf_frob_file): Delete elf_tc_symbol and
elf_tc_make_sections stuff. It was there to support PA braindamage
which has been fixed, and in the case of elf_tc_make_sections is
redundant with elf_tc_final_processing.
embedded PIC code, accept the difference between two local symbols
as being constant.
(mips_force_relocation): Only force a reloc to be generated for a
PC relative fixup.
(md_apply_fix): For BFD_RELOC_32 and BFD_RELOC_LO16, put the fixup
value into the file if the fixup will not generate a reloc.
flag rather than signedp field. Only permit extended range if
PPC_OPERAND_SIGNOPT flag is set and assembling in 32 bit mode.
Based on patch from David Edelsohn (edelsohn@npac.syr.edu).
(ppc_arch): Check for PPC_OPCODE_PPC before PPC_OPCODE_POWER.
(md_begin): If an instruction has a size specific flag set, only
add it if we are assembling that size.
branch with an instruction that uses $at, in case the branch is
later expanded.
(macro): If EMBEDDED_PIC, case M_JAL_A may use $at.
(md_pcrel_from): If not OBJ_AOUT, return 4 for an undefined symbol
to make it pcrel_offset.
(tc_gen_reloc): If not OBJ_AOUT, set the reloc addend to
reloc->address; another gruesome hack to get gas reloc handling to
do the right thing.
(T12): New macro.
(emit_insn): New function.
(md_assemble): Call it.
(alpha_force_relocation): Handle BFD_RELOC_26, for call_pal instructions.
(lituse_pending): New variable. Set by anything that generates a LITERAL
reloc, cleared by anything that generates a LITUSE reloc, tested by code that
might want to emit a LITUSE reloc.
(emit_unaligned_io): New function. Currently calls md_assemble, but it should
eventually be converted to generate the insn itself and call emit_insn directly.
(emit_load_unal, emit_store_unal, emit_byte_manip_r, emit_extract_r,
emit_insert_r, emit_mask_r, emit_sign_extend, emit_bis_r): Likewise.
(alpha_ip, case 'I'): Handle with BFD_RELOC_23.
(alpha_ip, label get_macro): Don't emit the final instruction if the opcode is
zero.
(alpha_ip, case 'B', subcase 'd'): New case, for subword and unaligned memory
access macros.
(md_apply_fix): Handle BFD_RELOC_26. Generate an error message if the value
can't be resolved.
(mips_pic): Change from int to enum mips_pic_level. Change all
uses (0 becomes NO_PIC, 2 becomes SVR4_PIC).
(load_address): Handle EMBEDDED_PIC.
(macro): Handle EMBEDDED_PIC in all PIC cases.
(md_parse_option): Accept -membedded-pic to use EMBEDDED_PIC. If
OBJ_ELF, accept -KPIC and -call_shared to use SVR4_PIC and accept
-non_shared to use NO_PIC (this is how the Irix 5 assembler
works). Do not permit -G with SVR4_PIC.
(s_abicalls): Warn if -G was used, and force -G 0.
(tc_gen_reloc): Set reloc->addend to 0 for a PC relative reloc for
anything but a.out, not just for ELF. For ECOFF, don't generate a
BFD_RELOC_16_PCREL_S2 reloc unless using EMBEDDED_PIC.
is called.
(dump_section_relocs): Note whether a symbol is a section symbol or not.
(adjust_reloc_syms): For now, always supply an absolute symbol for fixups
without symbols but not yet `done'. Use section_symbol to get the symbol,
instead of going directly for abs_symbol.
(write_relocs) [DEBUG4]: Abort if any symbol referred to by a reloc is not a
section symbol and is not in the symbol table.
(set_symtab): New function, broken out from write_object_file. Counts symbol
table instead of relying on an earlier count.
(write_object_file): Call set_symtab, but do it after potentially invoking the
*_frob_file macros. Don't bother counting symbols. Call symbol_remove,
instead of expanding it in place. Moved the conditionalized `object_file_size'
declaration down to conditionalized block where it's used. When using the
absolute symbol for a fixup without a symbol, set sy_used_in_reloc.
(write_object_file) [BFD_ASSEMBLER]: Call section_symbol to get the correct
symbol for the absolute section.
BFD_ASSEMBLER; I think all such targets that are supported will be matched by
real CPU-OS combinations earlier in the case statement.
(targets *-*-coff*, *-sysv*, *-*-sco*, *-*-sysv32): Deleted. Made some
comments about the dpx2 configuration, but left it disabled, since it couldn't
be reached before.
(target a29k-amd-ebmonold): Deleted.
with S_GET_VALUE. Skip debug symbols to avoid "a really nasty bug". (From
Holger Teutsch, holger@botbso.rhein-main.de.)
(VMS_write_object_file): For "__vt.*" symbols, set S_GET_OTHER field. (Also
from Holger Teutsch.) Watch for a would-be register mask that spans frags.
* config/alpha-opcode.h (ldif, ldig, ldis, ldit): New patterns.
* config/tc-alpha.c (lit8_sec, lit4_sec, lit8_sym, lit4_sym): New variables.
(create_literal_section): New function.
(create_lita_section): Now a macro.
(get_lit8_offset, get_lit4_offset): New functions.
(maybe_set_gp): New function.
(select_gp_value): Call it.
(load_expression): Preserve addend if symbol is a section symbol.
(alpha_ip): Handle new operand type `F' for floating-point constants; store
them in .lit{4,8} sections.
(alpha_ip, case 'G'): Emit LITUSE relocations for symbol exprs.
(obj_coff_section): Declare.
(obj_pseudo_table): Make it available only if MANY_SECTIONS.
(obj_symbol_to_chars) [CROSS_COMPILE]: Some attemps to make this work. It
still doesn't. It now fails to compile, instead of silently compiling to do
nothing.
* config/obj-coff.h (SEPARATE_STAB_SECTIONS): Define only if MANY_SECTIONS.
(OBJ_PROCESS_STAB) [! MANY_SECTIONS]: New macro, just emits a warning.
ic960coff.
* config/ic960coff.mt: New file.
* config/obj-coffbfd.h [TC_I960]: Include coff/i960.h.
(TARGET_FORMAT) [TC_I960]: Use coff-Intel-little.
* config/te-ic960.h (CROSS_COMPILE): Don't undef this. We'll always build
little-endian object files.
* config/tc-i960.c (md_reloc_size): Don't define at all if BFD or
BFD_ASSEMBLER is defined.
(mem_fmt): Since COFF doesn't handle callx relocations yet, treat them like
normal 32-bit relocations.
(md_apply_fix): For callx relocations, store zero.
(tc_bout_fix_to_chars): Store symbol idx for all callx relocations, regardless
of link-relax setting.
(tc_coff_fix2rtype, tc_coff_sizemachdep): New functions.
(i960_handle_align) [! OBJ_BOUT]: If link-relax option is selected, print an
error message and clear it.
* config/tc-i960.h (BFD_ARCH, COFF_FLAGS, COFF_MAGIC, TC_COUNT_RELOC,
TC_COFF_FIX2RTYPE, TC_COFF_SIZEMACHDEP, tc_fix_adjustable): New macros.
(tc_coff_fix2rtype, tc_coff_sizemachdep): Declare.
(objdump_start): Deleted unused proc.
(objdump_start_common): Merged into objdump_start_no_subdir.
* gas/alpha/fp.exp: Use objdump instead of objdump_start_no_subdir, since the
former actually waits for objdump to finish. Specify .rdata section only.
Make comment indicate Alpha architecture rather than SPARC.
* gas/alpha/fp.d: Omit .reginfo patterns. Just use "." to match
against ASCII code 0x2a ("*", special in regexp).
* gas/sun4/addend.exp: Use objdump instead of objdump_start_no_subdir.
