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Author SHA1 Message Date
Doug Evans
e3ea77accc * gas/xc16x/xc16x.exp (*): Add missing " in timeout cases. 2009-12-19 19:34:07 +00:00
Maciej W. Rozycki
42853c79aa * gas/mips/eret-2.s: Add an instruction to fill a branch delay 
slot.
	* gas/mips/eret-2.d: Adjust accordingly.
 2009-12-19 00:24:09 +00:00
Maciej W. Rozycki
7c0fc5246b gas/ 
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
	".aent".

	gas/testsuite/
	* gas/mips/aent.d: New test.
	* gas/mips/aent.s: Source for the new test.
	* gas/mips/mips.exp: Run it.
 2009-12-19 00:21:29 +00:00
Nick Clifton
ff4a8d2b93 PR binutils/10924 
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
        register.
        (do_mrs): Likewise.
        (do_mul): Likewise.

        * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
        unique register numbers.  Extend support for %<>R format to
        thumb32 and coprocessor instructions.

        * gas/arm/unpredictable.s: Add more unpredictable instructions.
        * gas/arm/unpredictable.d: Add expected disassemblies.
 2009-12-17 09:52:18 +00:00
Nick Clifton
ab8e2090b6 PR binutils/10924 
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
        results in unpredictable behaviour.
        (print_insn_arm): Handle %R.

        * gas/arm/unpredictable.s: New test case - checks the disassembly
        of instructions with unpredictable behaviour.
        * gas/arm/unpredictable.d: New file - expected disassembly.
 2009-12-14 16:38:23 +00:00
Sebastian Pop
02e647f941 2009-12-11 Quentin Neill <quentin.neill@amd.com> 
gas/testsuite/
	* gas/i386/fma4.d: Add test cases.
	* gas/i386/fma4.s: Add test cases.
	* gas/i386/x86-64-fma4.d: Add test cases.
	* gas/i386/x86-64-fma4.s: Add test cases.

	opcodes/
	* i386-dis.c (get_vex_imm8): Extend logic to apply in all
	cases, to avoid fetching ahead for the immediate bytes when
	OP_E_memory has already been called.  Fix indentation.
 2009-12-11 20:38:51 +00:00
H.J. Lu
087d837e04 Call symbol_same_p to check to if 2 symbols are the same. 
gas/

2009-12-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/11037
	* expr.c (resolve_expression): Call symbol_same_p to check
	if 2 symbols are the same.

	* symbols.c (symbol_same_p): New.
	* symbols.h (symbol_same_p): Likewise.

gas/testsuite/

2009-12-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/11037
	* gas/i386/intelpic.s: Add testcases.
	* gas/i386/intelpic.d: Updated.
 2009-12-08 03:14:29 +00:00
H.J. Lu
eacc9c891d Support fxsave64 and fxrstor64. 
gas/testsuite/

2009-12-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run x86-64-fxsave and x86-64-fxsave-intel.

	* gas/i386/rex.d: Updated for fxsave64.

	* gas/i386/x86-64-fxsave-intel.d: New.
	* gas/i386/x86-64-fxsave.d: Likewise.
	* gas/i386/x86-64-fxsave.s: Likewise.

opcodes/

2009-12-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (FXSAVE_Fixup): New.
	(FXSAVE): Likewise.
	(mod_table): Use FXSAVE on fxsave and fxrstor.

	* i386-opc.tbl: Add fxsave64 and fxrstor64.
	* i386-tbl.h: Regenerated.
 2009-12-04 07:51:41 +00:00
Nick Clifton
03ee1b7f8e PR gas/11013 
* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
        and QDSUB.

        * gas/arm/arch7em.d: Update expected disassembly.
        * gas/arm/thumb32.d: Likewise.

        * config/tc-arm.c (do_t_simd2): New function.
        (insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
 2009-12-02 20:26:30 +00:00
Sebastian Pop
ccc5981b93 2009-11-17 Quentin Neill <quentin.neill@amd.com> 
Sebastian Pop  <sebastian.pop@amd.com>

	gas/testsuite/
	* gas/i386/x86-64-fma4.d: Add new patterns.
	* gas/i386/x86-64-fma4.s: Same.
	* gas/i386/x86-64-xop.d: Adjusted.

	opcodes/
	* i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
	decoding the second source operand from the immediate byte.
	(OP_EX_VexW): Pass an extra integer to identify the second
	and third source arguments.
 2009-11-25 15:15:30 +00:00
H.J. Lu
18d0c96eb9 Allow lock on cmpxch16b. 
gas/testsuite/

2009-11-19  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/lock-1.s: Add cmpxchg16b test.
	* gas/i386/lock-1-intel.d: Updated.
	* gas/i386/lock-1.d: Likewise.

opcodes/

2009-11-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add IsLockable to cmpxch16b.
	* i386-tbl.h: Regenerated.
 2009-11-19 15:26:42 +00:00
Nick Clifton
945ee43039 PR binutils/10924 
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
        instructions using Immediate Offset addressing with an offset of
        zero.
        * gas/arm/arch4t.d: Likewise.
        * gas/arm/arm7t.d: Likewise.
        * gas/arm/xscale.d: Likewise.
        * gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
        tst instructions.

        PR binutils/10924
        * arm-dis.c (print_insn_arm): Do not print an offset of zero when
        decoding Immediaate Offset addressing.
 2009-11-19 14:07:11 +00:00
Sebastian Pop
41effecb2d 2009-11-18 Sebastian Pop <sebastian.pop@amd.com> 
opcodes/
	PR binutils/10973
	* i386-dis.c (get_vex_imm8): Do not increment codep.
	Avoid incrementing bytes_before_imm when OP_E_memory
	has already forwarded the codep pointer.
	(OP_EX_VexW): Increment codep to skip mod/rm byte.

	gas/testsuite/
	* gas/i386/x86-64-xop.d: Update patterns.
 2009-11-19 07:08:39 +00:00
Sebastian Pop
f0ae4a24b0 2009-11-18 Sebastian Pop <sebastian.pop@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Remove cvt16.
	(md_show_usage): Same.
	* doc/c-i386.texi: Same.

	gas/testsuite/
	* gas/i386/cvt16.d: Removed.
	* gas/i386/cvt16.s: Removed.
	* gas/i386/x86-64-cvt16.d: Removed.
	* gas/i386/x86-64-cvt16.s: Removed.
	* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.

	opcodes/
	* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
	(VEX_LEN_XOP_08_A1): Removed.
	(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
	VEX_LEN_XOP_08_A1.
	(vex_len_table): Same.
	* i386-gen.c (CPU_CVT16_FLAGS): Removed.
	(cpu_flags): Remove field for CpuCVT16.
	* i386-opc.h (CpuCVT16): Removed.
	(i386_cpu_flags): Remove bitfield cpucvt16.
	(i386-opc.tbl): Remove CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
 2009-11-18 20:28:59 +00:00
H.J. Lu
d72de478df Remove suffix on fxsave. 
2009-11-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rex.d: Remove suffix on fxsave.
 2009-11-18 20:04:47 +00:00
Sebastian Pop
5dd85c9970 2009-11-17 Sebastian Pop <sebastian.pop@amd.com> 
Quentin Neill  <quentin.neill@amd.com>

	gas/
	* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
	(build_vex_prefix): Handle xop08.
	(md_assemble): Don't special case the constant 3 for insns using MODRM.
	(build_modrm_byte): Handle vex2sources.
	(md_show_usage): Add xop and cvt16.
	* doc/c-i386.texi: Document fma4, xop, and cvt16.

	gas/testsuite/
	* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
	Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
	* gas/i386/lwp.d: Update name of the testcase.
	* gas/i386/x86-64-xop.d: New.
	* gas/i386/x86-64-xop.s: New.
	* gas/i386/xop.d: New.
	* gas/i386/xop.s: New.
	* gas/i386/cvt16.d: New.
	* gas/i386/cvt16.s: New.

	opcodes/
	* i386-dis.c (OP_Vex_2src_1): New.
	(OP_Vex_2src_2): New.
	(Vex_2src_1): New.
	(Vex_2src_2): New.
	(XOP_08): Added.
	(VEX_LEN_XOP_08_A0): Added.
	(VEX_LEN_XOP_08_A1): Added.
	(VEX_LEN_XOP_09_80): Added.
	(VEX_LEN_XOP_09_81): Added.
	(xop_table): Added an entry for XOP_08.  Handle xop instructions.
	(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
	VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
	(get_valid_dis386): Handle XOP_08.
	(OP_Vex_2src): New.
	* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
	(cpu_flags): Add CpuXOP and CpuCVT16.
	(opcode_modifiers): Add XOP08, Vex2Sources.
	* i386-opc.h (CpuXOP): Added.
	(CpuCVT16): Added.
	(i386_cpu_flags): Add cpuxop and cpucvt16.
	(XOP08): Added.
	(Vex2Sources): Added.
	(i386_opcode_modifier): Add xop08, vex2sources.
	* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
 2009-11-18 04:04:17 +00:00
Nick Clifton
aefd8a406c * gas/arm/vfma1.d: Only run on ELF based targets. 
PR binutils/10924
        * gas/arm/arch4t-eabi.d: Update expected disassembly.
        * gas/arm/arch4t.d: Likewise.
        * gas/arm/archv6t2.d: Likewise.
        * gas/arm/arm7t.d: Likewise.
        * gas/arm/inst.d: Likewise.
        * gas/arm/xscale.d: Likewise.

        PR binutils/10924
        * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
        instruction variants.  Add pattern for MRS variant that was being
        confused with CMP.
        (arm_decode_shift): Place error message in a comment.
        (print_insn_arm): Note that writing back to the PC is
        unpredictable.
        Only print 'p' variants of cmp/cmn/teq/tst instructions if
        decoding for pre-V6 architectures.
 2009-11-17 17:20:26 +00:00
Paul Brook
9e3c6df664 2009-11-17 Paul Brook <paul@codesourcery.com> 
Daniel Jacobowitz  <dan@codesourcery.com>

	gas/
	* doc/c-arm.texi: Document .arch armv7e-m.
	* config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
	(insns): Put Thumb versions of v5TExP instructions into
	arm_ext_v5exp also.  Move some Thumb variants from
	arm_ext_v6_notm to arm_ext_v6_dsp.
	(arm_archs): Add armv7e-m architecture.
	(aeabi_set_public_attributes): Handle -march=armv7e-m.

	gas/testsuite/
	* gas/arm/attr-march-armv7em.d: New test.
	* gas/arm/arch7em-bad.d: New test.
	* gas/arm/arch7em-bad.l: New test.
	* gas/arm/arch7em.d: New test.
	* gas/arm/arch7em.s: New test.

	include/elf/
	* arm.h (TAG_CPU_ARCH_V7E_M): Define.

	include/opcode/
	* arm.h (ARM_EXT_V6_DSP): Define.
	(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
	(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.

	binutils/
	* readelf.c (arm_attr_tag_CPU_arch): Add v7E-M.

	bfd/
	* elf32-arm.c (using_thumb_only, arch_has_arm_nop,
	arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M.
	(tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
 2009-11-17 16:31:56 +00:00
Nick Clifton
27b4051da3 * gas/rx/macros.inc (creg): Remove cpen. 
* gas/rx/mvfc.d: Remove expected uses of cpen register.
        * gas/rx/mvtc.d: Likewise.
        * gas/rx/popc.d: Likewise.
        * gas/rx/pushc.d: Likewise.
 2009-11-17 10:36:48 +00:00
Nick Clifton
f7c21dc7b8 * config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15. 
(do_vmrs): New function.
        (do_vmsr): New function.
        (insns): Add vmrs and vmsr.

        * gas/arm/vfp1xD.s: Add vmrs and vmsr instructions.
        * gas/arm/vfp1xD.d: Update expected disassembly.
 2009-11-16 11:47:36 +00:00
H.J. Lu
c1ba026631 Check destination operand for lockable instructions. 
gas/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Check destination operand
	for lockable instructions.

gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/lock-1-intel.d: Updated.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.
 2009-11-14 06:04:34 +00:00
H.J. Lu
2a70cca486 Check rex_ignored. 
gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rex.s: Add a test for VEX insn.
	* gas/i386/rex.d: Updated.

opcodes/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Check rex_ignored.
 2009-11-13 23:13:48 +00:00
H.J. Lu
f16cd0d502 Rewrite prefix processing. 
gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run long-1, long-1-intel, x86-64-long-1,
	and x86-64-long-1-intel.

	* gas/i386/long-1-intel.d: New.
	* gas/i386/long-1.d: Likewise.
	* gas/i386/long-1.s: Likewise.
	* gas/i386/x86-64-long-1-intel.d: Likewise.
	* gas/i386/x86-64-long-1.d: Likewise.
	* gas/i386/x86-64-long-1.s: Likewise.

	* gas/i386/jump16.d: Updated for prefix processing.
	* gas/i386/naked.d: Likewise.
	* gas/i386/nops-1-core2.d: Likewise.
	* gas/i386/nops-1-i686.d: Likewise.
	* gas/i386/nops-3-i686.d: Likewise.
	* gas/i386/nops-4-i686.d: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/nops-5.d: Likewise.
	* gas/i386/prefix.d: Likewise.
	* gas/i386/rep.d: Likewise.
	* gas/i386/string-ok.d: Likewise.
	* gas/i386/x86-64-addr32-intel.d: Likewise.
	* gas/i386/x86-64-addr32.d: Likewise.
	* gas/i386/x86-64-cbw-intel.d: Likewise.
	* gas/i386/x86-64-cbw.d: Likewise.
	* gas/i386/x86-64-io-intel.d: Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-lwp.d: Likewise.
	* gas/i386/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/x86-64-nops-1.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.
	* gas/i386/x86-64-nops-3.d: Likewise.
	* gas/i386/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/x86-64-nops-4.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.
	* gas/i386/x86-64-stack-intel.d: Likewise.
	* gas/i386/x86-64-stack-suffix.d: Likewise.
	* gas/i386/x86-64-stack.d: Likewise.

ld/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/tlsbin.dd: Updated for prefix processing.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlsld1.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.

opcodes/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (ckprefix): Updated to return 0 if number of
	prefixes > 14 and record the last position for each prefix.
	(lock_prefix): Removed.
	(data_prefix): Likewise.
	(addr_prefix): Likewise.
	(repz_prefix): Likewise.
	(repnz_prefix): Likewise.
	(last_lock_prefix): New.
	(last_repz_prefix): Likewise.
	(last_repnz_prefix): Likewise.
	(last_data_prefix): Likewise.
	(last_addr_prefix): Likewise.
	(last_rex_prefix): Likewise.
	(last_seg_prefix): Likewise.
	(MAX_CODE_LENGTH): Likewise.
	(ADDR16_PREFIX): Likewise.
	(ADDR32_PREFIX): Likewise.
	(DATA16_PREFIX): Likewise.
	(DATA32_PREFIX): Likewise.
	(REP_PREFIX): Likewise.
	(seg_prefix): Likewise.
	(all_prefixes): Change size to MAX_CODE_LENGTH - 1.
	(prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
	DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
	(get_valid_dis386): Updated.
	(OP_C): Likewise.
	(OP_Monitor): Likewise.
	(REP_Fixup): Likewise.
	(print_insn): Display all prefixes.
	(putop): Set PREFIX_DATA on used_prefixes only if it is used.
	(intel_operand_size): Likewise.
	(OP_E_register): Likewise.
	(OP_G): Likewise.
	(OP_REG): Likewise.
	(OP_IMREG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_sI): Likewise.
	(CRC32_Fixup): Likewise.
	(MOVBE_Fixup): Likewise.
	(OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
	in 16bit mode.
	(OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
	used_prefixes only if it is used.
 2009-11-13 20:42:10 +00:00
H.J. Lu
c32fa91d70 gas/ 
2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (LOCKREP_PREFIX): Removed.
	(REP_PREFIX): New.
	(LOCK_PREFIX): Likewise.
	(PREFIX_GROUP): Likewise.
	(REX_PREFIX): Updated.
	(MAX_PREFIXES): Likewise.
	(add_prefix): Updated.  Return enum PREFIX_GROUP.
	(md_assemble): Check for lock without a lockable instruction.
	(parse_insn): Updated.
	(output_insn): Likewise.

gas/testsuite/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
	x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.

	* gas/i386/lock-1-intel.d: New.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.

opcodes/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IsLockable.

	* i386-opc.h (IsLockable): New.
	(i386_opcode_modifier): Add islockable.

	* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
	bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
	xor, xadd and xchg.
	* i386-tbl.h: Regenerated.
 2009-11-12 18:57:14 +00:00
Daniel Jacobowitz
79862e4574 gas/testsuite/ 
* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d,
	gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions
	and expanded PC-relative offsets.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Use %A instead of %C.  Remove
	generic coprocessor instructions for FPA loads and stores.
	(print_insn_coprocessor): Remove %C support.  Display address for
	PC-relative offsets in %A.
 2009-11-12 14:49:45 +00:00
H.J. Lu
f310f33d50 gas/testsuite/ 
2009-11-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/prefix.d: Swap order of ADDR and REP prefixes.
	* gas/i386/rep.d: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.

opcodes/

2009-11-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (all_prefixes): New.
	(ckprefix): Set all_prefixes.
	(print_insn): Print all_prefixes instead of lock_prefix,
	repz_prefix, repnz_prefix, addr_prefix and data_prefix.
 2009-11-12 02:13:06 +00:00
Sebastian Pop
c48244a521 2009-11-06 Sebastian Pop <sebastian.pop@amd.com> 
* opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
	reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
	B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
	the xop_table.
	(get_valid_dis386): Removed unused condition (from cut/n/paste) for
	XOP instructions.

	* gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain
	patterns with r[8-15] registers.
	* gas/testsuite/gas/i386/x86-64-lwp.d: Same.
 2009-11-06 23:17:26 +00:00
Sebastian Pop
f88c9eb030 2009-11-05 Sebastian Pop <sebastian.pop@amd.com> 
Quentin Neill  <quentin.neill@amd.com>

	* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
	(build_vex_prefix): Handle xop09 and xop0a.
	(build_modrm_byte): Handle vexlwp.
	(md_show_usage): Add lwp.
	* gas/doc/c-i386.texi (i386-LWP): New section.

	* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
	run lwp in 32-bit mode.
	* gas/testsuite/gas/i386/x86-64-lwp.d: New.
	* gas/testsuite/gas/i386/x86-64-lwp.s: New.
	* gas/testsuite/gas/i386/lwp.d: New.
	* gas/testsuite/gas/i386/lwp.s: New.

	* opcodes/i386-dis.c (OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	(USE_XOP_8F_TABLE): New.
	(XOP_8F_TABLE): New.
	(REG_XOP_LWPCB): New.
	(REG_XOP_LWP): New.
	(XOP_09): New.
	(XOP_0A): New.
	(reg_table): Redirect REG_8F to XOP_8F_TABLE.
	Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
	(xop_table): New.
	(get_valid_dis386): Handle USE_XOP_8F_TABLE.
	Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
	to access to the vex_table.
	(OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
	(cpu_flags): Add CpuLWP.
	(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
	* opcodes/i386-opc.h (CpuLWP): New.
	(i386_cpu_flags): Add bit cpulwp.
	(VexLWP): New.
	(XOP09): New.
	(XOP0A): New.
	(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
	* opcodes/i386-opc.tbl (llwpcb): Added.
	(lwpval): Added.
	(lwpins): Added.
 2009-11-05 23:40:05 +00:00
Nick Clifton
cdcf946711 * gas/i386/i386.exp (space1): Move test inside check for x86 
target.
 2009-11-05 11:02:16 +00:00
H.J. Lu
6c78a1f83e 2009-11-04 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/876
	* gas/i386/i386.exp: Run space1.

	* gas/i386/space1.l: New.
	* gas/i386/space1.s: Likewise.
 2009-11-04 18:52:03 +00:00
Paul Brook
1ee6951580 2009-11-03 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_vfp_nsyn_mla_mls): Fix vmls excoding.

	gas/testsuite/
	* gas/arm/vfp-neon-syntax.d: Update expected results.
	* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
 2009-11-03 12:37:45 +00:00
Paul Brook
62f3b8c867 2009-11-02 Paul Brook <paul@codesourcery.com> 
ld/testsuite/
	* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
	* ld-arm/attr-merge-vfp-1.d: New test.
	* ld-arm/attr-merge-vfp-1r.d: New test.
	* ld-arm/attr-merge-vfp-2.d: New test.
	* ld-arm/attr-merge-vfp-2r.d: New test.
	* ld-arm/attr-merge-vfp-3.d: New test.
	* ld-arm/attr-merge-vfp-3r.d: New test.
	* ld-arm/attr-merge-vfp-4.d: New test.
	* ld-arm/attr-merge-vfp-4r.d: New test.
	* ld-arm/attr-merge-vfp-5.d: New test.
	* ld-arm/attr-merge-vfp-5r.d: New test.
	* ld-arm/attr-merge-vfp-2.s: New test.
	* ld-arm/attr-merge-vfp-3.s: New test.
	* ld-arm/attr-merge-vfp-3-d16.s: New test.
	* ld-arm/attr-merge-vfp-4.s: New test.
	* ld-arm/attr-merge-vfp-4-d16.s: New test.

	gas/
	* doc/c-arm.texi: Document new -mfpu options.
	* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
	fpu_vfp_ext_fma): New.
	(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
	(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
	(insns): Move double precision load/store.  Split out double
	precision VFPv3 instrucitons.  Add VFPv4 instructions.
	(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
	(aeabi_set_public_attributes): Set VFPv4 variants

	gas/testsuite/
	* gas/arm/attr-mfpu-vfpv4.d: New test.
	* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
	* gas/arm/neon-fma-cov.d: New test.
	* gas/arm/neon-fma-cov.s: New test.
	* gas/arm/vfp-fma-inc.s: New test.
	* gas/arm/vfp-fma-arm.d: New test.
	* gas/arm/vfp-fma-arm.s: New test.
	* gas/arm/vfp-fma-thumb.d: New test.
	* gas/arm/vfp-fma-thumb.s: New test.
	* gas/arm/vfma1.d: New test.
	* gas/arm/vfma1.s: New test.
	* gas/arm/vfpv3xd.d: New test.
	* gas/arm/vfpv3xd.s: New test.

	include/opcode/
	* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
	FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
	(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
	FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
	FPU_ARCH_NEON_VFP_V4): Define.

	binutils/
	* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.

	bfd/
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
	attributes.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
	Add VFPv4 instructions.
 2009-11-02 13:44:05 +00:00
H.J. Lu
206c2556c2 gas/ 
2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* config/tc-i386.c (build_modrm_byte): Do not swap REG and
	NDS operands for FMA4.

gas/testsuite/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* gas/i386/fma4.d: Updated patterns.
	* gas/i386/x86-64-fma4.d: Same.

opcodes/

2009-10-29  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_VEX_FMA): Removed.
	(VexFMA): Removed.
	(Vex128FMA): Removed.
	(prefix_table): First source operand of FMA4 insns is decoded
	with Vex not with VexFMA.
	(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
	when vex.w is set.  Third source operand is decoded with
	get_vex_imm8 when vex.w is cleared.
	(OP_VEX_FMA): Removed.
 2009-10-29 22:22:59 +00:00
Paul Brook
e6655fdab4 2009-10-29 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (neon_tab_entry): Fix VNMLA/VNMLS opcodes.

	gas/testsuite/
	* gas/arm/vfp-neon-syntax.d: Update expected results.
	* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
 2009-10-29 18:01:13 +00:00
Alan Modra
14610ad10e PR gas/10856 
* expr.c (resolve_expression): Only add "left" value to O_symbol
	expression when the symbol is undefined and different from the
	original symbol.  Simplify negative logic.

	* gas/i386/intelpic.d: Correct.
 2009-10-28 08:21:45 +00:00
Arnold Metselaar
a39571ad49 * gas/z80/equ.d, gas/z80/equ.s: Added test of parsing equ directives. 
* gas/z80/z80.exp: Run it.

* gas/z80/redef.d: Expect little endian output only.
 2009-10-25 16:18:04 +00:00
H.J. Lu
4b06377fcc gas/ 
2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10775
	* doc/c-i386.texi: Mention movabs.

gas/testsuite/

2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10775
	* gas/i386/immed64.d: Updated.
	* gas/i386/l1om.d: Likewise.
	* gas/i386/x86-64-disp-intel.d: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10775
	* i386-dis.c: Document LB, LS and LV macros.
	(dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
	with the 64-bit displacement or immediate operand.
	(putop): Handle LB, LS and LV macros.
 2009-10-20 22:18:19 +00:00
Doug Evans
23f5dfcb86 * config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set 
correctly for all 16 bit relocs.  Return BFD_RELOC_NONE if reloc
	isn't recognized, not BFD_RELOC_XC16X_SOF.

	testsuite:
	* gas/xc16x/shlrol.s: Specify constant shift amount.
	* gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
 2009-10-19 15:27:39 +00:00
Alan Modra
76748ada53 Exclude more aout targets. 2009-10-18 07:43:04 +00:00
Alan Modra
f19df8f73a PR gas/1491 
gas/
	* macro.c: Delete unnecessary function declarations.
	(buffer_and_nest): Support multiple labels per line for
	LABELS_WITHOUT_COLONS targets if the labels do have colons.
	(free_macro): Move so that we don't need forward declaration.
	* read.c (read_a_source_file): Take a copy of macro expansion line
	before we trim labels.
	* listing.c (listing_newline): Adjust stdin line save for
	input_line_pointer still at start of line.
gas/testsuite/
	* gas/macros/dot.s: Don't start macro invocations is first column.
	* gas/macros/dot.l: Update.
	* gas/macros/macros.exp: Run dot test on more targets.
 2009-10-15 10:58:34 +00:00
H.J. Lu
313c53d19e gas/ 
2009-10-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10740
	* config/tc-i386-intel.c (i386_intel_operand): Handle call
	and jump with 2 immediate operands.

	* config/tc-i386.c (i386_finalize_immediate): Don't generate
	error message if operand string is NULL.

gas/testsuite/

2009-10-13  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10740
	* gas/i386/jump.s: Add new tests.
	* gas/i386/jump16.s: Likewise.

	* gas/i386/jump.d: Updated.
	* gas/i386/jump16.d: Likewise.
 2009-10-13 16:23:25 +00:00
Nick Clifton
b2b7424819 gas: 
2009-10-07  Vincent Riviere  <vincent.riviere@freesbee.fr>

        PR gas/3041
        * config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
        located in data section an referencing a weak symbol.

gas/testsuite:

2009-10-07  Vincent Riviere  <vincent.riviere@freesbee.fr>

        PR gas/3041
        * gas/m68k/all.exp: Added "p3041data".
        * gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
        from text section to all possible sections.
        * gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
        references from data section.
 2009-10-13 08:55:31 +00:00
H.J. Lu
6f4c35a5fb 2009-10-08 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/10704
	* gas/i386/intelok.s: Move 2 PIC tests to ...
	* gas/i386/intelpic.s: Here.

	* gas/i386/intelok.d: Updated.
	* gas/i386/intelpic.d: Likewise.
 2009-10-08 12:44:57 +00:00
H.J. Lu
5ef5585686 2009-10-07 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/10704
	* gas/i386/intelok.s: Add 2 new tests.
	* gas/i386/intelok.d: Updated.
 2009-10-07 20:02:05 +00:00
Peter Bergner
9fe54b1ca1 gas/ 
* config/tc-ppc.c (md_show_usage): Document -m476.
	* doc/c-ppc.texi (PowerPC-Opts): Document -m476.

gas/testsuite/
	* gas/ppc/476.s: New test.
	* gas/ppc/476.d: Likewise.
	* gas/ppc/ppc.exp: Run the 476 test.

include/opcode/
	* ppc.h (PPC_OPCODE_476): Define.

opcodes/
	* ppc-dis.c (ppc_opts): Add "476" entry.
	* ppc-opc.c (PPC476): Define.
	(powerpc_opcodes): Update mnemonics where required for 476.
 2009-10-02 14:42:42 +00:00
Peter Bergner
634b50f2a6 gas/ 
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
	* doc/c-ppc.texi (PowerPC-Opts): Likewise.

gas/testsuite/
	* gas/ppc/a2.d: Rename "ppca2" to "a2".

include/opcode/
	* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.

opcodes/
	* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
	* ppc-dis.c (ppc_opts): Likewise.
	Rename "ppca2" to "a2".
 2009-10-01 19:24:48 +00:00
Nick Clifton
c7927a3c0e bfd 
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
        (ALL_MACHINES_CFILES): Add cpu-rx.c.
        (BFD32_BACKENDS): Add elf32-rx.lo.
        (BFD32_BACKENDS_CFILES): Add elf32-rx.c.
        * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
        Export bfd_rx_arch.
        (bfd_archures_list): Add bfd_rx_arch.
        * config.bfd: Add entry for rx-*-elf.
        * configure.in: Add entries for bfd_elf32_rx_le_vec and
        bfd_elf32_rx_be_vec.
        * reloc.c: Add RX relocations.
        * targets.c: Add RX target vectors.
        * Makefile.in: Regenerate.
        * bfd-in2.h: Regenerate.
        * configure: Regenerate.
        * libbfd.h: Regenerate.
        * cpu-rx.c: New file.
        * elf32-rx.c: New file.

binutils
        * readelf.c: Add support for RX target.
        * MAINTAINERS: Add DJ and NickC as maintainers for RX.

gas
        * Makefile.am: Add RX target.
        * configure.in: Likewise.
        * configure.tgt: Likewise.
        * read.c (do_repeat_with_expander): New function.
        * read.h: Provide a prototype for do_repeat_with_expander.
        * doc/Makefile.am: Add RX target documentation.
        * doc/all.texi: Likewise.
        * doc/as.texinfo: Likewise.
        * Makefile.in: Regenerate.
        * NEWS: Mention support for RX architecture.
        * configure: Regenerate.
        * doc/Makefile.in: Regenerate.
        * config/rx-defs.h: New file.
        * config/rx-parse.y: New file.
        * config/tc-rx.h: New file.
        * config/tc-rx.c: New file.
        * doc/c-rx.texi: New file.

gas/testsuite
        * gas/rx: New directory.
        * gas/rx/*: New set of test cases.
        * gas/elf/section2.e-rx: New expected output file.
        * gas/all/gas.exp: Add support for RX target.
        * gas/elf/elf.exp: Likewise.
        * gas/lns/lns.exp: Likewise.
        * gas/macros/macros.exp: Likewise.

include
        * dis-asm.h: Add prototype for print_insn_rx.

include/elf
        * rx.h: New file.

include/opcode
        * rx.h: New file.

ld
        * Makefile.am: Add rules to build RX emulation.
        * configure.tgt: Likewise.
        * NEWS: Mention support for RX architecture.
        * Makefile.in: Regenerate.
        * emulparams/elf32rx.sh: New file.
        * emultempl/rxelf.em: New file.

opcodes
        * Makefile.am: Add RX files.
        * configure.in: Add support for RX target.
        * disassemble.c: Likewise.
        * Makefile.in: Regenerate.
        * configure: Regenerate.
        * opc2c.c: New file.
        * rx-decode.c: New file.
        * rx-decode.opc: New file.
        * rx-dis.c: New file.
 2009-09-29 14:17:19 +00:00
Peter Bergner
8765b55692 opcodes/ 
* ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
	"lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.

gas/testsuite/
	* gas/ppc/vsx.s ("lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux",
	"stxvd2ux", "stxvw4ux"): Remove tests.
	* gas/ppc/vsx.d: Likewise.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/power7.d: Likewise.
 2009-09-29 13:19:10 +00:00
H.J. Lu
f5d9e8160d gas/ 
2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10677
	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Return true
	for BFD_RELOC_X86_64_GOTPCREL.

gas/testsuite/

2009-09-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10677
	* gas/i386/i386.exp: Run x86-64-localpic.

	* gas/i386/x86-64-localpic.d: New.
	* gas/i386/x86-64-localpic.s: Likewise.
 2009-09-24 14:36:48 +00:00
H.J. Lu
3bccaff786 2009-09-23 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/localpic.d: Updated.
 2009-09-24 05:08:24 +00:00
H.J. Lu
2a86604a47 gas/ 
2009-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Don't check
	BFD_RELOC_386_GOT32.

gas/testsuite/

2009-09-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run localpic.

	* gas/i386/localpic.d: New.
	* gas/i386/localpic.s: Likewise.
 2009-09-24 03:23:52 +00:00
Alan Modra
f9272224cd Tolerate some whitespace differences in readelf output. 2009-09-23 03:12:28 +00:00
Alan Modra
30c87b0590 * gas/ppc/a2.d: Match PPC64 relocs. 2009-09-22 03:10:25 +00:00
Maciej W. Rozycki
26abf39f0f * gas/mips/eret-1.d: Adjust regexps for robustness. 
* gas/mips/eret-2.d: Likewise.
	* gas/mips/eret-3.d: Likewise.
	* gas/mips/eret-1.s: Reformat for readability.  Add a label
	at the beginning.
	* gas/mips/eret-2.s: Add a label at the beginning.
 2009-09-21 13:13:04 +00:00
Maciej W. Rozycki
0bcd05a426 * gas/mips/eret-1.s: Add trailing padding. 
* gas/mips/eret-2.s: Likewise.
	* gas/mips/eret-3.s: Likewise.
	* gas/mips/eret-1.d: Adjust accordingly.  Force a 32-bit ABI.
	* gas/mips/eret-2.d: Likewise.
	* gas/mips/eret-3.d: Likewise.
 2009-09-21 13:10:07 +00:00
Maciej W. Rozycki
95d4c932e4 * gas/mips/mips.exp: Fix a typo. 2009-09-21 13:08:36 +00:00
Ben Elliston
e0d602ecff gas/ 
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.

gas/testsuite/
	* gas/ppc/a2.s: New.
	* gas/ppc/a2.d: Likewise.
	* gas/ppc/ppc.exp: Run the a2 dump test.

include/opcode/
	* ppc.h (PPC_OPCODE_PPCA2): New.

opcodes/
	* ppc-dis.c (ppc_opts): Add "ppca2" entry.
	* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
	eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
	icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
	ici mnemonics.
	(ERAT_T): New operand.
	(XWC_MASK): New mask.
	(XOPL2): New macro.
	(PPCA2): Define.
 2009-09-21 10:29:07 +00:00
Ben Elliston
ba0f96ec3d * gas/ppc/e500mc.d: Remove blank line at the end of file. 2009-09-21 01:58:01 +00:00
H.J. Lu
1acf546ea5 gas/ 
2009-09-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386-intel.c (i386_intel_operand): Initialize
	intel_state.has_offset to 0.

gas/testsuite/

2009-09-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/disp.s: Add an offset test.
	* gas/i386/x86-64-disp.s: Likewise.

	* gas/i386/intelbad.s: Comment out "byte ptr [1]" test.

	* gas/i386/disp.d: Updated.
	* gas/i386/disp-intel.d: Likewise.
	* gas/i386/intelbad.l: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.
	* gas/i386/x86-64-disp-intel.d: Likewise.
 2009-09-15 18:41:24 +00:00
H.J. Lu
6cee4cdae4 gas/ 
2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10637
	* config/tc-i386-intel.c (intel_state): Add has_offset.
	(i386_intel_simplify): Set intel_state.has_offset to 1 for
	O_offset.
	(i386_intel_operand): Turn on intel_state.is_mem if
	intel_state.has_offset is 0 and the last char is ']'.

gas/testsuite/

2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10637
	* gas/i386/disp.s: Add tests for Intel syntax.
	* gas/i386/x86-64-disp.s: Likewise.

	* gas/i386/disp.d: Updated.
	* gas/i386/intelok.d: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.

	* gas/i386/disp-intel.d: New.
	* gas/i386/x86-64-disp-intel.d: Likewise.

	* gas/i386/i386.exp: Run disp-intel and x86-64-disp-intel.
 2009-09-14 22:02:26 +00:00
H.J. Lu
bc2ae10b4d 2009-09-14 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/merom.[ds]: Renamed to ...
	* gas/i386/ssse3.[ds]: This.

	* gas/i386/nops-1-merom.d: Renamed to ...
	* gas/i386/nops-1-core2.d: This.

	* gas/i386/nops-2-merom.d: Renamed to ...
	* gas/i386/nops-2-core2.d: This.

	* gas/i386/prescott.[ds]: Renamed to ...
	* gas/i386/sse3.[ds]: This.

	* gas/i386/x86-64-merom.[ds]: Renamed to ...
	* gas/i386/x86-64-ssse3.[ds]: This.

	* gas/i386/x86-64-nops-1-merom.d: Renamed to ...
	* gas/i386/x86-64-nops-1-core2.d: This.

	* gas/i386/x86-64-prescott.[ds]: Renamed to ...
	* gas/i386/x86-64-sse3.[ds]: This.

	* gas/i386/i386.exp: Updated.
 2009-09-14 14:44:58 +00:00
H.J. Lu
0e1147d951 gas/ 
2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10636
	* config/tc-i386.c (optimize_disp): Set disp32 for 64bit only
	if there is an ADDR_PREFIX.
	(i386_finalize_displacement): Repor error if signed 32bit
	displacement is out of range.

gas/testsuite/

2009-09-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10636
	* gas/i386/disp.d: New.
	* gas/i386/disp.s: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.
	* gas/i386/x86-64-disp.s: Likewise.

	* gas/i386/i386.exp: Run disp and x86-64-disp.

	* gas/i386/x86-64-addr32.s: Add high 32bit displacement tests.

	* gas/i386/x86-64-addr32.d: Updated.
	* gas/i386/x86-64-addr32-intel.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/x86-64-prescott.d: Likewise.

	* gas/i386/x86-64-inval.s: Add invalid displacement tests.

	* gas/i386/x86-64-prescott.s: Replace 0x90909090 displacement
	with 0x909090.
 2009-09-14 13:57:45 +00:00
Richard Sandiford
1180b5a4de gas/ 
* config/tc-mips.c (MIPS_JALR_HINT_P): Take an expr argument.
	Require the target to be a bare symbol on targets with
	in-place addends.
	(macro_build_jalr): Update accordingly.
	(mips_fix_adjustable): Don't reduce R_MIPS_JALRs on targets
	with in-place addends.

gas/testsuite/
	* gas/mips/jalr2.s, gas/mips/jalr2.d: New test.
	* gas/mips/jal-svr4pic.d: Don't expect R_MIPS_JALRs to be reduced.
	* gas/mips/jal-xgot.d: Likewise.
	* gas/mips/mips-abi32-pic2.d: Likewise.
	* gas/mips/mips.exp: Run it.
 2009-09-13 19:18:11 +00:00
Richard Sandiford
3c0bfb2a23 gas/testsuite/ 
* gas/mips/mips16-dwarf2-n32.d: Expect odd addresses.

ld/testsuite/
	* ld-mips-elf/eh-frame1-n32.d: Change "the section \.eh_frame"
	to "the \.eh_frame section".
	* ld-mips-elf/eh-frame1-n64.d: Likewise.
	* ld-mips-elf/eh-frame2-n32.d: Likewise.
	* ld-mips-elf/eh-frame2-n64.d: Likewise.
	* ld-mips-elf/eh-frame3.d: Likewise.
	* ld-mips-elf/eh-frame4.d: Likewise.
	* ld-mips-elf/elf-rel-got-n32.d: Expect bals.
	* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
	* ld-mips-elf/mips-elf.exp: Force the MIPS16 PIC tests to use -mips1.
 2009-09-13 18:56:03 +00:00
Hans-Peter Nilsson
530288a6b6 PR gas/10623 
* gas/mmix/err-swym1.s, gas/mmix/swym-opreg1.d,
	gas/mmix/swym-opreg1.s, gas/mmix/swym-opreg2.d,
	gas/mmix/swym-opreg2.s: New tests.
	* gas/mmix/odd-1.d: Adjust for reloc change.
 2009-09-10 22:32:10 +00:00
Alan Modra
800f6ec8e2 gas/ 
* config/tc-d10v.c: Include dwarf2dbg.h.
	(write_long, write_1_short, write_2_short): Call dwarf2_emit_insn.
	(d10v_frob_label): New function.
	* config/tc-d10v.h (d10v_frob_label): Declare.
	(tc_frob_label): Define as d10v_frob_label.
gas/testsuite/
	* gas/lns/lns-common-1.s: Use two nops between each .loc.
	* gas/lns/lns.exp: Don't exclude d10v.
 2009-09-10 14:31:23 +00:00
Kaz Kojima
6af0f15200 * gas/sh/sh64/syntax-1.s: Regenerate. 2009-09-09 23:17:34 +00:00
Kaz Kojima
7e12722200 * configure.tgt (sh*-*-netbsdelf*): Set endian according to cpu. 
* gas/sh/basic.exp: Add -big to ASFLAGS for sh*l*-*-netbsdelf*.
 2009-09-08 12:31:32 +00:00
Alan Modra
6a200c2ed0 * gas/d30v/serial2.l: Adjust position of page break. 
* gas/lns/lns-common-1-alt.d: Match 2009-04-24 change.
	* gas/mt/ms1-16-003.d: Correct reloc name.
	* gas/mt/relocs.d: Elide incorrect file format strings.
 2009-09-08 10:37:59 +00:00
Alan Modra
bad6899a88 * gas/all/gas.exp (do_comment): Don't run on m32c. 
* gas/all/align.d: Likewise.
	* gas/all/incbin.d: Likewise.
	* gas/macros/semi.d: Likewise.
	* gas/elf/ifunc-1.d: Don't run on alpha.
 2009-09-08 02:54:56 +00:00
Jie Zhang
b43ab92ef1 * gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check 
for (IU) option for multiply and multiply-accumulate to
	data register instructon.
 2009-09-04 02:48:08 +00:00
Jie Zhang
118176876b * config/bfin-parse.y (gen_multi_instr_1): Check anomaly 
05000074 only when both slot1 and slot2 are filled.

	testsuite/
	* gas/bfin/parallel5.s: New test.
	* gas/bfin/error.exp: New test.
 2009-09-03 16:50:39 +00:00
Jie Zhang
bd03da3089 * config/tc-bfin.c (md_assemble): Bump line counters if there is 
EOL in the instruction.

	testsuite/
	* gas/bfin/line_number.l, gas/bfin/line_number.s: New test.
	* gas/bfin/bfin.exp: Add the new test.
 2009-09-03 16:32:42 +00:00
Jie Zhang
c958a8a8fb gas/ 
* config/bfin-defs.h (IS_GENREG): Define.
	(IS_DAGREG): Define.
	(IS_SYSREG): Define.
	* config/bfin-parse.y (asm_1): Check illegal register move
	instructions.

	gas/testsuite/
	* gas/bfin/expected_move_errors.s,
	gas/bfin/expected_move_errors.l: Add "LC1 = I0;".
	* gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W".

	opcodes/
	* bfin-dis.c (IS_DREG): Define.
	(IS_PREG): Define.
	(IS_AREG): Define.
	(IS_GENREG): Define.
	(IS_DAGREG): Define.
	(IS_SYSREG): Define.
	(decode_REGMV_0): Check illegal register move instructions.
 2009-09-03 16:17:36 +00:00
Jie Zhang
1d3ad4d0b0 * config/bfin-parse.y (asm_1): Fix a typo. 
testsuite/
	* gas/bfin/expected_comparison_errors.l: Expect error on Line 13.
 2009-09-03 15:48:16 +00:00
Jie Zhang
d3a50e1419 * config/bfin-parse.y (asm_1): Add LOOP_BEGIN and LOOP_END. 
* config/tc-bfin.c (bfin_start_line_hook): Remove.
	(bfin_loop_beginend): New.
	* config/tc-bfin.h (bfin_start_line_hook): Don't declare.
	(md_start_line_hook): Don't define.
	* config/bfin-aux.h (bfin_loop_beginend): Declare.

	testsuite/
	* gas/bfin/loop.s, gas/bfin/loop.d: New test.
	* gas/bfin/loop2.s, gas/bfin/loop2.d: New test.
	* gas/bfin/loop3.s, gas/bfin/loop3.d: New test.
	* gas/bfin/bfin.exp: Add the new tests.
 2009-09-03 15:36:02 +00:00
Jie Zhang
39b4412d0f From Bernd Schmidt <bernd.schmidt@analog.com> 
* config/gas/bfin-parse.y (asm_1): Clean up and unify error handling
	for load and store insns.
	(neg_value): Delete function.

	testsuite/
	From  Bernd Schmidt  <bernd.schmidt@analog.com>
	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
	Check error messages for invalid load/store insns.
 2009-09-02 07:30:34 +00:00
Alan Modra
aa820537ea update copyright dates 2009-09-02 07:25:43 +00:00
H.J. Lu
8114936d8e 2009-09-01 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/att-regs.s: Add ymm tests for 16bit and 64bit.
	* gas/i386/intel-regs.s: Likewise.

	* gas/i386/att-regs.d: Updated.
	* gas/i386/intel-regs.d: Likewise.
 2009-09-01 23:59:10 +00:00
H.J. Lu
fae96e0433 2009-09-01 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/att-regs.s: Remove a tab.
 2009-09-01 23:17:45 +00:00
Jie Zhang
83ee431c60 * config/bfin-parse.y (asm_1): Only PREG and DREG are allowed 
in comparison.

	testsuite/
	* gas/bfin/expected_comparison_errors.s: Add more cases.
	* gas/bfin/expected_comparison_errors.l: Update accordingly.
 2009-09-01 07:21:42 +00:00
Jie Zhang
5e8c8f8f89 * read.c (TC_START_LABEL): Add a new argument. 
(read_a_source_file): Pass the beginning of the symbol through
	the new argument of TC_START_LABEL.
	* config/tc-arm.h (TC_START_LABEL): Add a new argument.
	* config/tc-bfin.c (bfin_start_label): Only search '(' and '['
	from the beginning of the symbol.
	* config/tc-bfin.h (TC_START_LABEL): Add the new argument.
	* config/tc-d30v.h (TC_START_LABEL): Likewise.
	* config/tc-fr30.h (TC_START_LABEL): Likewise.
	* config/tc-m32c.h (TC_START_LABEL): Likewise.
	* config/tc-m32r.h (TC_START_LABEL): Likewise.
	* config/tc-mep.h (TC_START_LABEL): Likewise.

	testsuite/
	* gas/bfin/stack2.s: Add pop multiple instruction with a label
	on the same line.
	* gas/bfin/stack2.d: Adjust accordingly.
 2009-09-01 00:24:02 +00:00
Jan Beulich
94be91de01 bfd/ 
2009-08-31  Jan Beulich  <jbeulich@novell.com>

	* elf-bfd.h (bfd_elf_get_default_section_type): Declare.
	* elf.c (bfd_elf_get_default_section_type): New.
	(elf_fake_sections): Use bfd_elf_get_default_section_type.

gas/
2009-08-31  Jan Beulich  <jbeulich@novell.com>

	* config/obj-elf.c (obj_elf_change_section): Set default type
	by calling bfd_elf_get_default_section_type.

gas/testsuite/
2009-08-31  Jan Beulich  <jbeulich@novell.com>

	* gas/elf/section5.l: Remove no longer issued warning pattern.
 2009-08-31 12:02:36 +00:00
Kaz Kojima
0c9b4fd74a * config/tc-sh.c (md_apply_fix): Extend sign of the offset value 
for 64-bit host.
	* gas/sh/sign-extension.d: New file.
	* gas/sh/sign-extension.s: New file.
	* gas/sh/basic.exp: Run new test.
 2009-08-29 10:38:33 +00:00
H.J. Lu
3632d14b13 gas/ 
2009-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Use PROCESSOR_L1OM on "l1om".
	(i386_align_code): Handle PROCESSOR_L1OM.
	(check_cpu_arch_compatible): Fix a typo in comments.
	(set_cpu_arch): Check cpu_arch_isa instead of
	cpu_arch_isa_flags.bitfield.cpul1om.
	(i386_mach): Likewise.
	(i386_target_format): Likewise.

	* config/tc-i386.h (processor_type): Add PROCESSOR_L1OM.

gas/testsuite/

2009-08-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: Check elf64-l1om format.
 2009-08-28 21:42:16 +00:00
Bernd Schmidt
d55cb1c59e gas/ 
* config/bfin-parse.y (gen_multi_instr_1): New function.
	(asm): Use it instead of bfin_gen_multi_instr.
	(error): Add a format string when calling as_bad.
	* config/bfin-defs.h (insn_regmask): Declare.
	* config/tc-bfin.c (DREG_MASK, DREGH_MASK, DREGL_MASK, IREG_MASK): New
	macros.
	(decode_ProgCtrl_0, decode_LDSTpmod_0, decode_dagMODim_0,
	decode_dagMODik_0, decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0,
	decode_LDSTii_0, decode_dsp32mac_0, decode_dsp32mult_0,
	decode_dsp32alu_0, decode_dsp32shift_0, decode_dsp32shitimm_0,
	insn_regmask): New functions.
gas/testsuite/
	* gas/bfin/parallel.s: Add more test cases.
	* gas/bfin/parallel.d: Update accordingly.
	* gas/bfin/resource_conflict.l: New test.
	* gas/bfin/resource_conflict.s: New test.
	* gas/bfin/bfin.exp: Add resource_conflict.
 2009-08-11 18:29:41 +00:00
Nick Clifton
ba7e13e478 PR 10443 
* config/tc-arm.c (do_t_mov_cmp): Do not silently ignore shifted
        operands.
        * gas/arm/t16-bad.l: Update expected messages for moves with
        shifted operands.
 2009-08-11 09:53:40 +00:00
Nick Clifton
539d439185 * config/tc-arm.c (do_t_add_sub_w): Fixed constraints. 
gas/testsuite/
        * gas/arm/sp-pc-usage-t.d: New test case.
        * gas/arm/sp-pc-usage-t.s: New file.
 2009-08-10 14:42:39 +00:00
Bernd Schmidt
cb88ce9fd1 bfd/ 
From Mike Frysinger <michael.frysinger@analog.com>
	* elf32-bfin.c (bfin_howto_table, bfin_reloc_map, bfin_check_relocs,
	bfin_final_link_relocate, bfin_relocate_section, bfin_gc_sweep_hook,
	_bfinfdpic_emit_got_relocs_plt_entries, bfinfdpic_relocate_section,
	bfinfdpic_gc_sweep_hook, bfinfdpic_check_relocs,
	bfin_finish_dynamic_symbol, bfd_bfin_elf32_create_embedded_relocs):
	Adjust to match the renamed reloc definitions.

gas/testsuite/
	From Mike Frysinger <michael.frysinger@analog.com>
	* gas/bfin/reloc.d: Adjust for the renamed relocations.

include/elf/
	From Mike Frysinger <michael.frysinger@analog.com>
	* bfin.h (R_BFIN_UNUSED, R_BFIN_PCREL5M2, R_BFIN_UNUSED1,
	R_BFIN_PCREL10, R_BFIN_PCREL12_JUMP, R_BFIN_RIMM16,
	R_BFIN_LUIMM16, R_BFIN_HUIMM16, R_BFIN_PCREL12_JUMP_S,
	R_BFIN_PCREL24_JUMP_X, R_BFIN_PCREL24, R_BFIN_UNUSEDB,
	R_BFIN_UNUSEDC, R_BFIN_PCREL24_JUMP_L, R_BFIN_PCREL24_CALL_X,
	R_BFIN_VAR_EQ_SYMB, R_BFIN_BYTE_DATA, R_BFIN_BYTE2_DATA,
	R_BFIN_BYTE4_DATA, R_BFIN_PCREL11, R_BFIN_PUSH, R_BFIN_CONST,
	R_BFIN_ADD, R_BFIN_SUB, R_BFIN_MULT, R_BFIN_DIV, R_BFIN_MOD,
	R_BFIN_LSHIFT, R_BFIN_RSHIFT, R_BFIN_AND, R_BFIN_OR, R_BFIN_XOR,
	R_BFIN_LAND, R_BFIN_LOR, R_BFIN_LEN, R_BFIN_NEG, R_BFIN_COMP,
	R_BFIN_PAGE, R_BFIN_HWPAGE, R_BFIN_ADDR, R_BFIN_PLTPLC,
	R_BFIN_GOT, R_BFIN_MAX): Renamed from R_unused0, R_pcrel5ms,
	R_unused1, R_pcrel10, R_pcrel12_jump, R_rimm16, R_luimm16,
	R_huimm16, R_pcrel12_jump_s, R_pcrel24_jump_x, R_pcrel24,
	R_unusedb, R_unusedc, R_pcrel24_jump_l, R_pcrel24_call_x,
	R_var_eq_symb, R_byte_data, R_byte2_data, R_byte4_data, R_pcrel11,
	R_push, R_const, R_add, R_sub, R_mult, R_div, R_mod, R_lshift,
	R_rshift, R_and, R_or, R_xor, R_land, R_lor, R_len, R_neg, R_comp,
	R_page, R_hwpage, R_addr, R_pltpc, R_got.
 2009-08-09 16:45:05 +00:00
Daniel Jacobowitz
940b5ce099 gas/ 
* config/tc-arm.c (marked_pr_dependency, mapstate): Delete global
	variables.
	(mapping_state): Use the section's mapstate.
	(mapping_state_2): Likewise.  Skip special sections.
	(s_arm_unwind_fnend): Use the section's marked_pr_dependency.
	(arm_elf_change_section): Do not set deleted globals.
	* config/tc-arm.h (struct arm_segment_info_type): Document
	marked_pr_dependency.

	gas/testsuite/
	* gas/arm/mapping2.s: Test code after .ident.
 2009-08-07 19:30:31 +00:00
Nick Clifton
7ba29e2a41 Add support for Xilinx MicroBlaze processor. 
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
        * bfd/Makefile.in: Same.
        * bfd/archures.c: Add bfd_arch_microblaze.
        * bfd/bfd-in2.h: Regenerate.
        * bfd/config.bfd: Add microblaze target.
        * bfd/configure: Add bfd_elf32_microblaze_vec target.
        * bfd/configure.in: Same.
        * bfd/cpu-microblaze.c: New.
        * bfd/elf32-microblaze.c: New.
        * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
        * bfd/libbfd.h: Regenerate.
        * bfd/reloc.c: Add MICROBLAZE relocations.
        * bfd/section.c: Add struct relax_table and relax_count to section.
        * bfd/targets.c: Add bfd_elf32_microblaze_vec.
        * binutils/MAINTAINERS: Add self as maintainer.
        * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
        EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
        get_machine_name().
        * config.sub: Add microblaze target.
        * configure: Same.
        * configure.ac: Same.
        * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
        TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
        DEP_microblaze_elf target.
        * gas/Makefile.in: Same.
        * gas/config/tc-microblaze.c: Add MicroBlaze assembler.
        * gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
        * gas/configure: Add microblaze target.
        * gas/configure.in: Same.
        * gas/configure.tgt: Same.
        * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
        * gas/doc/Makefile.in: Same.
        * gas/doc/all.texi: Set MICROBLAZE.
        * gas/doc/as.texinfo: Add MicroBlaze doc links.
        * gas/doc/c-microblaze.texi: New MicroBlaze docs.
        * include/dis-asm.h: Decl print_insn_microblaze().
        * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
        * include/elf/microblaze.h: New reloc definitions.
        * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
        ALL_EMULATIONS, targets.
        * ld/Makefile.in: Same.
        * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
        * ld/emulparams/elf32mb_linux.sh: New.
        * ld/emulparams/elf32microblaze.sh. New.
        * ld/scripttempl/elfmicroblaze.sc: New.
        * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
        CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
        * opcodes/Makefile.in: Same.
        * opcodes/configure: Add bfd_microblaze_arch target.
        * opcodes/configure.in: Same.
        * opcodes/disassemble.c: Define ARCH_microblaze, return
        print_insn_microblaze().
        * opcodes/microblaze-dis.c: New MicroBlaze disassembler.
        * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
        * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
 2009-08-06 17:38:04 +00:00
Chao-ying Fu
da57d33ec2 2009-08-05 Chao-ying Fu <fu@mips.com> 
* gas/mips/jal-svr4pic.d, gas/mips/jal-xgot.d,
	gas/mips/mips-abi32-pic2.d: Add R_MIPS_JALR relocations after jalr.
 2009-08-05 21:24:21 +00:00
Nathan Sidwell
f86adc0752 * config/tc-arm.c (my_get_expression): Detect missing expressions. 
testsuite/
	* gas/arm/missing.s: New.
	* gas/arm/missing.d: New.
	* gas/arm/missing.l: New.
 2009-08-04 14:56:10 +00:00
Daniel Jacobowitz
cd000bffb2 binutils/testsuite/ 
* binutils-all/arm/thumb2-cond.s: Use instructions instead of
	.short.

	gas/
	* config/obj-elf.c (obj_elf_ident): Notify section change to the hook.
	* config/tc-arm.c (make_mapping_symbol): New function, from
	mapping_state.  Save mapping symbols in the frag.
	(insert_data_mapping_symbol): New.
	(mapping_state): Use make_mapping_symbol, improve state transitions.
	(mapping_state_2): New.  Provide dummy definition.
	(opcode_select): Do not call mapping_state.
	(s_bss): Call md_elf_section_change_hook instead of mapping_state.
	(output_inst): Update use of tc_frag_data.
	(new_automatic_it_block): Call mapping_state before emitting the
	IT instruction.
	(md_assemble): Move mapping_state to just before outputting the
	new instruction.
	(arm_handle_align): Update use of tc_frag_data.
	Call insert_data_mapping_symbol.
	(arm_init_frag): Update use of tc_frag_data.  Call
	mapping_state_2.
	(arm_elf_change_section): Always update the mapping symbol FSM state.
	(check_mapping_symbols): New function.
	(arm_adjust_symtab): Use check_mapping_symbols.
	* config/tc-arm.h (struct arm_frag_type): New.
	(TC_FRAG_TYPE): Change to struct arm_frag_type.
	(TC_FRAG_INIT): Pass max_chars.
	(arm_init_frag): Update prototype.

	gas/testsuite/
	* gas/arm/mapdir.d, gas/arm/mapdir.s: New files.
	* gas/arm/mapping.d: Adapted to new symbols generation.
	* gas/arm/mapping2.d: New test case.
	* gas/arm/mapping2.s: New file.
	* gas/arm/mapping3.d: New test case.
	* gas/arm/mapping3.s: New file.
	* gas/arm/mapping4.d: New test case.
	* gas/arm/mapping4.s: New file.
	* gas/arm/mapshort-eabi.d: Adapted to new symbols generation.
	* gas/elf/section2.e-armeabi: Adapted to new symbols generation.
 2009-07-31 18:14:07 +00:00
Jan Beulich
efa19bfde4 gas/ 
2009-07-27  Jan Beulich  <jbeulich@novell.com>

	* obj-elf.c (elf_file_symbol): Replace symbol name set up by
	symbol_new() with the passed in, unmodified one.

gas/testsuite/
2009-07-27  Jan Beulich  <jbeulich@novell.com>

	* gas/elf/file.[ds]: New.
	* gas/elf/elf.exp: Run new test.
 2009-07-27 10:04:25 +00:00
H.J. Lu
8a9036a406 bfd/ 
2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_architecture): Add bfd_arch_l1om.
	(bfd_l1om_arch): New.
	(bfd_archures_list): Add &bfd_l1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_l1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-l1om.c: New.

	* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
	(bfd_elf64_l1om_vec): Likewise.
	(bfd_elf64_l1om_freebsd_vec): Likewise.

	* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-l1om.c.
	* Makefile.in: Regenerated.

	* targets.c (bfd_elf64_l1om_vec): New.
	(bfd_elf64_l1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.

binutils/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c (guess_is_rela): Handle EM_L1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

gas/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add l1om.
	(check_cpu_arch_compatible): New.
	(set_cpu_arch): Use it.
	(i386_arch): New.
	(i386_mach): Return bfd_mach_l1om for Intel L1OM.
	(md_show_usage): Display l1om.
	(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
	cpu_arch_isa_flags.bitfield.cpul1om is set.

	* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
	(i386_arch): New.
	(ELF_TARGET_L1OM_FORMAT): Likewise.

	* doc/c-i386.texi: Document l1om.

gas/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: New.
	* gas/i386/l1om-inval.l: Likewise.
	* gas/i386/l1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run l1om-inval and l1om.

include/elf/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_L1OM): New.

ld/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
	is supported.  Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
	eelf_l1om_fbsd.o
	(eelf_l1om.c): New.
	(eelf_l1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* emulparams/elf_l1om.sh: New.
	* emulparams/elf_l1om_fbsd.sh: Likewise.

ld/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-l1om.d: New.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
	protected3-l1om.

opcodes/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_l1om_arch.
	* disassemble.c (disassembler): Likewise.

	* configure: Regenerated.

	* i386-dis.c (print_insn): Handle bfd_mach_l1om and
	bfd_mach_l1om_intel_syntax.  Use 8 bytes per line for Intel L1OM.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
	Add CPU_L1OM_FLAGS.
	(cpu_flags): Add CpuL1OM.
	(set_bitfield): Take an argument to set the value field.
	(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
	(process_i386_opcode_modifier): Updated.
	(process_i386_operand_type): Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuL1OM): New.
	(CpuXsave): Updated.
	(i386_cpu_flags): Add cpul1om.
 2009-07-25 14:58:58 +00:00
Jan Beulich
309d33736f gas/ 
2009-07-24  Jan Beulich  <jbeulich@novell.com>

	* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
	.nosse, and .noavx.
	(cpu_flags_and_not): New.
	(set_cpu_arch): Check whether sub-architecture specified is a
	feature disable.
	(md_parse_option): Likewise.
	(parse_real_register): Don't return floating point register
	when x87 functionality is disabled.
	(md_show_usage): Add new sub-options.
	* doc/c-i386.texi: Update with new command line sub-options.

gas/testsuite/
2009-07-24  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/8087.[ds]: New.
	* gas/i386/287.[ds]: New.
	* gas/i386/387.[ds]: New.
	* gas/i386/no87.[ls]: New.
	* gas/i386/no87-2.[ls]: New.
	* gas/i386/i386.exp: Run new tests.
	* gas/i386/att-regs.s: Also check FPU register access.
	* gas/i386/intel-regs.s: Likewise.
	* gas/i386/att-regs.d: Adjust expectations.
	* gas/i386/intel-regs.d: Likewise.

opcodes/
2009-07-24  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
	frstpm.
	* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
	(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
	(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
	* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
	Define.
	(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
	and cpufisttp.
	* i386-opc.tbl: Qualify floating point instructions by their
	respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
	and fsincos to be avilable only on 387. Fix fstsw ax to be
	available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
	and frstpm.
	* i386-init.h, i386-tbl.h: Regenerate.
 2009-07-24 15:41:20 +00:00
Nick Clifton
1174fea4a9 Commit missing part of previous delta to add GNU_UNIQUE_FUNCTION support. 2009-07-24 10:16:01 +00:00
Nick Clifton
f658ca2c9f Reorder variable declarations to avoid problems with MIPS targets. 2009-07-23 15:03:39 +00:00
Nick Clifton
3e7a7d11f1 * config/obj-elf.c (obj_elf_type): Add code to support a type of 
gnu_unique_object.
        * doc/as.texinfo: Document new feature of .type directive.
        * NEWS: Mention support for gnu_unique_object symbol type.

        * common.h (STB_GNU_UNIQUE): Define.

        * NEWS: Mention the linker's support for symbols with a binding of
        STB_GNU_UNIQUE.

        * gas/elf/type.s: Add unique global symbol definition.
        * gas/elf/type.e: Add expected readelf output for global unique
        symbol.

        * elfcpp.h (enum STB): Add STB_GNU_UNIQUE.

        * readelf.c (get_symbol_binding): For Linux targeted files return
        UNIQUE for symbols with the STB_GNU_UNIQUE binding.
        * doc/binutils.texi: Document the meaning of the 'u' symbol
        binding in the output of nm and objdump --syms.

        * elf-bfd.h (struct elf_link_hash_entry): Add unique_global field.
        * elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols
        with the BSF_GNU_UNIQUE flag bit set.
        * elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag
        for symbols with STB_GNU_UNIQUE binding.
        * elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols
        with the STB_GNU_UNIQUE binding.
        (elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for
        symbols with STB_GNU_UNIQUE binding.  Set STB_GNU_UNIQUE for
        symbols with the unique_global field set.
        (elf_link_output_extsym): Set unique_global field for symbols with
        the STB_GNU_UNIQUE binding.
        * syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit.
        (bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE
        symbols.
        (bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE
        symbols.
        * bfd-in2.h: Regenerate.
 2009-07-23 13:00:30 +00:00