Prior to version MicroBlaze v8.10.a,EDK 13.1, XMD's gdbserver stub returned 57
registers in response to GDB's G request. Starting with version MicroBlaze
v8.10.a, EDK 13.1, XMD added the slr and shr register, for a count of 59
registers. This patch adds these registers to the expected G response. This patch
fixes the above problem for baremetal and also supports the backward compatibility.
ChangeLog:
2014-07-02 Ajit Agarwal <ajitkum@xilinx.com>
* microblaze-tdep.c (microblaze_register_names): Add
the rshr and rslr register names.
(microblaze_gdbarch_init): Use of tdesc_has_registers.
Use of tdesc_find_feature. Use of tdesc_data_alloc.
Use of tdesc_numbered_register. Use of
microblaze_register_g_packet_guesses. Use of
tdesc_use_registers. Use of set_gdbarch_register_type.
(microblaze_register_g_packet_guesses): New.
* microblaze-tdep.h (microblaze_reg_num): Add
field MICROBLAZE_SLR_REGNUM MICROBLAZE_SHR_REGNUM
MICROBLAZE_NUM_REGS and MICROBLAZE_NUM_CORE_REGS.
(microblaze_frame_cache): Use of MICROBLAZE_NUM_REGS.
* features/microblaze-core.xml: New file.
* features/microblaze-stack-protect.xml: New file.
* features/microblaze-with-stack-protect.c: New file.
* features/microblaze-with-stack-protect.xml: New file.
* features/microblaze.xml: New file.
* features/microblaze.c: New file.
* features/Makefile (microblaze-with-stack-protect): Add
microblaze-with-stack-protect microblaze and
microblaze-expedite.
* regformats/microblaze-with-stack-protect.dat: New file.
* regformats/microblaze.dat: New file.
* doc/gdb.texinfo (MicroBlaze Features): New.
Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
This patch adds support for the Intel(R) Advanced Vector
Extensions 512 (Intel(R) AVX-512) registers. Native and remote
debugging are covered by this patch.
Intel(R) AVX-512 is an extension to AVX to support 512-bit wide
SIMD registers in 64-bit mode (XMM0-XMM31, YMM0-YMM31, ZMM0-ZMM31).
The number of available registers in 32-bit mode is still 8
(XMM0-7, YMM0-7, ZMM0-7). The lower 256-bits of the ZMM registers
are aliased to the respective 256-bit YMM registers. The lower
128-bits are aliased to the respective 128-bit XMM registers.
There are also 8 new, dedicated mask registers (K0-K7) in both 32-bit
mode and 64-bit mode.
For more information please see
Intel(R) Developer Zone: Intel(R) AVX
http://software.intel.com/en-us/intel-isa-extensions#pid-16007-1495
Intel(R) Architecture Instruction Set Extensions Programming Reference:
http://software.intel.com/en-us/file/319433-017pdf
2014-04-24 Michael Sturm <michael.sturm@mintel.com>
Walfred Tedeschi <walfred.tedeschi@intel.com>
* amd64-linux-nat.c (amd64_linux_gregset32_reg_offset): Add
AVX512 registers.
(amd64_linux_read_description): Add code to handle AVX512 xstate
mask and return respective tdesc.
* amd64-linux-tdep.c: Include features/i386/amd64-avx512-linux.c
and features/i386/x32-avx512-linux.c.
(amd64_linux_gregset_reg_offset): Add AVX512 registers.
(amd64_linux_core_read_description): Add code to handle AVX512
xstate mask and return respective tdesc.
(_initialize_amd64_linux_tdep): Initialize AVX512 tdesc.
* amd64-linux-tdep.h (AMD64_LINUX_ORIG_RAX_REGNUM): Adjust regnum
calculation.
(AMD64_LINUX_NUM_REGS): Adjust to new number of registers.
(tdesc_amd64_avx512_linux): New prototype.
(tdesc_x32_avx512_linux): Likewise.
* amd64-tdep.c: Include features/i386/amd64-avx512.c and
features/i386/x32-avx512.c.
(amd64_ymm_avx512_names): New register names for pseudo
registers YMM16-31.
(amd64_ymmh_avx512_names): New register names for raw registers
YMMH16-31.
(amd64_k_names): New register names for K registers.
(amd64_zmmh_names): New register names for ZMM raw registers.
(amd64_zmm_names): New registers names for ZMM pseudo registers.
(amd64_xmm_avx512_names): New register names for XMM16-31
registers.
(amd64_pseudo_register_name): Add code to return AVX512 pseudo
registers.
(amd64_init_abi): Add code to intitialize AVX512 tdep variables
if feature is present.
(_initialize_amd64_tdep): Call AVX512 tdesc initializers.
* amd64-tdep.h (enum amd64_regnum): Add AVX512 registers.
(AMD64_NUM_REGS): Adjust to new number of registers.
* i386-linux-nat.c (GETXSTATEREGS_SUPPLIES): Extend range of
registers supplied via XSTATE by AVX512 registers.
(i386_linux_read_description): Add case for AVX512.
* i386-linux-tdep.c: Include i386-avx512-linux.c.
(i386_linux_gregset_reg_offset): Add AVX512 registers.
(i386_linux_core_read_description): Add case for AVX512.
(i386_linux_init_abi): Install supported register note section
for AVX512.
(_initialize_i386_linux_tdep): Add call to tdesc init function for
AVX512.
* i386-linux-tdep.h (I386_LINUX_NUM_REGS): Set number of
registers to be number of zmm7h + 1.
(tdesc_i386_avx512_linux): Add tdesc for AVX512 registers.
* i386-tdep.c: Include features/i386/i386-avx512.c.
(i386_zmm_names): Add ZMM pseudo register names array.
(i386_zmmh_names): Add ZMM raw register names array.
(i386_k_names): Add K raw register names array.
(num_lower_zmm_regs): Add constant for the number of lower ZMM
registers. AVX512 has 16 more ZMM registers than there are YMM
registers.
(i386_zmmh_regnum_p): Add function to look up register number of
ZMM raw registers.
(i386_zmm_regnum_p): Likewise for ZMM pseudo registers.
(i386_k_regnum_p): Likewise for K raw registers.
(i386_ymmh_avx512_regnum_p): Likewise for additional YMM raw
registers added by AVX512.
(i386_ymm_avx512_regnum_p): Likewise for additional YMM pseudo
registers added by AVX512.
(i386_xmm_avx512_regnum_p): Likewise for additional XMM registers
added by AVX512.
(i386_register_name): Add code to hide YMMH16-31 and ZMMH0-31.
(i386_pseudo_register_name): Add ZMM pseudo registers.
(i386_zmm_type): Construct and return vector registers type for ZMM
registers.
(i386_pseudo_register_type): Return appropriate type for YMM16-31,
ZMM0-31 pseudo registers and K registers.
(i386_pseudo_register_read_into_value): Add code to read K, ZMM
and YMM16-31 registers from register cache.
(i386_pseudo_register_write): Add code to write K, ZMM and
YMM16-31 registers.
(i386_register_reggroup_p): Add code to include/exclude AVX512
registers in/from respective register groups.
(i386_validate_tdesc_p): Handle AVX512 feature, add AVX512
registers if feature is present in xcr0.
(i386_gdbarch_init): Add code to initialize AVX512 feature
variables in tdep structure, wire in pseudo registers and call
initialize_tdesc_i386_avx512.
* i386-tdep.h (struct gdbarch_tdep): Add AVX512 related
variables.
(i386_regnum): Add AVX512 registers.
(I386_SSE_NUM_REGS): New define for number of SSE registers.
(I386_AVX_NUM_REGS): Likewise for AVX registers.
(I386_AVX512_NUM_REGS): Likewise for AVX512 registers.
(I386_MAX_REGISTER_SIZE): Change to 64 bytes, ZMM registers are
512 bits wide.
(i386_xmm_avx512_regnum_p): New prototype for register look up.
(i386_ymm_avx512_regnum_p): Likewise.
(i386_k_regnum_p): Likewise.
(i386_zmm_regnum_p): Likewise.
(i386_zmmh_regnum_p): Likewise.
* i387-tdep.c : Update year in copyright notice.
(xsave_ymm_avx512_offset): New table for YMM16-31 offsets in
XSAVE buffer.
(XSAVE_YMM_AVX512_ADDR): New macro.
(xsave_xmm_avx512_offset): New table for XMM16-31 offsets in
XSAVE buffer.
(XSAVE_XMM_AVX512_ADDR): New macro.
(xsave_avx512_k_offset): New table for K register offsets in
XSAVE buffer.
(XSAVE_AVX512_K_ADDR): New macro.
(xsave_avx512_zmm_h_offset): New table for ZMM register offsets
in XSAVE buffer.
(XSAVE_AVX512_ZMM_H_ADDR): New macro.
(i387_supply_xsave): Add code to supply AVX512 registers to XSAVE
buffer.
(i387_collect_xsave): Add code to collect AVX512 registers from
XSAVE buffer.
* i387-tdep.h (I387_NUM_XMM_AVX512_REGS): New define for number
of XMM16-31 registers.
(I387_NUM_K_REGS): New define for number of K registers.
(I387_K0_REGNUM): New define for K0 register number.
(I387_NUM_ZMMH_REGS): New define for number of ZMMH registers.
(I387_ZMM0H_REGNUM): New define for ZMM0H register number.
(I387_NUM_YMM_AVX512_REGS): New define for number of YMM16-31
registers.
(I387_YMM16H_REGNUM): New define for YMM16H register number.
(I387_XMM16_REGNUM): New define for XMM16 register number.
(I387_YMM0_REGNUM): New define for YMM0 register number.
(I387_KEND_REGNUM): New define for last K register number.
(I387_ZMMENDH_REGNUM): New define for last ZMMH register number.
(I387_YMMH_AVX512_END_REGNUM): New define for YMM31 register
number.
(I387_XMM_AVX512_END_REGNUM): New define for XMM31 register
number.
* common/i386-xstate.h: Add AVX 3.1 feature bits, mask and XSTATE
size.
* features/Makefile: Add AVX512 related files.
* features/i386/32bit-avx512.xml: New file.
* features/i386/64bit-avx512.xml: Likewise.
* features/i386/amd64-avx512-linux.c: Likewise.
* features/i386/amd64-avx512-linux.xml: Likewise.
* features/i386/amd64-avx512.c: Likewise.
* features/i386/amd64-avx512.xml: Likewise.
* features/i386/i386-avx512-linux.c: Likewise.
* features/i386/i386-avx512-linux.xml: Likewise.
* features/i386/i386-avx512.c: Likewise.
* features/i386/i386-avx512.xml: Likewise.
* features/i386/x32-avx512-linux.c: Likewise.
* features/i386/x32-avx512-linux.xml: Likewise.
* features/i386/x32-avx512.c: Likewise.
* features/i386/x32-avx512.xml: Likewise.
* regformats/i386/amd64-avx512-linux.dat: New file.
* regformats/i386/amd64-avx512.dat: Likewise.
* regformats/i386/i386-avx512-linux.dat: Likewise.
* regformats/i386/i386-avx512.dat: Likewise.
* regformats/i386/x32-avx512-linux.dat: Likewise.
* regformats/i386/x32-avx512.dat: Likewise.
* NEWS: Add note about new support for AVX512.
testsuite/
* Makefile.in (EXECUTABLES): Added i386-avx512.
* gdb.arch/i386-avx512.c: New file.
* gdb.arch/i386-avx512.exp: Likewise.
gdbserver/
* Makefile.in: Added rules to handle new files
i386-avx512.c i386-avx512-linux.c amd64-avx512.c
amd64-avx512-linux.c x32-avx512.c x32-avx512-linux.c.
* configure.srv (srv_i386_regobj): Add i386-avx512.o.
(srv_i386_linux_regobj): Add i386-avx512-linux.o.
(srv_amd64_regobj): Add amd64-avx512.o and x32-avx512.o.
(srv_amd64_linux_regobj): Add amd64-avx512-linux.o and
x32-avx512-linux.o.
(srv_i386_32bit_xmlfiles): Add i386/32bit-avx512.xml.
(srv_i386_64bit_xmlfiles): Add i386/64bit-avx512.xml.
(srv_amd64_xmlfiles): Add i386/amd64-avx512.xml and
i386/x32-avx512.xml.
(srv_i386_linux_xmlfiles): Add i386/i386-avx512-linux.xml.
(srv_amd64_linux_xmlfiles): Add i386/amd64-avx512-linux.xml and
i386/x32-avx512-linux.xml.
* i387-fp.c (num_avx512_k_registers): New constant for number
of K registers.
(num_avx512_zmmh_low_registers): New constant for number of
lower ZMM registers (0-15).
(num_avx512_zmmh_high_registers): New constant for number of
higher ZMM registers (16-31).
(num_avx512_ymmh_registers): New contant for number of higher
YMM registers (ymm16-31 added by avx521 on x86_64).
(num_avx512_xmm_registers): New constant for number of higher
XMM registers (xmm16-31 added by AVX512 on x86_64).
(struct i387_xsave): Add space for AVX512 registers.
(i387_cache_to_xsave): Change raw buffer size to 64 characters.
Add code to handle AVX512 registers.
(i387_xsave_to_cache): Add code to handle AVX512 registers.
* linux-x86-low.c (init_registers_amd64_avx512_linux): New
prototypei from generated file.
(tdesc_amd64_avx512_linux): Likewise.
(init_registers_x32_avx512_linux): Likewise.
(tdesc_x32_avx512_linux): Likewise.
(init_registers_i386_avx512_linux): Likewise.
(tdesc_i386_avx512_linux): Likewise.
(x86_64_regmap): Add AVX512 registers.
(x86_linux_read_description): Add code to handle AVX512 XSTATE
mask.
(initialize_low_arch): Add code to initialize AVX512 registers.
doc/
* gdb.texinfo (i386 Features): Add description of AVX512
registers.
Change-Id: Ifc4c08c76b85dbec18d02efdbe6182e851584438
Signed-off-by: Michael Sturm <michael.sturm@intel.com>
gdb/
* nios2-tdep.c (nios2_reg_names): Use "sstatus" rather than "ba"
as the preferred name of r30.
* nios2-linux-tdep.c (reg_offsets): Likewise.
* features/nios2-cpu.xml: Likewise.
* features/nios2-linux.c: Regenerated.
* features/nios2.c: Regenerated.
* regformats/nios2-linux.dat: Regenerated.
2013-06-26 Pedro Alves <pedro@codesourcery.com>
Yao Qi <yao@codesourcery.com>
* ctf.c (ctf_traceframe_info): Push trace state variables
present in the trace data into the traceframe info object.
* breakpoint.c (DEF_VEC_I): Remove.
* common/filestuff.c (DEF_VEC_I): Likewise.
* dwarf2loc.c (DEF_VEC_I): Likewise.
* mi/mi-main.c (DEF_VEC_I): Likewise.
* common/gdb_vecs.h (DEF_VEC_I): Define vector for int.
* features/traceframe-info.dtd: Add tvar element and its
attributes.
* tracepoint.c (free_traceframe_info): Free vector 'tvars'.
(build_traceframe_info): Push trace state variables present in the
trace data into the traceframe info object.
(traceframe_info_start_tvar): New function.
(tvar_attributes): New.
(traceframe_info_children): Add "tvar" element.
* tracepoint.h (struct traceframe_info) <tvars>: New field.
* NEWS: Mention the change in GDB and GDBserver.
gdb/doc:
2013-06-26 Pedro Alves <pedro@codesourcery.com>
* gdb.texinfo (Traceframe Info Format): Document tvar element and
its attributes.
gdb/gdbserver:
2013-06-26 Pedro Alves <pedro@codesourcery.com>
* tracepoint.c (build_traceframe_info_xml): Output trace state
variables present in the trace buffer.
The aarch64-without-fpu description is unused.
Linux requires an FPU, so the AArch64 native port always returns the
with-fpu variant:
static const struct target_desc *
aarch64_linux_read_description (struct target_ops *ops)
{
initialize_tdesc_aarch64 ();
return tdesc_aarch64;
}
When the target doesn't report a target description at all, we
fallback to a register set with an FPU:
aarch64_gdbarch_init ()
...
if (!tdesc_has_registers (tdesc))
tdesc = tdesc_aarch64;
This just removes the dead description.
Tested by building on x86_64 Fedora 17 with --enable=targets=all.
gdb/
2013-05-29 Pedro Alves <palves@redhat.com>
* aarch64-tdep.c: Don't include "features/aarch64-without-fpu.c".
(_initialize_aarch64_tdep): Don't call
initialize_tdesc_aarch64_without_fpu.
* features/Makefile (WHICH): Remove reference to
aarch64-without-fpu.
* features/aarch64-without-fpu.c: Delete file.
* regformats/aarch64-without-fpu.dat: Delete file.
This is more consistent with what we do with other similar XML lists,
and avoids a potential confusion with the library-list XML list.
gdb/ChangeLog:
* features/library-list-aix.dtd: Replace library-list by
library-list-aix.
* rs6000-nat.c: Replace library-list by library-list-aix
throughout.
* solib-aix.c: Likewise.
Andrew Jenner <andrew@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
Julian Brown <julian@codesourcery.com>
Based on the nios2-elf port from Altera Corporation.
gdb/
* Makefile.in (ALL_TARGET_OBS): Add nios2-tdep.o and
nios2-linux-tdep.o.
(HFILES_NO_SRCDIR): Add nios2-tdep.h.
(ALLDEPFILES): Add nios2-tdep.c and nios2-linux-tdep.c.
* configure.tgt: Add nios2*-*-linux* and nios2*-*-* targets.
* nios2-tdep.h: New.
* nios2-tdep.c: New.
* nios2-linux-tdep.c: New.
* features/Makefile (WHICH): Add nios2-linux.
(nios2-linux-expedite): Set.
* features/nios2-cpu.xml: New.
* features/nios2.xml: New.
* features/nios2-linux.xml: New.
* features/nios2.c: New (autogenerated).
* features/nios2-linux.c: New (autogenerated).
* regformats/nios2-linux.dat: New (autogenerated).
* NEWS (Changes since GDB 7.6): Add new Nios II targets
and commands.
gdb/doc/
* gdb.texinfo (Nios II): New section.
(Nios II Features): New section.
Add a function to parse a btrace xml document into a vector of branch trace
blocks.
gdb/
* features/btrace.dtd: New file.
* Makefile.in (XMLFILES): Add btrace.dtd.
* btrace.h (parse_xml_btrace): New declaration.
* btrace.c: Include xml-support.h.
(parse_xml_btrace): New function.
(parse_xml_btrace_block): New function.
(block_attributes): New struct.
(btrace_attributes): New struct.
(btrace_children): New struct.
(btrace_elements): New struct.
Two modifications:
1. The addition of 2013 to the copyright year range for every file;
2. The use of a single year range, instead of potentially multiple
year ranges, as approved by the FSF.
(arm_register_g_packet_guesses): New function.
(arm_gdbarch_init): Don't force a target description with
registers when the executable is detected as M-profile. Instead
set gdbarch->tdep->is_m. Register `g' packet guesses.
(_initialize_arm_tdep): Initialize the new target description.
* features/arm-with-m-fpa-layout.xml: New description.
* features/arm-with-m-fpa-layout.c: New, generated.
* s390-nat.c (SUBOFF): Remove.
(s390_native_supply, s390_native_collect): New functions.
(supply_gregset, supply_fpregset): Use s390_native_supply.
(fill_gregset, fill_fpregset): Use s390_native_collect.
* s390-tdep.c (s390_pseudo_register_reggroup_p): Update comment.
(s390_unwind_pseudo_register): New function.
(s390_prologue_frame_unwind_cache): Unwind PSW address and mask
registers instead of PC and CC.
(s390_backchain_frame_unwind_cache): Likewise.
(s390_sigtramp_frame_unwind_cache): Do not unwind PC, CC, or
full GPR pseudos.
(s390_trad_frame_prev_register): New function.
(s390_frame_prev_register): Use it.
(s390_sigtramp_frame_prev_register): Likewise.
(s390_dwarf2_prev_register): Use s390_unwind_pseudo_register.
(s390_dwarf2_frame_init_reg): Unwind PSW address and mask. Use
special callback to unwind any pseudo.
* features/s390-core32.xml: Add pswm/pswa to save/restore group.
* features/s390-core64.xml: Likewise.
* features/s390x-core64.xml: Likewise.
* features/s390-linux32.c: Regenerate.
* features/s390-linux64.c: Likewise.
* features/s390x-linux64.c: Likewise.
gdbserver/ChangeLog:
* linux-s390-low.c (s390_collect_ptrace_register): Fully convert
PSW address/mask between 8-byte and 16-byte formats.
(s390_supply_ptrace_register): Likewise.
(s390_get_pc, s390_set_pc): 4-byte PSW address always includes
basic addressing mode bit.
I will need this description for the ppc-lynxos debugger where, AFAICT,
we only have access to the core GP and FP registers. So this adds
powerpc-32 to the list of targets for which a .dat file needs to be
generated.
2010-04-30 Joel Brobecker <brobecker@adacore.com>
* features/Makefile (WHICH): Add rs6000/powerpc-32.
(powerpc-32.o, powerpc-32.c): New rules.
(clean): Also remove powerpc-32.c.
* regformats/rs6000/powerpc-32.dat: Generate.
(arm_psr_thumb_bit): New. Update all uses of CPSR_T to
call this function.
(arm_pc_is_thumb): Add a gdbarch argument. Update all callers.
Check is_m after force-mode.
(arm_gdbarch_init): Check the binary before the target description.
Add check for M profile attribute. If we have an M-profile device,
but no target register description, use arm-with-m. Recognize the
new org.gnu.gdb.arm.m-profile feature and its xpsr register.
(_initialize_arm_tdep): Call initialize_tdesc_arm_with_m.
* arm-tdep.h (XPSR_T): Define.
(struct gdbarch_tdep): Add is_m member.
* features/arm-m-profile.xml, features/arm-with-m.c,
features/arm-with-m.xml: New files.
doc/
* gdb.texinfo (ARM Features): Document
org.gnu.gdb.arm.m-profile.
(append_composite_type_field_aligned): Use the new function.
* gdbtypes.h (append_composite_type_field_raw): Declare.
* target-descriptions.c (struct tdesc_type_field): Add start and end.
(struct tdesc_type_flag): New type.
(struct tdesc_type): Add TDESC_TYPE_STRUCT and TDESC_TYPE_FLAGS to
kind. Add size to u.u. Add u.f for flags.
(tdesc_gdb_type): Handle TDESC_TYPE_STRUCT and TDESC_TYPE_FLAGS.
(tdesc_free_type): Likewise.
(tdesc_create_struct, tdesc_set_struct_size, tdesc_create_flags): New.
(tdesc_add_field): Handle TDESC_TYPE_STRUCT.
(tdesc_add_bitfield, tdesc_add_flag): New.
* target-descriptions.h (tdesc_create_struct, tdesc_set_struct_size)
(tdesc_create_flags, tdesc_add_bitfield, tdesc_add_flag): Declare.
* xml-tdesc.c (struct tdesc_parsing_data): Rename current_union to
current_type. Add current_type_size and current_type_is_flags.
(tdesc_start_union): Clear the new fields.
(tdesc_start_struct, tdesc_start_flags): New.
(tdesc_start_field): Handle struct fields, including bitfields.
(field_attributes): Make type optional. Add start and end.
(union_children): Rename to struct_union_children.
(union_attributes): Rename to struct_union_attributes. Add optional
size.
(flags_attributes): New.
(feature_children): Add struct and flags.
* features/gdb-target.dtd: Add flags and struct to features.
Make field type optional. Add field start and end.
doc/
* gdb.texinfo (Types): Describe <struct> and <flags>.
testsuite/
* gdb.xml/extra-regs.xml: Add struct1, struct2, and flags
types. Add structreg, bitfields, and flags registers.
* gdb.xml/tdesc-regs.exp: Test structreg and bitfields
registers.
