Commit graph

121 commits

Author SHA1 Message Date
Nick Clifton
e3e535bc58 * arm-dis.c (print_insn): Fixed search for next
symbol and data dumping condition, and the
    initial mapping symbol state.

    * gas/arm/dis-data.d: New test case.
    * gas/arm/dis-data.s: New file.
2010-01-06 15:02:45 +00:00
Nick Clifton
2edcd24424 PR 11123
* arm-dis.c (print_insn_coprocessor): Initialise value.
2010-01-04 10:18:32 +00:00
Nick Clifton
ff4a8d2b93 PR binutils/10924
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
        register.
        (do_mrs): Likewise.
        (do_mul): Likewise.

        * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
        unique register numbers.  Extend support for %<>R format to
        thumb32 and coprocessor instructions.

        * gas/arm/unpredictable.s: Add more unpredictable instructions.
        * gas/arm/unpredictable.d: Add expected disassemblies.
2009-12-17 09:52:18 +00:00
Nick Clifton
ab8e2090b6 PR binutils/10924
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
        results in unpredictable behaviour.
        (print_insn_arm): Handle %R.

        * gas/arm/unpredictable.s: New test case - checks the disassembly
        of instructions with unpredictable behaviour.
        * gas/arm/unpredictable.d: New file - expected disassembly.
2009-12-14 16:38:23 +00:00
Nick Clifton
91d6fa6a03 Add -Wshadow to the gcc command line options used when compiling the binutils.
Fix up all warnings generated by the addition of this switch.
2009-12-11 13:42:17 +00:00
Nick Clifton
07a28fab11 PR 10924
* arm-dis.c (print_insn_arm): Mark insns that use the PC in
        post-indexed addressing as unpredictable.
2009-12-09 08:38:04 +00:00
Nick Clifton
03ee1b7f8e PR gas/11013
* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
        and QDSUB.

        * gas/arm/arch7em.d: Update expected disassembly.
        * gas/arm/thumb32.d: Likewise.

        * config/tc-arm.c (do_t_simd2): New function.
        (insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
2009-12-02 20:26:30 +00:00
Nick Clifton
945ee43039 PR binutils/10924
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
        instructions using Immediate Offset addressing with an offset of
        zero.
        * gas/arm/arch4t.d: Likewise.
        * gas/arm/arm7t.d: Likewise.
        * gas/arm/xscale.d: Likewise.
        * gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
        tst instructions.

        PR binutils/10924
        * arm-dis.c (print_insn_arm): Do not print an offset of zero when
        decoding Immediaate Offset addressing.
2009-11-19 14:07:11 +00:00
Nick Clifton
aefd8a406c * gas/arm/vfma1.d: Only run on ELF based targets.
PR binutils/10924
        * gas/arm/arch4t-eabi.d: Update expected disassembly.
        * gas/arm/arch4t.d: Likewise.
        * gas/arm/archv6t2.d: Likewise.
        * gas/arm/arm7t.d: Likewise.
        * gas/arm/inst.d: Likewise.
        * gas/arm/xscale.d: Likewise.

        PR binutils/10924
        * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
        instruction variants.  Add pattern for MRS variant that was being
        confused with CMP.
        (arm_decode_shift): Place error message in a comment.
        (print_insn_arm): Note that writing back to the PC is
        unpredictable.
        Only print 'p' variants of cmp/cmn/teq/tst instructions if
        decoding for pre-V6 architectures.
2009-11-17 17:20:26 +00:00
Ramana Radhakrishnan
0bb027fd62 2009-11-17 Edward Nevill <edward.nevill@arm.com>
* arm-dis.c (print_insn_thumb32): Handle undefined instruction.
2009-11-17 10:43:09 +00:00
Daniel Jacobowitz
79862e4574 gas/testsuite/
* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d,
	gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions
	and expanded PC-relative offsets.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Use %A instead of %C.  Remove
	generic coprocessor instructions for FPA loads and stores.
	(print_insn_coprocessor): Remove %C support.  Display address for
	PC-relative offsets in %A.
2009-11-12 14:49:45 +00:00
Nick Clifton
c1e2689731 PR binutils/10924
* arm-dis.c (UNPREDICTABLE_INSTRUCTION): New macro.
        (print_insn_arm): Extend %s format control code to check for
        unpredictable addressing modes.  Add support for %S format control
        code which suppresses this check.
        (W_BIT, I_BIT, U_BIT, P_BIT): New macros.
        (WRITEBACK_BIT_SET, IMMEDIATE_BIT_SET, NEGATIVE_BIT_SET,
        PRE_BIT_SET): New macros.
        (print_insn_coprocessor): Use the new macros instead of magic
        constants.
        (print_arm_address): Likewise.
        (pirnt_insn_arm): Likewise.
        (print_insn_thumb32): Likewise.
2009-11-11 09:44:45 +00:00
Paul Brook
62f3b8c867 2009-11-02 Paul Brook <paul@codesourcery.com>
ld/testsuite/
	* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
	* ld-arm/attr-merge-vfp-1.d: New test.
	* ld-arm/attr-merge-vfp-1r.d: New test.
	* ld-arm/attr-merge-vfp-2.d: New test.
	* ld-arm/attr-merge-vfp-2r.d: New test.
	* ld-arm/attr-merge-vfp-3.d: New test.
	* ld-arm/attr-merge-vfp-3r.d: New test.
	* ld-arm/attr-merge-vfp-4.d: New test.
	* ld-arm/attr-merge-vfp-4r.d: New test.
	* ld-arm/attr-merge-vfp-5.d: New test.
	* ld-arm/attr-merge-vfp-5r.d: New test.
	* ld-arm/attr-merge-vfp-2.s: New test.
	* ld-arm/attr-merge-vfp-3.s: New test.
	* ld-arm/attr-merge-vfp-3-d16.s: New test.
	* ld-arm/attr-merge-vfp-4.s: New test.
	* ld-arm/attr-merge-vfp-4-d16.s: New test.

	gas/
	* doc/c-arm.texi: Document new -mfpu options.
	* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
	fpu_vfp_ext_fma): New.
	(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
	(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
	(insns): Move double precision load/store.  Split out double
	precision VFPv3 instrucitons.  Add VFPv4 instructions.
	(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
	(aeabi_set_public_attributes): Set VFPv4 variants

	gas/testsuite/
	* gas/arm/attr-mfpu-vfpv4.d: New test.
	* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
	* gas/arm/neon-fma-cov.d: New test.
	* gas/arm/neon-fma-cov.s: New test.
	* gas/arm/vfp-fma-inc.s: New test.
	* gas/arm/vfp-fma-arm.d: New test.
	* gas/arm/vfp-fma-arm.s: New test.
	* gas/arm/vfp-fma-thumb.d: New test.
	* gas/arm/vfp-fma-thumb.s: New test.
	* gas/arm/vfma1.d: New test.
	* gas/arm/vfma1.s: New test.
	* gas/arm/vfpv3xd.d: New test.
	* gas/arm/vfpv3xd.s: New test.

	include/opcode/
	* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
	FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
	(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
	FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
	FPU_ARCH_NEON_VFP_V4): Define.

	binutils/
	* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.

	bfd/
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
	attributes.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
	Add VFPv4 instructions.
2009-11-02 13:44:05 +00:00
Alan Modra
8977d4b219 * arm-dis.c (print_insn): Check symtab_size not *symtab. 2009-10-03 00:39:53 +00:00
Nick Clifton
21d799b5c4 Update soruces to make alpha, arc and arm targets compile cleanly
with -Wc++-compat:
        * config/tc-alpha.c: Add casts.
        (extended_bfd_reloc_code_real_type): New type. Used to avoid
        enumeration conversion warnings.
        (struct alpha_fixup, void assemble_insn, assemble_insn)
        (assemble_tokens): Use new type.
        * ecoff.c: Add casts. (mark_stabs): Use enumeration names.
        * config/obj-elf.c: Add cast
        * config/tc-arc.c: Add casts.
        * config/obj-aout.h (text_section,data_section,bss_section):
        Make extern.
        * config/obj-elf.c: Add cast.
        * config/tc-arm.c: Add casts.
        (X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE)
        (cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the
        need for keywords as arguments.
        * ecoff.c: Add casts.
        * ecofflink.c: Add casts.
        * elf64-alpha.c: Add casts.
        (struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move
        to top level.
        (SKIP_HOWTO): Use enum name.
        * elf32-arm.c: Add casts.
        (elf32_arm_vxworks_bed): Update code to avoid multiple
        declarations.
        (struct map_stub): Move to top level.
        * arc-dis.c Fix casts.
        * arc-ext.c: Add casts.
        * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
        enum.
        * emultempl/armelf.em: Add casts.
2009-09-25 19:13:27 +00:00
Alan Modra
aa820537ea update copyright dates 2009-09-02 07:25:43 +00:00
Nick Clifton
7769efb28e PR 10288
* arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
        offset or indexed based addressing mode 3.
2009-07-20 12:11:18 +00:00
Nick Clifton
74bdfecf08 PR 10288
* arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
        patterns.
        (arm_decode_shift): Catch illegal register based shifts.
        (print_insn_arm): Properly handle negative register r0
        post-indexed addressing.
2009-07-14 14:16:34 +00:00
Doug Kwan
d1aaab3c71 2009-07-10 Doug Kwan <dougkwan@google.com>
* arm-disc.c (print_insn_coprocessor, print_insn_arm):  Print only
	lower 32 bits of long types to make hexadecimal output consistent
	on both 32-bit and 64-bit hosts.
2009-07-10 16:58:54 +00:00
Nick Clifton
1103f72c0f gas/
* config/tc-arm.c (insns): Fix encoding for torvsc.

gas/testsuite/
    * gas/arm/iwmmxt2.d: Fix insn pattern for torvsc,
    add patterns for waddsubhx.
    * gas/arm/iwmmxt2.s: Add tests for waddsubhx.

opcodes/
    * arm-dis.c (coprocessor_opcodes): Fix mask for waddbhus.
2009-07-07 16:15:32 +00:00
Nick Clifton
78c66db84c PR 10288
* arm-dis.c (arm_opcodes): Be more strict about decoding scaled
        addressing modes.
2009-07-07 14:46:14 +00:00
Nick Clifton
fe56b6cece PR 10288
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
        LFM and SFM instructions as comments,.
        Improve consistency of formatting for instructions displayed as
        comments and decimal values displayed with their hexadecimal
        equivalents.
        Formatting tidy ups.

        Updated expected disassembler regexps.
2009-06-30 11:57:05 +00:00
Nick Clifton
05413229fd PR 10288
* arm-dis.c (enum opcode_sentinels): New:  Used to mark the
        boundary between variaant and generic coprocessor instuctions.
        (coprocessor): Use it.
        Fix architecture version of MCRR and MRRC instructions.
        (arm_opcdes): Fix patterns for STRB and STRH instructions.
        (print_insn_coprocessor): Check architecture and extension masks.
        Print a hexadecimal version of any decimal constant that is
        outside of the range of -16 to +32.
        (print_arm_address): Add a return value of the offset used in the
        adress, if it is worth printing a hexadecimal version of it.
        (print_insn_neon): Print a hexadecimal version of any decimal
        constant that is outside of the range of -16 to +32.
        (print_insn_arm): Likewise.
        (print_insn_thumb16): Likewise.
        (print_insn_thumb32): Likewise.

        PR 10297
        * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
        of an undefined instruction.
        (arm_opcodes): Use it.
        (thumb_opcod): Use it.
        (thumb32_opc): Use it.

        Update expected disassembly regrexps in GAS and LD testsuites.
2009-06-29 08:08:15 +00:00
Nick Clifton
0313a2b8d2 PR 10288
* arm-dis.c (print_insn_coprocessor): Check that a user specified
        ARM architecture supports the matched instruction.
        (print_insn_arm): Likewise.
        (select_arm_features): New function.  Fills in the fields of an
        arm_feature_set structure based on a given arm machine number.
        (print_insn): Initialise an arm_feature_set structure.

        * objdump.c (disassemble_bytes): Set the
        USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
        if the user has invoked the -m switch.
        * doc/binutils.texi: Document the additional behaviour of
        objdump's -m switch for ARM targets.

        * dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
        field of struct disassemble_info.

        * gas/arm/align.s: Add labels so that COFF based targets can
        correctly locate THUMB code.
        * gas/arm/copro.d: Do not pass --architecture switch to objdump.
2009-06-18 10:31:21 +00:00
Nick Clifton
fe2ceba101 PR 10186
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
        instruction.

        * gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.

        * config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
        instruction.
2009-06-15 15:42:36 +00:00
Nick Clifton
1316c8b37f PR 10263
* arm-dis.c (print_insn): Ignore is_data if the user has requested
        the disassembly of data as well as instructions.

        * objdump.c (disassemble_bytes): Set the DISASSEMBLE_DATA bit in
        the flags field of the disassemble_info structure if the -D switch
        is in operation.

        * dis-asm.h (struct disassemble_info): New value for the flags
        field.
2009-06-15 11:37:26 +00:00
Christophe Lyon
b8f9ee44f9 2009-04-01 Christophe Lyon <christophe.lyon@st.com>
opcodes/
	* arm-dis.c (print_insn): Print BE8 opcodes in little endianness.

	ld/testsuite/
	* ld-arm/arm-elf.exp: BE8 tests expect the same output as the
	default ones.
	* ld-arm/arm-be8.d: Print opcodes in little endian.
	* ld-arm/farcall-thumb-arm-be8.d: Removed useless expected result.
	* ld-arm/farcall-arm-arm-be8.d: Likewise.
2009-04-01 15:45:13 +00:00
Joseph Myers
d460e92e41 gas/testsuite:
* gas/arm/mapsecs.d, gas/arm/mapsecs.s: New.

opcodes:
	* arm-dis.c (print_insn): Also check section matches in backwards
	search for mapping symbol.
2009-03-30 14:41:31 +00:00
Richard Earnshaw
4ce8808b2c * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
vq{r}shr{u}n.s64 insnstructions.
2009-02-23 14:58:34 +00:00
Joseph Myers
087b80de6e gas:
2009-01-29  Mark Mitchell  <mark@codesourcery.com>

	* config/tc-arm.c (insns): Correct encoding of qadd, qdadd, qsub,
	qdsub in Thumb-2 mode.

gas/testsuite:
2009-01-29  Mark Mitchell  <mark@codesourcery.com>

	* gas/arm/thumb32.s (qadd): Add qadd, qdadd, qsub, and qdsub.
	* gas/arm/thumb32.d: Likewise.

opcodes:
2009-01-29  Mark Mitchell  <mark@codesourcery.com>

	* arm-dis.c (thumb32_opcodes): Correct decoding for qadd, qdadd,
	qsub, and qdsub.
2009-01-29 11:48:34 +00:00
Richard Earnshaw
7df76b802e opcodes:
* arm-dis.c (coprocessor_opcodes): Disassemble VFP instructions using
	unified syntax.
gas/testsuite:
	* gas/arm/group-reloc-ldc.d: Disassembly of VFP instructions now uses
	unified syntax.
	* gas/arm/vfp-non-overlap.d: Likewise.
	* gas/arm/vfp-neon-syntax.d: Likewise.
	* gas/arm/vfp-neon-syntax_t2.d: Likewise.
	* gas/arm/vfp1.d: Likewise.
	* gas/arm/vfp1_t2.d: Likewise.
	* gas/arm/vfp1xD.d: Likewise.
	* gas/arm/vfp1xD_t2.d: Likewise.
	* gas/arm/vfp2.d: Likewise.
	* gas/arm/vfp2_t2.d: Likewise.
	* gas/arm/vfpv3-32drs.d: Likewise.
	* gas/arm/vfpv3-const-conv.d: Likewise.
ld/testsuite:
	* ld-arm/vfp11-fix-scalar.d: Disassembly of VFP instructions now uses
	unified syntax.
	* ld-arm/vfp11-fix-vector.d: Likewise.
2008-12-15 17:24:13 +00:00
Catherine Moore
8e79c3df51 Add support for ARM half-precision conversion instructions. 2008-11-18 15:45:05 +00:00
Stan Shebs
bd2e25575c 2008-07-07 Stan Shebs <stan@codesourcery.com>
* dis-init.c (init_disassemble_info): Init endian_code field.
	    * arm-dis.c (print_insn): Disassemble code according to
	    setting of endian_code.
	    (print_insn_big_arm): Detect when BE8 extension flag has been set.
2008-07-07 18:35:24 +00:00
Nick Clifton
92c8bd791d * arm-dis.c (arm_opcodes): Remove superflous escapes of percent operators. 2007-11-07 14:40:40 +00:00
Nick Clifton
2cc7bb5dcf * arm-dis.c (print_insn): Check for a symtab that exists but is empty. 2007-10-26 11:27:12 +00:00
Nick Clifton
9b201bb5e5 Change source files over to GPLv3. 2007-07-05 09:49:03 +00:00
Paul Brook
cd2cf30b7d 2007-06-26 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (parse_operands): Accept generic coprocessor regs
	for OP_RVC.
	(reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.

	gas/testsuite/
	* gas/arm/vfp1xD.d: Add new fmrx/fmxr tests.
	* gas/arm/vfp1xD.s: Ditto.
	* gas/arm/vfp1xD_t2.d: Ditto.
	* gas/arm/vfp1xD_t2.s: Ditto.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
2007-06-26 21:36:37 +00:00
Paul Brook
79d4951621 2007-06-05 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.

	gas/testsuite/
	* gas/arm/thumb32.d: Add writeback addressing mode tests.
	* gas/arm/thumb32.s: Update expected output.

	opcodes/
	* arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
2007-06-05 22:02:47 +00:00
Nick Clifton
fbb9230130 Fix compile time warning (at -O3 with gcc 4.1.2) 2007-04-24 13:21:32 +00:00
Richard Earnshaw
37b37b2d7a * arm-dis.c (arm_opcodes): Disassemble to unified syntax.
(thumb_opcodes): Add missing white space in adr.
	(arm_decode_shift): New parameter, print_shift.  Only decode the
	shift parameter if set.  Adjust callers.
	(print_insn_arm): Support for operand type q with no shift decode.
2007-04-21 19:44:09 +00:00
Richard Earnshaw
86ad2a1353 * arm-dis.c (print_insn): Only look for a mapping symbol in the section
being disassembled.
2007-04-20 00:00:21 +00:00
Paul Brook
b74ed8f52a 2006-03-27 Paul Brook <paul@codesourcery.com>
opcodes/
	* arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
2007-03-27 21:09:53 +00:00
Paul Brook
4146fd53c0 2007-03-24 Paul Brook <paul@codesourcery.com>
opcodes/
	* arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
	(print_insn_coprocessor): Handle %<bitfield>x.
2007-03-24 02:51:28 +00:00
Paul Brook
b67020158a 2007-03-24 Paul Brook <paul@codesourcery.com>
Mark Shinwell  <shinwell@codesourcery.com>

	gas/
	* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
	(parse_operands): Don't expect comma if first operand missing.
	Handle OP_oRRw.
	(do_srs): Encode register number, checking it is r13.  Update comment.
	(insns): Update SRS entries to take a register.

	gas/testsuite/
	* gas/arm/archv6.s: Add new SRS tests.
	* gas/arm/archv6.d: Update expected output.
	* gas/arm/thumb32.s: Add new SRS tests.
	* gas/arm/thumb32.d: Update expected output.
	* gas/arm/srs-t2.d: New.
	* gas/arm/srs-t2.l: New.
	* gas/arm/srs-t2.s: New.
	* gas/arm/srs-arm.d: New.
	* gas/arm/srs-arm.l: New.
	* gas/arm/srs-arm.s: New.

	opcodes/
	* arm-dis.c (arm_opcodes): Print SRS base register.
2007-03-24 01:29:00 +00:00
Paul Brook
a028a6f534 2007-01-04 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
	gas/testsuite/
	* gas/arm/archv6.s: Add more cpsie tests.
	* gas/arm/archv6.d: Ditto.
	opcodes/
	* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
2007-01-04 20:08:36 +00:00
Julian Brown
62ac925e42 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
vqrshl instructions.
2007-01-04 15:33:12 +00:00
Paul Brook
00249aaae7 2006-11-29 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
	encoding.

	gas/testsuite/
	* gas/arm/vfpv3-const-conv.s: Improve test coverage.
	* gas/arm/vfpv3-const-conv.d: Adjust expected output.
	* gas/arm/vfp-neon-syntax_t2.d: Ditto.
	* gas/arm/vfp-neon-syntax.d: Ditto.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
2006-11-29 16:26:56 +00:00
Daniel Jacobowitz
e821645dee opcodes/
* arm-dis.c (last_is_thumb): Delete.
	(enum map_type, last_type): New.
	(print_insn_data): New.
	(get_sym_code_type): Take MAP_TYPE argument.  Check the type of
	the right symbol.  Handle $d.
	(print_insn): Check for mapping symbols even without a normal
	symbol.  Adjust searching.  If $d is found see how much data
	to print.  Handle data.
gas/
	* config/tc-arm.h (md_cons_align): Define.
	(mapping_state): New prototype.
	* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
	* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
	gas/arm/tls.d: Update for $d support.
	* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
	* gas/elf/section2.e-armeabi: Update.
	* gas/elf/section2.e-armelf: New file.
	* gas/elf/elf.exp: Use it.
ld/testsuite/
	* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
	for $d support.
2006-11-22 17:45:57 +00:00
Paul Brook
2087ad8497 2006-10-30 Paul Brook <paul@codesourcery.com>
binutils/
	* objdump.c (disassemble_section): Set info->symtab_pos.
	(disassemble_data): Set info->symtab and info->symtab_size.

	include/
	* dis-asm.h (disassemble_info): Add symtab, symtab_pos and
	symtab_size.

	opcodes/
	* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
	(get_sym_code_type): New function.
	(print_insn): Search for mapping symbols.
2006-10-31 20:21:57 +00:00
Joseph Myers
2d447fcaa9 bfd/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
	* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
	(arch_info_struct, bfd_arm_update_notes): Likewise.
	(architectures): Likewise.
	(bfd_arm_merge_machines): Check for iWMMXt2.
	* bfd-in2.h: Rebuild.

gas/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* config/tc-arm.c (arm_cext_iwmmxt2): New.
	(enum operand_parse_code): New code OP_RIWR_I32z.
	(parse_operands): Handle OP_RIWR_I32z.
	(do_iwmmxt_wmerge): New function.
	(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
	a register.
	(do_iwmmxt_wrwrwr_or_imm5): New function.
	(insns): Mark instructions as RIWR_I32z as appropriate.
	Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
	waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
	wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
	wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
	(md_begin): Handle IWMMXT2.
	(arm_cpus): Add iwmmxt2.
	(arm_extensions): Likewise.
	(arm_archs): Likewise.

gas/testsuite/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* gas/arm/iwmmxt2.s: New file.
	* gas/arm/iwmmxt2.d: New file.

include/opcode/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.

opcodes/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
	only be used with the default multiply-add operation, so if N is
	set, don't bother printing X.  Add new iwmmxt instructions.
	(IWMMXT_INSN_COUNT): Update.
	(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
	with a 'c' suffix.
	(print_insn_coprocessor): Check for iWMMXt2.  Handle format
	specifiers 'r', 'i'.
2006-09-26 12:04:45 +00:00