Change data ordering in emulated memory from target order (big endian)
to host order. Improves performance and simplifies most memory
operations. Requires some byte twisting during stores on little
endian hosts (intel). Also removed support for little-endian binaries.
Binaries produced by most erc32 tool-chains do not include
system initialization. sis will detect this and initialize
necessary registers for memory and timer control.
It is rare for people to want to modify the cmd arg. In general, they
really shouldn't be, but a few still do. For those who misbehave, dupe
the string locally so they can bang on it.
This patch fixes a build failure at link time due to
sim_complete_command being undefined. There was a recent change
that added this function to all the ports that do not use the
common/ subdir. But somehow, the erc32 port got missed.
sim/erc32/ChangeLog:
* interf.c (sim_complete_command): New stub function.
gdb/ChangeLog
* remote-sim.c (gdbsim_store_register): Update API to
sim_store_register to check more error conditions.
include/gdb/ChangeLog
* remote-sim.h (sim_store_register): Update the API
documentation for this function.
sim/erc32/ChangeLog
sim/h8300/ChangeLog
sim/m32c/ChangeLog
sim/mn10300/ChangeLog
sim/ppc/ChangeLog
sim/rx/ChangeLog
sim/v850/ChangeLog
* ???.c (sim_store_register): Update return value to
match new API.
* erc32.c (sis_memory_write): Change prototype to const unsigned char *.
* func.c (exec_cmd, event, advance_time, wait_for_irq): Use uint64
for counts.
* interf.c (run_sim): Change icount to uint64_t. Use strtol directly.
(sim_resume): Specify maximum run time as uint64.
* sis.c (run_sim): Change icount to uint64_t.
* sis.h: Define uint64 as uint64_t. Change various fields and
prototypes to uint64 to support longer simulations.
As pointed out by Sandra Loosemore, a bunch of targets define sim_write
themselves instead of using the common/ code. So constify them too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
sim_resume. Expect target signal numbers from sim_stop_reason.
* wrapper.c (gdb/signals.h): Include it.
(SIGTRAP): Don't define.
(SIGBUS): Likewise.
(sim_stop_reason): Use TARGET_SIGNAL_* instead of SIG*.
* sim-reason.c (sim_stop_reason): Use
sim_signal_to_target, not sim_signal_to_host.
* sim-signal.c (sim_signal_to_host): Fix typo.
(sim_signal_to_target): New function.
* interp.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* interf.c: (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* sim_calls.c (gdb/signals.h): Include it.
(sim_stop_reason): Use TARGET_SIGNAL_*.
* psim.c (cntrl_c_simulation): Use TARGET_SIGNAL_*.
* sim/erc32/float.c (set_fsr): Do not use deprecated multi-line
strings.
(clear_accex): Ditto.
* sim/erc32/interf.c: Remove the redeclaration of fprintf.
* sim/erc32/sis.c: Ditto.
* sim/erc32/exec.c: Add missing semicolon.
* sim/erc32/func.c: Remove definitions of generic_print_address,
generic_symbol_at_address, buffer_read_memory and perror_memory, as
they are already defined in opcodes/dis-buf.c.
byte-swapping unnecessary. Add -sparclite-board option for
emulating RAM found on typical SPARClite boards. Print
error message for unrecognized option.
* erc32.c: Change RAM address and size from constants to variables,
to allow emulation of SPARClite board RAM.
(fetch_bytes, store_bytes): New helper functions for revamped
mememory_read and memory_write.
(memory_read, memory_write): Rewrite to store bytes in target
byte order instead of storing words in host byte order; this
greatly simplifies support of little-endian programs.
(get_mem_ptr): Remove unnecessary byte parameter.
(sis_memory_write, sis_memory_read): Store words in target
byte order instead of host byte order.
(byte_swap_words): Remove, no longer needed.
* sis.h ((byte_swap_words): Remove declaration, no longer needed.
(memory_read): Add new sz parameter.
* sis.c (run_sim): Use revamped memory_read, which makes
byte-swapping unnecessary.
* exec.c (dispatch_instruction): Use revamped memory_read, which
makes byte-swapping and double-word fetching unnecessary.
* func.c (sparclite_board): Declare new variable.
(get_regi): Handle little-endian data.
(bfd_load): Recognize little-endian SPARClite as having
little-endian data.
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
(start_address): New static local.
(sim_load): Return SIM_RC. New arg abfd. Set start_address from bfd.
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
* Makefile.in: Only link in -ltermcap if it exists.
* erc32.c: Update to version 2.6a. Fix uart handling.
* exec.c: Update to version 2.6a. Add sparclite support.
* float.c: Update to version 2.6a. Convert comments to
preprocessor warnings. Add __setfpucw() for i385 hosts so floating
point exceptions work.
* func.c: Update to version 2.6a. Fix uart handling, add support
for user error traps.
* help.c: Update to version 2.6a. Add help note on user error
traps.
* interf.c: Update to version 2.6a. Fix uart handling, and add
sparclite support.
* examples/gccx: Use sparclite cross compiler, not native gcc.
* examples/srt0.S: Use "mov" rather than "wr" for manipulating
the psr register.
sis.h: Get rid of all uses of long long's.
* (close_port read_uart write_uart uarta_tx): Don't seg fault
when can't open pty's.
* exec.c: Add two new instructions: smul, and divscc.
* interf.c (flush_windows): New routine to flush the register
windows out to the stack just before returning to GDB. Makes
backtraces work much better.
