Commit graph

7 commits

Author SHA1 Message Date
Michael Meissner
85f10a010c Add AMD SSE5 support 2007-09-14 18:21:09 +00:00
Jan Beulich
ae91ad40e9 gas/testsuite/
2007-09-12  Jan Beulich  <jbeulich@novell.com>
	* gas/i386/sse4_1.s, gas/i386/x86-64-sse4_1.s: Add two-operand forms
	of blendvps, blendvpd, and pblendvb.
	* gas/i386/sse4_1.d, gas/i386/sse4_1-intel.d,
	gas/i386/x86-64-sse4_1.d, gas/i386/x86-64-sse4_1-intel.d: Adjust,
	making last/first operand of blendvps, blendvpd, and pblendvb
	optional.

opcodes/
2007-09-12  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl: Add two-operand forms of blendvps, blendvpd, and
	pblendvb.
	* i386-tbl.h: Regenerate.
2007-09-12 13:20:31 +00:00
H.J. Lu
26186d7440 gas/
2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Handle invlpga, vmload,
	vmrun and vmsave in SVME.
	(process_suffix): Likewise.

gas/testsuite/

2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/svme.s: Updated to allow eax in 64bit.
	* gas/i386/svme.d: Updated.
	* gas/i386/svme64.d: Likewise.

opcodes/

2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Correct SVME instructions to allow 32bit register
	operand in 64bit mode.
	* i386-tbl.h: Regenerated.
2007-09-06 12:28:12 +00:00
H.J. Lu
144c41d992 gas/testsuite/
2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/svme.s: Updated to accept eax in 32bit and rax in
	64bit.
	* gas/i386/svme.d: Updated.
	* gas/i386/svme64.d: Likewise.

opcodes/

2007-08-31  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (SVME_Fixup): Removed.
	(OPC_EXT_39): New.
	(OPC_EXT_RM_6): Likewise.
	(grps): Use OPC_EXT_39.
	(opc_ext_table): Add OPC_EXT_39.
	(opc_ext_rm_table): Add OPC_EXT_RM_6.

	* i386-opc.tbl: Correct SVME instructions to take register
	operand only.
	* i386-tbl.h: Regenerated.
2007-08-31 18:48:29 +00:00
H.J. Lu
c3ad16c0cd gas/
2007-08-09  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (check_byte_reg): Support pextrb and pinsrb.

gas/testsuite/

2007-08-09  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run sse4_1-intel, sse4_2-intel,
	x86-64-sse4_1-intel and x86-64-sse4_2-intel.

	* gas/i386/sse4_1-intel.d: New file.
	* gas/i386/sse4_2-intel.d: Likewise.
	* gas/i386/x86-64-sse4_1-intel.d: Likewise.
	* gas/i386/x86-64-sse4_2-intel.d: Likewise.

	* gas/i386/sse4_1.s: Add tests for Intel syntax.
	* gas/i386/sse4_2.s: Likewise.
	* gas/i386/x86-64-sse4_1.s: Likewise.
	* gas/i386/x86-64-sse4_2.s: Likewise.

	* gas/i386/sse4_1.d: Updated.
	* gas/i386/sse4_2.d: Likewise.
	* gas/i386/x86-64-sse4_1.d: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.

opcodes/

2007-08-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add NoRex64 to pmovsxbw, pmovsxwd, pmovsxdq,
	pmovzxbw, pmovzxwd, pmovzxdq and roundsd.
	* i386-tbl.h: Regenerated.
2007-08-09 13:50:51 +00:00
Nick Clifton
9b201bb5e5 Change source files over to GPLv3. 2007-07-05 09:49:03 +00:00
H.J. Lu
40b8e679e8 2007-06-28 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h.
	(CFILES): Add i386-gen.c.
	(i386-gen): New rule.
	(i386-gen.o): Likewise.
	(i386-tbl.h): Likewise.
	Run "make dep-am".
	* Makefile.in: Regenerated.

	* i386-gen.c: New file.
	* i386-opc.tbl: Likewise.
	* i386-reg.tbl: Likewise.
	* i386-tbl.h: Likewise.

	* i386-opc.c: Include "i386-tbl.h".
	(i386_optab): Removed.
	(i386_regtab): Likewise.
	(i386_regtab_size): Likewise.
2007-06-28 14:29:56 +00:00