David S. Miller
ff3f9d5b2a
2006-02-24 David S. Miller <davem@sunset.davemloft.net>
...
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
(v9_hpriv_reg_names): New table.
(print_insn_sparc): Allow values up to 16 for '?' and '!'.
New cases '$' and '%' for read/write hyperprivileged register.
* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
window handling and rdhpr/wrhpr instructions.
2006-02-25 01:33:24 +00:00
Nick Clifton
47b0e7ad8c
Update function declarations to ISO C90 formatting
2005-07-01 11:16:33 +00:00
Nick Clifton
f432110413
Update the address and phone number of the FSF
2005-05-07 07:34:31 +00:00
Jakub Jelinek
b4781d441c
* sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
...
(fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
suffix. Use fmov*x macros, create all 3 fpsize variants in one
macro. Adjust all users.
2004-04-20 10:23:51 +00:00
Jakub Jelinek
ff24f1246e
* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
2004-01-18 23:46:32 +00:00
Nick Clifton
d3c866d1d8
Add conditional/unconditional branch classification.
2002-10-23 15:45:49 +00:00
Nick Clifton
060d22b0d0
Fix typos in ChangeLogs; fix dates in copyright notices
2001-03-13 22:58:38 +00:00
Jakub Jelinek
19f7b01094
gas/
...
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
instructions to loose any special insn->architecture mask.
* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
(sparc_md_end, sparc_arch_types, sparc_arch,
sparc_elf_final_processing): Handle v8plusb and v9b architectures.
(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
request v9b architecture if they are used).
bfd/
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
elf32_sparc_object_p, elf32_sparc_final_write_processing):
Support v8plusb.
* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
sparc64_elf_object_p): Support v9b.
* archures.c: Declare v8plusb and v9b machines.
* bfd-in2.h: Ditto.
* cpu-sparc.c: Ditto.
include/opcode/
* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
Note that '3' is used for siam operand.
opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
* opcodes/sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
2000-10-20 10:38:47 +00:00
Jakub Jelinek
09ab35c7f5
* sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
...
Reported by Bill Clarke <llib@computer.org>.
2000-07-11 18:44:12 +00:00
Alan Modra
0d8dfecfe9
More portability patches. Include sysdep.h everywhere.
2000-04-14 04:16:58 +00:00
Richard Henderson
440034c99f
Jakub Jelinek <jj@ultra.linux.cz>
...
* sparc-opc.c: Fix up set, setsw, setuw operand kinds.
Support signx %reg, clruw %reg.
1999-06-07 12:44:48 +00:00
Richard Henderson
bed2c8562a
Jakub Jelinek <jj@ultra.linux.cz>
...
* sparc-opc.c: Add aliases Solaris as supports.
1999-06-07 12:26:46 +00:00
Richard Henderson
252b5132c7
19990502 sourceware import
1999-05-03 07:29:11 +00:00
