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4 commits

Author SHA1 Message Date
Alan Modra
e5654c0f84 Fallout from "Reorder more powerpc64 sections for -z relro"
Commit 23283c1b changed the layout of some bss style sections on
powerpc64, but neglected to add a page gap before the third PT_LOAD
segment created by this reording.  Without a page gap we get two
PT_LOAD headers that overlap by one page in memory.  That shouldn't be
allowed because the dynamic loader will load garbage from the first
page of the last segment over the last page of the previous segment.

bfd/
	* elf.c (_bfd_elf_map_sections_to_segments): Do not make a new
	segment for loaded sections after nonloaded sections if the
	sections are on the same page.
ld/testsuite/
	* ld-powerpc/elfv2so.d: Update
2015-07-28 18:42:43 +09:30
Alan Modra
a27e685fa0 Align .TOC. for PowerPC64
This change, with prerequisite 0e5fabeb, provides a toc base aligned
to 256 bytes rather than 8 bytes.  This is necessary for a minor gcc
optimisation, allowing use of d-form instructions to correctly access
toc-relative items larger than 8 bytes.

bfd/
	* elf64-ppc.c (TOC_BASE_ALIGN): Define.
	(ppc64_elf_next_toc_section): Align multi-got toc base.
	(ppc64_elf_set_toc): Likewise initial toc base and .TOC. symbol.
ld/
	* emulparams/elf64ppc.sh (GOT): Align.
ld/testsuite/
	* ld-powerpc/ambiguousv1b.d: Update for aligned .got.
	* ld-powerpc/defsym.d: Likewise.
	* ld-powerpc/elfv2-2exe.d: Likewise.
	* ld-powerpc/elfv2exe.d: Likewise.
	* ld-powerpc/elfv2so.d: Likewise.
	* ld-powerpc/relbrlt.d: Likewise.
	* ld-powerpc/tls.g: Likewise.
	* ld-powerpc/tlsexe.d: Likewise.
	* ld-powerpc/tlsexe.g: Likewise.
	* ld-powerpc/tlsexe.r: Likewise.
	* ld-powerpc/tlsexetoc.d: Likewise.
	* ld-powerpc/tlsexetoc.g: Likewise.
	* ld-powerpc/tlsexetoc.r: Likewise.
	* ld-powerpc/tlsso.d: Likewise.
	* ld-powerpc/tlsso.g: Likewise.
	* ld-powerpc/tlsso.r: Likewise.
	* ld-powerpc/tlstoc.g: Likewise.
	* ld-powerpc/tlstocso.d: Likewise.
	* ld-powerpc/tlstocso.g: Likewise.
	* ld-powerpc/tlstocso.r: Likewise.
	* ld-powerpc/tocopt.d: Likewise.
	* ld-powerpc/tocopt2.d: Likewise.
	* ld-powerpc/tocopt3.d: Likewise.
	* ld-powerpc/tocopt4.d: Likewise.
	* ld-powerpc/tocopt5.d: Likewise.
2015-04-23 09:49:19 +09:30
Alan Modra
23283c1be0 Reorder more powerpc64 sections for -z relro
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset.  .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.

This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header.  Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section.  That should only happen rarely in
real world binaries, but does occur in the ld testsuite.

ld/
	* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
	(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
	(OTHER_RELRO_SECTIONS_2): ..here.
	(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
	PLT_BEFORE_GOT): Define.
	* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
	PLT_BEFORE_GOT combination.
	(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
	* ld-powerpc/ambiguousv1.d,
	* ld-powerpc/ambiguousv1b.d,
	* ld-powerpc/ambiguousv2.d,
	* ld-powerpc/ambiguousv2b.d,
	* ld-powerpc/elfv2exe.d,
	* ld-powerpc/elfv2so.d,
	* ld-powerpc/tlsexe.r,
	* ld-powerpc/tlsexetoc.r,
	* ld-powerpc/tlsso.r,
	* ld-powerpc/tlstocso.r: Update.
2015-01-20 19:52:42 +10:30
Alan Modra
d4a95d4999 Add PowerPC64 ELFv2 tests.
* ld-powerpc/elfv2.s,
	* ld-powerpc/elfv2so.d,
	* ld-powerpc/elfv2exe.d: New tests.
	* ld-powerpc/powerpc.exp: Run them.
2013-10-30 13:44:10 +10:30