2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards
to merging with ARMv8-M Baseline.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch
value.
gas/
* config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions
shared between ARMv6T2 and ARMv8-M.
(move_or_literal_pool): Check mov.w/mvn and movw availability against
arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking
arm_arch_t2.
(do_t_branch): Error out for wide conditional branch instructions if
targetting ARMv8-M Baseline.
(non_v6t2_wide_only_insn): Add the logic for new wide-only instructions
in ARMv8-M Baseline.
(wide_insn_ok): New function.
(md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and
adapt error message for unsupported wide instruction to ARMv8-M
Baseline.
(insns): Reorganize instructions shared by ARMv8-M Baseline and
ARMv6t2 architecture.
(arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and
marvell-whitney cores.
(arm_archs): Define armv8-m.base architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version.
(aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for
ARMv8-M Mainline. Set Tag_DIV_use for ARMv8-M Baseline as well.
gas/testsuite/
* gas/arm/archv8m-base.d: New file.
* gas/arm/attr-march-armv8m.base.d: Likewise.
* gas/arm/armv8m.base-idiv.d: Likewise.
* gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.
include/opcode/
* arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
(ARM_AEXT2_V8A): New architecture extension bitfield.
(ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_AEXT_V8M_BASE): New architecture extension bitfield.
(ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
(ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield.
(ARM_ARCH_V6KT2): Likewise.
(ARM_ARCH_V6ZT2): Likewise.
(ARM_ARCH_V6KZT2): Likewise.
(ARM_ARCH_V7): Likewise.
(ARM_ARCH_V7A): Likewise.
(ARM_ARCH_V7VE): Likewise.
(ARM_ARCH_V7R): Likewise.
(ARM_ARCH_V7M): Likewise.
(ARM_ARCH_V7EM): Likewise.
(ARM_ARCH_V8A): Likewise.
(ARM_ARCH_V8M_BASE): New architecture bitfield.
(ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
(ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield and reindent.
(ARM_ARCH_V7A_MP_SEC): Likewise.
(ARM_ARCH_V7R_IDIV): Likewise.
(ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by
ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
for new TAG_CPU_ARCH_V4T_PLUS_V6_M value. Deal with NULL values in
comb array.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
value.
(arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
value.
gas/
* config/tc-arm.c (arm_ext_m): Include ARMv8-M.
(arm_ext_v8m): New feature for ARMv8-M.
(arm_ext_atomics): New feature for ARMv8 atomics.
(do_tt): New encoding function for TT* instructions.
(insns): Add new entries for ARMv8-M specific instructions and
reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
(arm_archs): Define armv8-m.main architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
clarify the ordering rule.
(aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
Tag_CPU_arch values for ARMv7e-M detection. Add logic to keep setting
Tag_CPU_arch to ARMv8-A for -march=all. Also set Tag_CPU_arch_profile
to 'A' if extension bit for atomic instructions is set, unless it is
ARMv8-M. Set Tag_THUMB_ISA_use to 3 for ARMv8-M. Set Tag_DIV_use to 0
for ARMv8-M Mainline.
gas/testsuite/
* gas/arm/archv8m.s: New file.
* gas/arm/archv8m-main.d: Likewise.
* gas/arm/attr-march-armv8m.main.d: Likewise.
* gas/arm/any-armv8m.s: Likewise.
* gas/arm/any-armv8m.d: Likewise.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
(MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
(TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.
include/opcode/
* arm.h (ARM_EXT2_ATOMICS): New extension bit.
(ARM_EXT2_V8M): Likewise.
(ARM_EXT_V8): Adjust comment with regards to atomics and remove
mention of legacy use for that bit.
(ARM_AEXT2_V8_1A): New architecture extension bitfield.
(ARM_AEXT2_V8_2A): Likewise.
(ARM_AEXT_V8M_MAIN): Likewise.
(ARM_AEXT2_V8M): Likewise.
(ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
(ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
(ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
(ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
(ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
and reindent.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
(ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
feature bits.
(ARM_ARCH_V8_1A_SIMD): Likewise.
(ARM_ARCH_V8_1A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
ARM_EXT_V8.
(thumb32_opcodes): Add entries for wide ARMv8-M instructions.
bfd * elf-bfd.h: Add callback to count additional relocations.
* elf32-arm.c (_arm_elf_section_data): Add new counter.
(insert_cantunwind_after): Increment relocations counter.
(elf32_arm_fix_exidx_coverage): Remove exidx entries and add
terminating CANTUNWIND entry only in final builds.
(elf32_arm_add_relocation): New function.
(elf32_arm_write_section): Add relocations in relocatable builds.
(elf32_arm_count_additional_relocs): New function.
(elf_backend_count_additional_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
.rel section.
* bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.
ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
elf32_arm_fix_exidx_coverage for relocatable builds.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-rel.d: New file.
* ld-arm/unwind-rel1.s: New file.
* ld-arm/unwind-rel2.s: New file.
* ld-arm/unwind-rel3.s: New file.
include/elf
* arm.h: Add arm SHF_ARM_NOREAD section flag.
bfd * bfd-in2.h: Regenerate.
* section.c: Add SEC_ELF_NOREAD.
* elf32-arm.c (elf32_arm_post_process_headers): Only set
PF_X attribute if a segment only contains section with
SHF_ARM_NOREAD flag.
(elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
(elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
to bfd flag.
(elf32_arm_lookup_section_flags): New function to allow
INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
(elf32_arm_special_sections): Add special sections array
to catch section prefix by '.text.noread' pattern.
ld/testsuite
* ld-arm/arm-elf.exp: New tests.
* ld-arm/thumb1-input-section-flag-match.d: New
* ld-arm/thumb1-input-section-flag-match.s: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
* ld-arm/thumb1-noread-present-one-section.d: New
* ld-arm/thumb1-noread-present-one-section.s: New
* ld-arm/thumb1-noread-present-two-section.d: New
* ld-arm/thumb1-noread-present-two-section.s: New
binutils
* readelf.c (get_elf_section_flags): Add support for ARM specific
section flags.
2015-12-16 Mickael Guene <mickael.guene@st.com>
bfd/
* bfd-in2.h: Regenerate.
* reloc.c: Add new relocations.
* libbfd.h (bfd_reloc_code_real_names): Add new relocations
display names.
* elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new
relocations.
(elf32_arm_reloc_map): Add bfd/arm mapping for new relocations.
(elf32_arm_final_link_relocate): Implement new relocations
resolution.
gas/
* doc/c-arm.texi: Add documentation about new directives
* config/tc-arm.c (group_reloc_table): Add mapping between gas
syntax and new relocations.
(do_t_add_sub): Keep new relocations for add operand.
(do_t_mov_cmp): Keep new relocations for mov operand.
(insns): Use 'shifter operand with possible group relocation'
operand parse code for movs operand.
(md_apply_fix): Implement mov and add encoding when new
relocations on them.
(tc_gen_reloc): Add new relocations.
(arm_fix_adjustable): Since offset has a limited range ([0:255])
we disable adjust_reloc_syms() for new relocations.
gas/testsuite/
* gas/arm/adds-thumb1-reloc-local.d: New
* gas/arm/adds-thumb1-reloc-local.s: New
* gas/arm/movs-thumb1-reloc-local.d: New
* gas/arm/movs-thumb1-reloc-local.s: New
include/
* elf/arm.h: Add new arm relocations.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests_common): Add new relocations
tests.
* ld-arm/thumb1-adds.d: New
* ld-arm/thumb1-adds.s: New
* ld-arm/thumb1-movs.d: New
* ld-arm/thumb1-movs.s: New
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
movs r3, #:upper8_15:#foo
lsls r3, #8
adds r3, #:upper0_7:#foo
lsls r3, #8
adds r3, #:lower8_15:#foo
lsls r3, #8
adds r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
4: 2300 movs r3, #0
4: R_ARM_THM_ALU_ABS_G3_NC foo
6: 021b lsls r3, r3, #8
8: 3300 adds r3, #0
8: R_ARM_THM_ALU_ABS_G2_NC foo
a: 021b lsls r3, r3, #8
c: 3300 adds r3, #0
c: R_ARM_THM_ALU_ABS_G1_NC foo
e: 021b lsls r3, r3, #8
10: 3300 adds r3, #0
10: R_ARM_THM_ALU_ABS_G0_NC foo
The re-writing logic in _bfd_coff_final_link() overwrote the ".file"
part of the symbol table entry, due to not coping with the auxiliary
entry generated in all cases.
Note that while I would have wanted to add a test case,
(a) I didn't spot any one testing the base functionality here, and
(b) I wasn't able to figure out proper conditionals to use in e.g.
ld-elf/elf.exp to check for the necessary PE/PE+ support (which
varies by target).
Various fixes to linker relaxation. In general, we need to support
relaxing every branch, even if we don't relax it in the assembler,
so we can optionally defer relaxation to the linker.
* elf32-rl78.c (rl78_offset_for_reloc): Add more relocs.
(rl78_elf_relax_section): Add bc/bz/bnc/bnz/bh/bnh. Fix reloc
choices.
* config/rl78-parse.y: Make all branches relaxable via
rl78_linkrelax_branch().
* config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable
branches with relocs.
(options): Add OPTION_NORELAX.
(md_longopts): Add -mnorelax.
(md_parse_option): Support OPTION_NORELAX.
(op_type_T): Add bh, sk, call, and br.
(rl78_opcode_type): Likewise.
(rl78_relax_frag): Fix not-relaxing logic. Add sk.
(md_convert_frag): Fix relocation handling.
(tc_gen_reloc): Strip relax relocs when not linker relaxing.
(md_apply_fix): Defer overflow handling for anything that needs a
PLT, to the linker.
* config/tc-rl78.h (TC_FORCE_RELOCATION): Force all relocations to
the linker when linker relaxing.
* doc/c-rl78.texi (norelax): Add.
* elf32-rx.c (elf32_rx_relax_delete_bytes): Add extra parameter -
the start of the relocs for the section. Delete code to load in
the relocs.
(elf32_rx_relax_section): Do not free the loaded relocs.
This fixes some cases where the linker would incorrectly error on plt
relocs to local ifunc symbols. I've also tidied plt and ifunc
handling for ppc64, where check_relocs was allowing for the
possibility of plt calls via addr14/addr24 relocs but relocate_section
was not.
* elf32-ppc.c (ppc_elf_check_relocs): Don't error on local ifunc
plt call. Wrap long lines.
(ppc_elf_relocate_section): Wrap long lines.
* elf64-ppc.c (ppc64_elf_check_relocs): Don't error on local ifunc
plt calls. Move __tls_get_addr checks later. Don't create plt
for addr14/addr24 relocs.
(ppc64_elf_gc_sweep_hook): Adjust to suit check_relocs changes.
(ppc64_elf_relocate_section): Correct local ifunc handling for
PLT64, PLT32 and PLT16 relocs.
On 32-bit targets, memory requested for program/section headers on a
fuzzed binary can wrap to 0. A bfd_alloc of zero bytes actually
returns a one byte allocation rather than a NULL pointer. This then
leads to buffer overflows.
Making this check unconditional triggers an extremely annoying gcc-5
warning.
PR19323
* elfcode.h (elf_object_p): Check for ridiculous e_shnum and
e_phnum values.
Add a new relocation that marks large-model entry code, for edit back
to medium-model.
include/elf/
* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
entry for R_PPC64_ENTRY.
(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY. Use
new insn defines.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend
isn't 0. It isn't valid to convert
movl foo@GOT+1(%ecx), %eax
to
leal foo@GOTOFF+1(%ecx), %eax
nor to convert
movq foo@GOTPCREL+1(%rip), %rax
to
leaq foo(%rip), %rax
for x86-64. We should check if addend is 0 before optimizing R_386_GOT32
and R_386_GOT32X relocations. Testcases are added for i386 and x86-64.
bfd/
* elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0.
(elf_i386_relocate_section): Skip R_386_GOT32X optimization if
addend isn't 0.
ld/testsuite/
* ld-i386/i386.exp: Run mov2a, mov2b and mov3.
* ld-i386/mov2.s: New file.
* ld-i386/mov2a.d: Likewise.
* ld-i386/mov2b.d: Likewise.
* ld-i386/mov3.d: Likewise.
* ld-i386/mov3.s: Likewise.
* ld-x86-64/mov2.s: Likewise.
* ld-x86-64/mov2a.d: Likewise.
* ld-x86-64/mov2b.d: Likewise.
* ld-x86-64/mov2c.d: Likewise.
* ld-x86-64/mov2d.d: Likewise.
* ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
In this case the inlined function doesn't have DW_AT_linkage_name in
.debug_info, but the language is C++ so find_nearest_line goes looking
in the symbol table. Since the function is inlined the enclosing
non-inline function symbol is returned from _bfd_elf_find_function,
which is wrong. This patch only uses a symbol if its address matches.
PR binutils/19315
* dwarf2.c (_bfd_elf_find_function): Return symbol matched.
(_bfd_dwarf2_find_nearest_line): Check symbol returned above
against dwarf range.
* elf-bfd.h (_bfd_elf_find_function): Update prototype.
Fixes a segfault in ppc64_elf_tls_optimize found when testing
R_PPC64_ENTRY, and potential for trouble in other places found by
code inspection.
* elf64-ppc.c (ppc64_elf_tls_optimize): Don't segfault on NULL
symbol section or output section.
(ppc64_elf_edit_toc): Similarly for ld -R objects.
(ppc64_elf_size_stubs): Likewise.
Symbol defined by a linker assignment may have type bfd_link_hash_new
or bfd_link_hash_undefined. And h->def_regular is always set.
elf_i386_convert_load and elf_x86_64_convert_load should check
h->def_regular as well as bfd_link_hash_undefined and bfd_link_hash_new
to see if a symbol is defined by a linker script.
bfd/
PR ld/19319
* elf32-i386.c (elf_i386_convert_load): Check h->def_regular
instead of bfd_link_hash_new.
* elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip
relocation overflow for bfd_link_hash_undefined and
bfd_link_hash_new if h->def_regular is set.
ld/testsuite/
PR ld/19319
* ld-i386/i386.exp: Run pr19319 test.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr19319.dd: New file.
* ld-i386/pr19319a.S: Likewise.
* ld-i386/pr19319b.S: Likewise.
* ld-x86-64/pr19319.dd: Likewise.
* ld-x86-64/pr19319a.S: Likewise.
* ld-x86-64/pr19319b.S: Likewise.
info->traditional_format is available, or can be easily made
available. This relegates BFD_TRADITIONAL_FORMAT to AOUT use only.
* coff-rs6000.c (_bfd_xcoff_put_symbol_name): Replace abfd param
with info param. Test info->traditional_format rather than
BFD_TRADITIONAL_FORMAT flag.
* coff64-rs6000.c (_bfd_xcoff64_put_symbol_name): Likewise.
* libxcoff.h (struct xcoff_backend_data_rec): Update
_xcoff_put_symbol_name prototype.
(bfd_xcoff_put_symbol_name): Add info param.
* xcofflink.c (xcoff_find_tc0): Update bfd_xcoff_put_symbol_name call.
(xcoff_write_global_symbol): Likewise.
(xcoff_link_input_bfd): Test info->traditional_format rather than
BFD_TRADITIONAL_FORMAT flag.
* cofflink.c (_bfd_coff_final_link): Likewise.
(_bfd_coff_link_input_bfd, _bfd_coff_write_global_sym): Likewise.
* elf32-arc.c (ARC_ELF_HOWTO): Delete.
(arc_elf_howto): New function.
(bfd_elf32_bfd_reloc_type_lookup): Use it in place of existing
init code.
(bfd_elf32_bfd_reloc_name_lookup): Use arc_elf_howto.
(arc_info_to_howto_rel, elf_arc_relocate_section): Likwise.
(elf_arc_check_relocs): Likewise.
This initialises howto.dst_mask so that relocations in debug sections
are applied by the generic reloc processing used by objdump to display
debug sections.
* elf32-arc.c (arc_elf_howto_init): Init dst_mask.
bfd/ChangeLog:
2015-11-19 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR ld/19263
* elf32-s390.c (elf_s390_gc_sweep_hook): Add null ptr check.
* elf64-s390.c (elf_s390_check_relocs): Port the GOTOFF handling
over from the 32 bit code.
(elf_s390_relocate_section): Likewise.
bfd/
* mach-o.h (bfd_mach_o_swap_in_non_scattered_reloc)
(bfd_mach_o_canonicalize_non_scattered_reloc)
(bfd_mach_o_pre_canonicalize_one_reloc): Declare.
(bfd_mach_o_backend_data): Rename field
_bfd_mach_o_swap_reloc_in to _bfd_mach_o_canonicalize_one_reloc.
* mach-o.c (bfd_mach_o_swap_in_non_scattered_reloc): Now public.
(bfd_mach_o_canonicalize_non_scattered_reloc): Renames from
bfd_mach_o_canonicalize_one_reloc.
(bfd_mach_o_pre_canonicalize_one_reloc): New function.
(bfd_mach_o_canonicalize_relocs): Adjust.
(bfd_mach_o_canonicalize_relocs): Rename define from
bfd_mach_o_swap_reloc_in.
* mach-o-target.c (TARGET_NAME_BACKEND): Use
bfd_mach_o_canonicalize_one_reloc instead of
bfd_mach_o_swap_reloc_in.
* mach-o-i386.c (bfd_mach_o_i386_canonicalize_one_reloc): Renames
from bfd_mach_o_i386_swap_reloc_in and adjust.
(bfd_mach_o_canonicalize_one_reloc): Renames from
bfd_mach_o_i386_canonicalize_one_reloc.
* mach-o-x86_64.c (bfd_mach_o_x86_64_canonicalize_one_reloc): Renames
from bfd_mach_o_x86_64_swap_reloc_in and adjust.
(bfd_mach_o_canonicalize_one_reloc): Renames from
bfd_mach_o_x86_64_canonicalize_one_reloc.
Similar fix to "commit c316a17c40e44e8798b34ff84130904f2e7a53de".
* elf32-i386.c (elf_i386_relocate_section): Use read and write
pointers to reloc array, rather than memmove when deleting a
reloc. Don't use RELOC_AGAINST_DISCARDED_SECTION. Adjust
reloc counts at end of loop.
* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.
The idea here is that instead of using memmove to shuffle the relocs
array every time one is deleted, to add a "wrel" pointer and copy from
rel[0] to wrel[0] as we go.
* elf64-ppc.c (ppc64_elf_relocate_section): Use read and write
pointers to reloc array, rather than memmove when deleting a
reloc. Don't use RELOC_AGAINST_DISCARDED_SECTION. Adjust
reloc counts at end of loop.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise.
This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.
bfd/ChangeLog:
* elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left
shift of negative value.
* libbfd.c (safe_read_leb128): Likewise.
* dwarf2.c (place_sections): Likewise.
* bfd-in.h (align_power): Likewise.
* bfd-in2.h (align_power): Likewise.
bfd/
* elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output
section to bfd_abs_section_ptr if the stub is discarded.
ld/testsuite/
* ld-mips-elf/mips16-fp-stub-1.s: New.
* ld-mips-elf/mips16-fp-stub-2.s: New.
* ld-mips-elf/mips16-fp-stub.d: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
* ld-mips-elf/mips16-intermix.d: Update expected output.
https://sourceware.org/ml/binutils/2015-10/msg00137.html
ld * Makefile.am (ALL_64_EMULATION_SOURCES): Add support for
CloudABI on aarch64. For this target we have to make sure we use
ELFOSABI_CLOUDABI instead of ELFOSABI_NONE.
* configure.tgt (targ_emul): Likewise.
* emulparams/aarch64cloudabi.sh: New file.
* emulparams/aarch64cloudabib.sh: New file.
* Makefile.in: Regenerate.
bfd * config.bfd (targ_defvec): Add support for CloudABI on aarch64.
For this target we have to make sure we use ELFOSABI_CLOUDABI
instead of ELFOSABI_NONE.
* configure.ac (tb): Likewise.
* elfnn-aarch64.c: Likewise.
* targets.c (_bfd_target_vector): Likewise.
* configure: Regenerate.
gas * config/tc-aarch64.c (elf64_aarch64_target_format): Select the
cloudabi format if the TARGET_OS is cloudabi.
Fixes this when GDB is built in C++ mode:
In file included from /home/pedro/gdb/mygit/src/gdb/../bfd/som.h:27:0,
from /home/pedro/gdb/mygit/src/gdb/somread.c:31:
/home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h: In function ‘int bfd_hppa_insn2fmt(bfd*, int)’:
/home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:380:42: error: invalid conversion from ‘int’ to ‘hppa_opcode_type’ [-fpermissive]
#define get_opcode(insn) (((insn) >> 26) & 0x3f)
^
/home/pedro/gdb/mygit/src/gdb/../bfd/libhppa.h:465:30: note: in expansion of macro ‘get_opcode’
enum hppa_opcode_type op = get_opcode (insn);
^
bfd/ChangeLog:
2015-10-29 Pedro Alves <palves@redhat.com>
* libhppa.h (bfd_hppa_insn2fmt): Add cast.
* elf32-arm.c (create_instruction_branch_absolute): Replace
pointer parameters with a simple integer parameter.
(stm32l4xx_create_replacing_stub_ldmia): Update calls to
create_instruction_branch_absolute.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise.
(stm32l4xx_create_replacing_stub_vldm): Likewise.
(elf32_arm_write_section): Use pointer type for veneer addresses.
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.
bfd/
PR ld/19162
* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
linker input bfds..
* section.c (bfd_get_next_section_by_name): ..to here. Add ibfd param.
(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
* tekhex.c (first_phase): Likewise.
* elflink.c (bfd_elf_gc_sections): Likewise.
* bfd-in2.h: Regenerate.
ld/
PR ld/19162
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
before calling _bfd_elf_match_sections_by_type. Merge flags for
any other input sections that might match a new output section to
decide placement.
bfd * bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
STM32L4XX instruction scanning should be done.
(bfd_elf32_arm_set_stm32l4xx_fix)
(bfd_elf32_arm_stm32l4xx_erratum_scan)
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
(bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
to prototype.
* elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
(STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
(elf32_stm32l4xx_erratum_type): New enum.
(elf32_stm32l4xx_erratum_list): New struct. List of veneers or
jumps to veneers.
(_arm_elf_section_data): Add stm32l4xx_erratumcount,
stm32l4xx_erratumlist.
(elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
stm32l4xx_fix and num_stm32l4xx_fixes fields.
(ctz): New function.
(popcount): New function.
(elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
(put_thumb2_insn): New function.
(STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
LDM instructions.
(STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
VLDM instructions.
(bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
glue section.
(record_stm32l4xx_erratum_veneer) : New function. Create a single
veneer, and its associated symbols.
(bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
(bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
erratum workaround required.
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
out where veneers and branches to veneers have been placed in
virtual memory after layout.
(is_thumb2_ldmia): New function.
(is_thumb2_ldmdb): Likewise.
(is_thumb2_vldm ): Likewise.
(stm32l4xx_need_create_replacing_stub): New function. Decide if a
veneer must be emitted.
(bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
input BFD for potential erratum-triggering insns. Record results.
(bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
global hash table.
(elf32_arm_size_dynamic_sections): Collect glue information.
(create_instruction_branch_absolute): New function.
(create_instruction_ldmia): Likewise.
(create_instruction_ldmdb): Likewise.
(create_instruction_mov): Likewise.
(create_instruction_sub): Likewise.
(create_instruction_vldmia): Likewise.
(create_instruction_vldmdb): Likewise.
(create_instruction_udf_w): Likewise.
(create_instruction_udf): Likewise.
(push_thumb2_insn32): Likewise.
(push_thumb2_insn16): Likewise.
(stm32l4xx_fill_stub_udf): Likewise.
(stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
replacing stub for ldmia instructions.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
(stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
(stm32l4xx_create_replacing_stub): New function. Dispatches the
stub emission to the appropriate functions.
(elf32_arm_write_section): Output veneers, and branches to veneers.
ld * ld.texinfo: Description of the STM32L4xx erratum workaround.
* emultempl/armelf.em (stm32l4xx_fix): New.
(arm_elf_before_allocation): Choose the type of fix, scan for
erratum.
(gld${EMULATION_NAME}_finish): Fix veneer locations.
(arm_elf_create_output_section_statements): Propagate
stm32l4xx_fix value.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
(PARSE_AND_LIST_LONGOPTS): Add entry for handling
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_OPTION): Add entry for helping on
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.
tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-all.d: Likewise.
* ld-arm/stm32l4xx-fix-all.s: Likewise.
* ld-arm/stm32l4xx-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-ldm.d: Likewise.
* ld-arm/stm32l4xx-fix-ldm.s: Likewise.
* ld-arm/stm32l4xx-fix-vldm.d: Likewise.
* ld-arm/stm32l4xx-fix-vldm.s: Likewise.
* configure.ac (powerpc64-*-aix[5-9].*): Match powerpc64 running
aix for core file support.
* configure: Regenerate.
* rs6000-core.c: Check for __ld_info64 if compiling 64-bit gdb.
Added BFD64 check if we are using old core file format for 32-bit gdb.
Set sizeof CORE_COMMONSZ appropriately in case of either new or
old core file format.
(read_hdr): Added BFD64 check for 64-bit support.
(rs6000coff_core_p): Likewise.
(rs6000coff_core_file_matches_executable_p): Likewise.
(rs6000coff_core_file_failing_command): Likewise.
(rs6000coff_core_file_failing_signal): Likewise.
Add support for debugging core files generated by binaries in
Large Memory model.
(rs6000coff_core_p): If Large Memory Model is used, then the .data
segment should start from BDATAORG which has been defined in the
system header files.
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new. elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.
bfd/
PR ld/19175
* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
instead of calling bfd_link_get_defined_symbol.
* elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip
relocation overflow for bfd_link_hash_new.
* linker.c (bfd_link_get_defined_symbol): Removed.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19175
* ld-i386/i386.exp: Run pr19175.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr19175.d: New file.
* ld-i386/pr19175.s: Likewise.
* ld-i386/pr19175.t: Likewise.
* ld-x86-64/pr19175.d: Likewise.
* ld-x86-64/pr19175.s: Likewise.
* ld-x86-64/pr19175.t: Likewise.
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value. This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.
bfd/
PR ld/19171
* elf32-i386.c (elf_i386_convert_load): Call
bfd_link_get_defined_symbol to check if a symbol is defined.
* elf64-x86-64.c (elf_x86_64_convert_load): Call
bfd_link_get_defined_symbol to get defined symbol section and
value.
* linker.c (bfd_link_get_defined_symbol): New function.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19171
* ld-i386/lea1.s: Add tests for address load of __start_XXX
and __stop_XXX.
* ld-i386/mov1.s: Likewise.
* ld-x86-64/lea1.s: Likewise.
* ld-x86-64/mov1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-i386/mov1a.d: Likewise.
* ld-i386/mov1b.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
* ld-x86-64/mov1a.d: Likewise.
* ld-x86-64/mov1b.d: Likewise.
* ld-x86-64/mov1c.d: Likewise.
* ld-x86-64/mov1d.d: Likewise.
Revert bba037e0, it breaks the gc-sections model. Instead fix the
underlying problem which is that _bfd_elf_gc_mark_hook is too late to
be setting SEC_KEEP.
PR ld/11133
PR ld/19161
* elflink.c (elf_gc_sweep): Revert last patch.
(_bfd_elf_gc_mark_hook): Don't set SEC_KEEP here.
SEC_KEEP check in elf_gc_sweep was missing in commit:
commit bde6f3eb6d
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Jan 8 01:43:23 2010 +0000
Set SEC_KEEP on section XXX for undefined __start_XXX/__stop_XXX
bfd/
2010-01-07 H.J. Lu <hongjiu.lu@intel.com>
PR ld/11133
* elflink.c (_bfd_elf_gc_mark_hook): Check section XXX for
undefined __start_XXX/__stop_XXX in all input files and set
SEC_KEEP.
This patch adds SEC_KEEP check to elf_gc_sweep.
bfd/
PR ld/19161
* elflink.c (elf_gc_sweep): Always keep sections marked with
SEC_KEEP.
ld/testsuite/
PR ld/19161
* ld-gc/gc.exp: Run pr19161 test.
* ld-gc/pr19161-1.c: New file.
* ld-gc/pr19161-2.c: Likewise.
* ld-gc/pr19161.d: Likewise.
bfd:
* mmo.c (struct mmo_data_struct): New members
symbol_consistency_override_calculated and ignore_symbol_consistency.
(mmo_section_has_contents, mmo_ignore_symbol_consistency): New
functions.
(mmo_create_symbol): Check with mmo_ignore_symbol_consistency if to
report an error for unexpected value of Main.
(mmo_write_symbols_and_terminator): Similar.
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in
https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0
to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we
convert
mov foo@GOTPCREL(%rip), %reg
to
lea foo(%rip), %reg
and convert
call/jmp *foo@GOTPCREL(%rip)
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg, foo@GOTPCREL(%rip)
to
test $foo, %reg
and convert
binop foo@GOTPCREL(%rip), %reg
to
binop $foo, %reg
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf64-x86-64.c: Include opcode/i386.h.
(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
R_X86_64_REX_GOTPCRELX.
(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with
need_convert_load.
(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(elf_x86_64_size_dynamic_sections): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_convert_mov_to_lea): Renamed to ...
(elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX transformations.
* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
(tc_gen_reloc): Likewise.
(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
true for BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
gas/testsuite/
* gas/i386/i386.exp: Run x86-64-gotpcrel.
* gas/i386/x86-64-gotpcrel.d: New file.
* gas/i386/x86-64-gotpcrel.s: Likewise.
* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
R_X86_64_REX_GOTPCRELX.
* gas/i386/ilp32/x86-64-localpic.d: Likewise.
include/elf/
* x86-64.h (R_X86_64_GOTPCRELX): New.
(R_X86_64_REX_GOTPCRELX): Likewise.
ld/testsuite/
* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
with R_X86_64_REX_GOTPCRELX.
* ld-x86-64/plt-main1.rd: Likewise.
* ld-x86-64/plt-main3.rd: Likewise.
* ld-x86-64/plt-main4.rd: Likewise.
* ld-x86-64/gotpcrel1.dd: New file.
* ld-x86-64/gotpcrel1.out: Likewise.
* ld-x86-64/gotpcrel1a.S: Likewise.
* ld-x86-64/gotpcrel1b.c: Likewise.
* ld-x86-64/gotpcrel1c.c: Likewise.
* ld-x86-64/gotpcrel1d.S: Likewise.
* ld-x86-64/load1.s: Likewise.
* ld-x86-64/load1a.d: Likewise.
* ld-x86-64/load1b.d: Likewise.
* ld-x86-64/load1c.d: Likewise.
* ld-x86-64/load1d.d: Likewise.
* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
tests. Run gotpcrel1 test.
This patch adds support for the R_386_GOT32X relocation proposed in
https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I
to gas and ld. It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax". With the locally defined symbol, foo,
we convert
mov foo@GOT[(%reg1)], %reg2
to
lea foo[@GOTOFF(%reg1)], %reg2
and convert
call/jmp *foo@GOT[(%reg)]
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg1, foo@GOT[(%reg2)]
to
test $foo, %reg1
and convert
binop foo@GOT[(%reg1)], %reg2
to
binop $foo, %reg2
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf32-i386.c: Include opcode/i386.h.
(elf_howto_table): Add R_386_GOT32X.
(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_i386_check_relocs): Handle R_386_GOT32X. Replace
need_convert_mov_to_lea with need_convert_load.
(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_convert_mov_to_lea): Renamed to ...
(elf_i386_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_386_GOT32X transformations.
* reloc.c (BFD_RELOC_386_GOT32X): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_GOT32X.
(tc_gen_reloc): Likewise.
(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
"test %reg, mem" and "binop mem, %reg" where binop is one of
adc, add, and, cmp, or, sbb, sub, xor instructions. Set
fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if
BFD_RELOC_386_GOT32X should be generated.
(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
is set.
gas/testsuite/
* gas/i386/got.d: New file.
* gas/i386/got.s: Likewise.
* gas/i386/i386.exp: Run got.
* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
* gas/i386/mixed-mode-reloc32.d: Likewise.
* gas/i386/reloc32.d: Likewise.
include/elf/
* i386.h (R_386_GOT32X): New relocation.
ld/testsuite/
* ld-i386/branch1.d: New file.
* ld-i386/branch1.s: Likewise.
* ld-i386/call1.d: Likewise.
* ld-i386/call1.s: Likewise.
* ld-i386/call2.d: Likewise.
* ld-i386/call2.s: Likewise.
* ld-i386/got1.dd: Likewise.
* ld-i386/got1.out: Likewise.
* ld-i386/got1a.S: Likewise.
* ld-i386/got1b.c: Likewise.
* ld-i386/got1c.c: Likewise.
* ld-i386/got1d.S: Likewise.
* ld-i386/jmp1.d: Likewise.
* ld-i386/jmp1.s: Likewise.
* ld-i386/jmp2.d: Likewise.
* ld-i386/jmp2.s: Likewise.
* ld-i386/load1.d: Likewise.
* ld-i386/load1.s: Likewise.
* ld-i386/load2.d: Likewise.
* ld-i386/load2.s: Likewise.
* ld-i386/load3.d: Likewise.
* ld-i386/load3.s: Likewise.
* ld-i386/load4.s: Likewise.
* ld-i386/load4a.d: Likewise.
* ld-i386/load4b.d: Likewise.
* ld-i386/load5.s: Likewise.
* ld-i386/load5a.d: Likewise.
* ld-i386/load5b.d: Likewise.
* ld-i386/load6.d: Likewise.
* ld-i386/load6.s: Likewise.
* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
load1, load2, load3, load4a, load4b, load5a, load5b and load6
tests. Run got1 test.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_check_relocs): Set the non_got_ref marker
only when linking an executable.
(elf_s390_relocate_section): Redirect PC-relative relocs to a IPLT
slot.
* elf64-s390.c (elf_s390_check_relocs): Set the non_got_ref marker
only when linking an executable.
(elf_s390_relocate_section): Redirect PC-relative relocs to a IPLT
slot.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_adjust_dynamic_symbol): Set the PLT
reference counters for local IFUNC calls.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
Normally a GOTOFF reloc only uses the GOT pointer to address something
relativ to it without actually requiring a GOT or PLT slot. Things
change if the target is an ifunc symbol though.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_check_relocs): Fallthrough to the PLT
slot allocating code for GOTOFF relocs on ifunc symbols.
(elf_s390_gc_sweep_hook): Decrement plt refcount for GOTOFF relocs
on ifunc symbols.
(elf_s390_relocate_section): Redirect a GOTOFF reloc to an iplt
slot.
In order to get the ifunc relocs properly sorted the correct class
needs to be returned. The code mimics what has been done for x86.
bfd/ChangeLog:
PR ld/18841
* elf32-s390.c (elf_s390_reloc_type_class): Return
reloc_class_ifunc for ifunc symbols.
* elf64-s390.c (elf_s390_reloc_type_class): Likewise.
bfd/ChangeLog:
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Call
elf_s390_finish_ifunc_symbol only for actually defined symbols.
* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
We need to check if symbol is defined when converting mov to lea since
SYMBOL_REFERENCES_LOCAL may return true on hidden undefined symbols.
* elf32-i386.c (elf_i386_convert_mov_to_lea): Check if symbol
is defined.
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.
There is no need to check def_regular when converting mov to lea for
loading address of local symbols since def_regular may be false for
common symbols and SYMBOL_REFERENCES_LOCAL is sufficient.
bfd/
* elf32-i386.c (elf_i386_convert_mov_to_lea): Don't check
def_regular.
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Likewise.
ld/testsuite/
* ld-i386/lea1.s: Add a test for loading address of local common
symbol.
* ld-x86-64/lea1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
Calling bfd_copy_private_bfd_data is necessary to copy ELF file header
info.
binutils/
* objcopy.c (copy_object): Don't omit bfd_copy_private_bfd_data
call when extract_symbol.
bfd/
* elf32-v850.c (v850_elf_copy_private_bfd_data): Remove assertion
that input and output .note.renesas sections are same size.
Instead, only copy input to output if they are.
No functional changes here.
* elf.c (_bfd_elf_map_sections_to_segments): Don't set
PT_GNU_RELRO p_flags.
(assign_file_positions_for_non_load_sections): Set PT_GNU_RELRO
flags to PF_R here.
We may see an unversioned definition after the default version. We
should skip the unversioned definition in this case.
bfd/
PR ld/19073
* elflink.c (_bfd_elf_add_default_symbol): Skip the unversioned
definition after the default version.
ld/testsuite/
PR ld/19073
* ld-elf/pr19073.map: New file.
* ld-elf/pr19073.rd: Likewise.
* ld-elf/pr19073.s: Likewise.
* ld-elf/shared.exp (build_tests): Add tests for PR ld/19073.
bfd/ChangeLog:
2015-10-12 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR ld/19083
* elf32-s390.c (elf_s390_gc_sweep_hook): Do not reduce got
refcount for relocs not really requiring a got slot.
* elf64-s390.c (elf_s390_gc_sweep_hook): Likewise.
It is better to clear the ch_reserved field of Elf64_External_Chdr
in 64-bit output.
* bfd.c (bfd_update_compression_header): Clear the ch_reserved
field in 64-bit output.
(bfd_convert_section_contents): Likewise.
For ELF linker, a common symbol isn't a definition. When we decide if a
symbol should be re-exported, we should check if the symbol isn't
undefined, not if it is a definition.
bfd/
PR ld/18914
* elflink.c (elf_link_add_object_symbols): Don't re-export a
symbol if it isn't undefined.
ld/testsuite/
PR ld/18914
* ld-elf/exclude.exp: Also check exclude_common.
* ld-elf/exclude2.s: Add exclude_common.
bfd/
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
TLSIE_MOVW_GOTTPREL_G1.
(aarch64_tls_transition_without_check): Add
TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
transition for local symbol.
(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
with new argument.
ld/testsuite/
2015-10-02 Renlin Li <renlin.li@arm.com>
* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
* ld-aarch64/tls-relax-large-ie-le.d: New.
* ld-aarch64/tls-relax-large-ie-le.s: New.
bfd/
2015-10-02 Renlin Li <renlin.li@arm.com>
* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
(aarch64_tls_transition_without_check): Likewise
(elfNN_aarch64_tls_relax): Likwise.
ld/testsuite/
2015-10-02 Renlin Li <renlin.li@arm.com>
* ld-aarch64/aarch64-elf.exp: run new test
* ld-aarch64/tls-relax-large-gd-ie.d: New.
* ld-aarch64/tls-relax-large-gd-ie.s: New.
* ld-aarch64/tls-relax-large-gd-le.d: New.
* ld-aarch64/tls-relax-large-gd-le.s: New.
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.
bfd/
PR ld/19031
* elf64-x86-64.c (elf_x86_64_check_relocs): Set
pointer_equality_needed for R_X86_64_PC32 reloc in non-code
sections.
ld/testsuite/
PR ld/19031
* ld-x86-64/x86-64.exp: Run PR ld/19031 test.
* ld-x86-64/pr19031.out: New file.
* ld-x86-64/pr19031a.c: Likewise.
* ld-x86-64/pr19031b.S: Likewise.
* ld-x86-64/pr19031c.c: Likewise.
Since something like ".long foo - ." may be used as pointer, we make
sure that PLT is used if foo is a function defined in a shared library.
bfd/
PR ld/19031
* elf32-i386.c (elf_i386_check_relocs): Set
pointer_equality_needed for R_386_PC32 reloc in non-code
sections.
ld/testsuite/
PR ld/19031
* ld-i386/i386.exp: Run PR ld/19031 test.
* ld/testsuite/ld-i386/pr19031.out: New file.
* ld/testsuite/ld-i386/pr19031a.c: Likewise.
* ld/testsuite/ld-i386/pr19031b.S: Likewise.
* ld/testsuite/ld-i386/pr19031c.c: Likewise.
When we check consistency for merge ELF sections, we should not only
check EI_CLASS, but also compatible e_machine.
bfd/
PR ld/19013
* elflink.c (_bfd_elf_merge_sections): Only merge input bfds
that have the compatible ELF machine code with the output bfd.
ld/testsuite/
PR ld/19013
* ld-x86-64/pr19013-nacl.d: New file.
* ld-x86-64/pr19013-x32.d: Likewise.
* ld-x86-64/pr19013.d: Likewise.
* ld-x86-64/pr19013.s: Likewise.
* ld-x86-64/x86-64.exp: Run PR ld/19013 tests.
We can't allow sections to be merged and sized by the ELF linker
backend and then later be output by the generic linker backend. The
generic linker backend doesn't understand merge sections.
PR ld/19013
* elflink.c (_bfd_elf_merge_sections): Only merge input bfds that
will be handled by elf_link_input_bfd. Rename abfd param to obfd.
We can't use the output section size to copy input section since
--interleave will shrink the output section. Instead, we change
bfd_convert_section_contents to return the updated input section
size. When we do that, we don't need to adjust the output section
size to skip gap fills.
bfd/
PR binutils/19020
* bfd.c (bfd_convert_section_contents): Add ptr_size parameter.
* bfd-in2.h: Regenerated.
binutils/
PR binutils/19020
* objcopy.c (copy_object): Don't adjust the output section size
when copying from input sections.
(copy_section): Use input section size for the copy. Get the
updated section size from bfd_convert_section_contents.
binutils/testsuite/
PR binutils/19020
* binutils-all/objcopy.exp: Run pr19020a and pr19020b.
* lib/utils-lib.exp (run_dump_test): Support binary input.
* binutils-all/pr19020.in: New file.
* binutils-all/pr19020a.d: Likewise.
* binutils-all/pr19020b.d: Likewise.
gas PR ld/18759
* config/tc-or1k.c (tc_gen_reloc): Correct computation of PC
relative relocs.
* config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete.
bfd * elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE.
(R_OR1K_16_PCREL): Likewise.
(R_OR1K_8_PCREL): Likewise.
ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
binutils PR binutils/15835
* readelf.c (struct elf_section_list): New structure.
(symtab_shndx_hdr): Replace with symtab_shndx_list.
(get_32bit_elf_symbols): Scan for a symbol index table matching
the symbol table in use.
(get_64bit_elf_symbols): Likewise.
(process_section_headers): Handle multiple symbol index sections.
bfd * elf-bfd.h (struct elf_section_list): New structure.
(struct elf_obj_tdata): Replace symtab_shndx_hdr with
symtab_shndx_list. Delete symtab_shndx_section.
(elf_symtab_shndx): Replace macro with elf_symtab_shndx_list.
* elf.c (bfd_elf_get_syms): If symtab index sections are present,
scan them for the section that matches the provided symbol table.
(bfd_section_from_shdr): Record all SHT_SYMTAB_SHNDX sections.
(assign_section_numbers): Use the first symtab index table in the
list.
(_bfd_elf_compute_section_file_positions): Replace use of
symtab_shndx_hdr with use of symtab_shndx_list.
(find_section_in_list): New function.
(assign_file_postions_except_relocs): Use new function.
(_bfd_elf_copy_private_symbol_data): Likewise.
(swap_out_syms): Handle multiple symbol table index sections.
* elf32-m32c.c (m32c_elf_relax_section): Replace use of
symtab_shndx_hdr with use of symtab_shndx_list.
* elf32-rl78.c (rl78_elf_relax_section): Likewise.
* elf32-rx.c (rx_relax_section): Likewise.
* elf32-v850.c (v850_elf_relax_delete_bytes): Likewise.
* elflink.c (bfd_elf_final_link): Likewise.
The ch_type field in Elf64_External_Chdr is 4 bytes. We should use
bfd_get_32 and bfd_put_32 to access it.
* bfd.c (bfd_update_compression_header): Use bfd_put_32 on
ch_type.
(bfd_check_compression_header): Use bfd_get_32 on ch_type.
(bfd_convert_section_contents): Use bfd_get_32 and bfd_put_32
on ch_type.
bfd/ChangeLog:
* targets.c (enum bfd_flavour): Add comment.
(bfd_flavour_name): New function.
* bfd-in2.h: Regenerate.
gdb/ChangeLog:
* findvar.c (default_read_var_value) <LOC_UNRESOLVED>: Include the
kind of minimal symbol in the error message.
* objfiles.c (objfile_flavour_name): New function.
* objfiles.h (objfile_flavour_name): Declare.
gdb/testsuite/ChangeLog:
* gdb.dwarf2/dw2-bad-unresolved.c: New file.
* gdb.dwarf2/dw2-bad-unresolved.exp: New file.
Sometimes it may be of benefit to force use of the __tls_get_addr_opt
call stub even when the glibc being used during linking does not
advertise __tls_get_addr_opt.
bfd/
* elf64-ppc.h (struct ppc64_elf_params <tls_get_addr_opt>): Rename
from no_tls_get_addr_opt.
* elf64-ppc.c: Update for rename and inversion of tls_get_addr_opt.
(ppc64_elf_tls_setup): Set tls_get_addr_opt to 0 only when at
default of -1.
ld/
* emultempl/ppc64elf.em (params): Init tls_get_addr_opt field to -1.
(OPTION_TLS_GET_ADDR_OPT): Define.
(PARSE_AND_LIST_LONGOPTS): Handle --tls-get-addr-opt.
(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Likewise.
* ld.texinfo: Document --tls-get-addr-optimize and
--no-tls-get-addr-optimize.
I chose insertion sort since relocs are mostly sorted, but there is a
common case we can handle better; A run of relocs put out of order
due to not linking input files in order.
PR 18867
* elflink.c (elf_link_adjust_relocs): Modify insertion sort to
insert a run. Return status in case of malloc failure.
Adjust callers.
2015-09-15 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (elf_xtensa_be_plt_entry)
(elf_xtensa_le_plt_entry): Emit 'entry' instruction only for
windowed ABI.
(elf_xtensa_create_plt_entry): Generate 'l32r' offsets and fix
up instructions according to ABI.
Fix it so that it's compatible with the kernel and other FDPIC targets.
* elf32-sh.c (sh_elf_relocate_section): Set EF_SH_PIC flag
instead of clearing it on cross-section relocations.
(sh_elf_merge_private_data): Clear EF_SH_PIC flag by default.
This can also speedup the check as TLSDESC is the default model for
global/local dynamic that the big "||" check can finish more quickly
than putting them at the bottom.
2015-09-09 Jiong. Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
We use its PLT entry to initialize function pointer at run-time. If
there is no other usage for the PLT entry, we can generate run-time
function pointer relocations in read-write section, which can be
resolved by dynamic linker, to initialize function pointers. It avoids
the extra indirect branch overhead in PLT.
bfd/
PR ld/18900
* elf32-i386.c (elf_i386_link_hash_entry): Add
func_pointer_refcount.
(elf_i386_link_hash_newfunc): Clear func_pointer_refcount.
(elf_i386_get_local_sym_hash): Likewise.
(elf_i386_copy_indirect_symbol): Also copy
func_pointer_refcount.
(elf_i386_check_relocs): Increment func_pointer_refcount.
(elf_i386_gc_sweep_hook): Decrement func_pointer_refcount.
(elf_i386_allocate_dynrelocs): Don't create the PLT entry if
there are only function pointer relocations which can be
resolved at run-time. Keep dynanamic relocations for run-time
function pointer initialization.
(elf_i386_relocate_section): Copy dynamic function pointer
relocations.
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add
func_pointer_refcount.
(elf_x86_64_link_hash_newfunc): Clear func_pointer_refcount.
(elf_x86_64_get_local_sym_hash): Likewise.
(elf_x86_64_copy_indirect_symbol): Also copy
func_pointer_refcount.
(elf_x86_64_check_relocs): Increment func_pointer_refcount.
(elf_x86_64_gc_sweep_hook): Decrement func_pointer_refcount.
(elf_x86_64_allocate_dynrelocs): Don't create the PLT entry if
there are only function pointer relocations which can be
resolved at run-time. Keep dynanamic relocations for run-time
function pointer initialization.
(elf_x86_64_relocate_section): Copy dynamic function pointer
relocations.
ld/testsuite/
PR ld/18900
* ld-i386/i386.exp: Run tests for PR ld/18900.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr18900.out: New file.
* ld-i386/pr18900a.c: Likewise.
* ld-i386/pr18900a.c: Likewise.
* ld-i386/pr18900a.rd: Likewise.
* ld-i386/pr18900b.c: Likewise.
* ld-i386/pr18900b.rd: Likewise.
* ld-i386/pr18900c.c: Likewise.
* ld-x86-64/pr18900.out: Likewise.
* ld-x86-64/pr18900a.c: Likewise.
* ld-x86-64/pr18900a.rd: Likewise.
* ld-x86-64/pr18900b.c: Likewise.
* ld-x86-64/pr18900b.rd: Likewise.
* ld-x86-64/pr18900c.c: Likewise.
* ld-x86-64/mpx3.dd: Updated.
OPD lookup goes awry when .opd has been shuffled to remove unused
functions.
* elf64-ppc.c (ppc64_elf_maybe_function_sym): Adjust symbol value
if .opd section has been edited.
Don't emit long branch or plt branch stubs to save/restore functions.
Copy them instead. The problem is that plt branch stubs currently
trash r12, one of the parameters to some of the save/restore
functions, and there is no free register available to use instead of
r12.
6f20ed8a is prerequisite for this patch.
PR 18878
* elf64-ppc.c (ARRAY_SIZE): Define. Use throughout.
(enum ppc_stub_type): Add ppc_stub_save_res.
(struct map_stub): Add "next" and "needs_save_res".
(struct ppc_link_hash_entry): Add "save_res" flag.
(struct ppc_link_hash_table): Add "group".
(sfpr_define): Add stub_sec param. Define symbol in stub_sec if
stub_sec is non-null. Set "save_res".
(save_res_funcs): Make file scope, rename from funcs. Adjust uses.
(ppc64_elf_adjust_dynamic_symbol): Prohibit plt call to save_res syms.
(ppc_build_one_stub): Handle ppc_stub_save_res.
(ppc_size_one_stub): Set stub type to ppc_size_one_stub on finding
stub for linker defined save_res sym.
(group_sections): Init new fields of struct map_stub.
(ppc64_elf_size_stubs): Reserve space for save/restore func copy.
(ppc64_elf_build_stubs): Copy save/restore funcs to groups. Emit
alias syms too.
(ppc64_elf_relocate_section): Set destination for ppc_stub_save_res.
Sometimes these stubs don't need to change the low 16-bits of r2, so in
that case omit a useless addi r2,r2,0 insn. Also, change the get_r2off
error return from 0 to -1 since 0 is a valid return for ELFv2 -R objects.
* elf64-ppc.c (get_r2off): Return -1 on error.
(ppc_build_one_stub): Adjust for get_r2off change. Don't emit
addi r2,r2,0 on r2off stubs when the low 16-bit delta is zero.
(ppc_size_one_stub): Corresponding size changes for r2off stubs.
Add condition in test for -R objects.
Two organizational changes to the array of additional info kept for
sections.
1) Move group info into a per-group allocated struct, in preparation
for future changes that need per-group accounting.
2) Expand the array to include output sections, which simplifies
sizing and removes the need for a separate output section array.
* section.c (section_id): Make file scope.
(bfd_get_next_section_id): New function.
* elf64-ppc.c (struct map_stub): Remove toc_off field. Move decl.
(struct ppc_stub_hash_entry): Delete stub_sec and id_sec. Add
group. Update all uses.
(struct ppc_link_hash_table): Delete top_id, top_index, and
input_list. Add sec_info_arr_size. Rename stub_group to
sec_info, and make group info indirect. Update stub_group refs
throughout file.
(ppc_add_stub): Don't look for stub_sec on link_sec stub_group
entry.
(ppc_build_one_stub): Delete FIXME.
(ppc64_elf_setup_section_lists): Size htab->sec_info for all
sections, not just input sections. Don't create htab->input_list.
(ppc64_elf_next_input_section): Update to use sec_info union as
list pointer.
(PREV_SEC): Delete.
(group_sections): Pass "info" param rather than "htab". Iterate
over output sections rather than input_list. Use sec_info union
as list pointers. Alloc atruct map_stub, and return fail status.
* bfd-in2.h: Regenerate.
These int vars are really unsigned, so make them so.
* section.c (struct bfd_section): Make "id" and "index" unsigned.
* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
* elf.c (elf_map_symbols): Likewise.
* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
(ppc64_elf_setup_section_lists): Ditto for local vars.
* elf32-arm.c: Similarly to elf64-ppc.c.
* elf32-avr.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-nios2.c: Likewise.
* elfnn-aarch64.c: Likewise.
* simple.c (struct saved_offsets): Make "section_count" unsigned.
* bfd-in2.h: Regenerate.
A number of targets emit multiple relocs at a given r_offset, and
depend on those relocs staying in their original order.
PR 18867
* elflink.c (cmp_ext32l_r_offset, cmp_ext32b_r_offset): Delete.
(cmp_ext64l_r_offset, cmp_ext64b_r_offset): Delete.
(ext32l_r_offset, ext32b_r_offset, ext64l_r_offset, ext64b_r_offset):
New functions.
(elf_link_adjust_relocs): Use an insertion sort to sort relocs.
bfd PR ld/18401
* elfxx-mips.c (bfd_mips_isa_ext_mach): New function: Converts an
ISA value to a bfd machine number.
(bfd_mips_isa_ext): Update the ISA level and revision if
necessary. Use mips_mach_extends_p to decide if the ISA extension
needs to be set.
(_bfd_mips_elf_merge_private_bfd_data): Allow the ISA extension to
be inferred from the ABI setting. Set the ISA level from the
maximum of the incoming and outgoing ISA levels.
tests
* ld-mips-elf/mips-elf-flags.exp: Add more ISA conflict tests.
Belt and braces fix. Either of the changes here is sufficient to
ensure vd_nodename is initialized properly.
* elf.c (_bfd_elf_slurp_version_tables): Always init vd_nodename.
Don't copy fields not set by _bfd_elf_swap_verdef_in.
This patch done two types of cleanup:
* in aarch64_reloc_got_type and elfNN_aarch64_relocate_section
We don't need those redundant "case" check, as they can be merged
with the "default" which just "break".
* in elfNN_aarch64_gc_sweep_hook and elfNN_aarch64_check_relocs
All TLS local executable relocations and some local dynamic
relocations (those calculate module offset) actually don't need GOT
entry, so remove them from GOT entry counting.
2015-08-18 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (aarch64_reloc_got_type): Delete useless check.
(elfNN_aarch64_relocate_section): Likewise.
(elfNN_aarch64_gc_sweep_hook): Likewise.
(elfNN_aarch64_check_relocs): Likewise.
bfd/
* elf64-ppc.c (ppc64_elf_func_desc_adjust): Don't redefine .TOC.
if already defined, and set linker_def.
(ppc64_elf_set_toc): Use .TOC. value if defined other than by
the backend.
ld/
* ldexp.c (exp_fold_tree_1): Clear linker_def on symbol assignment.
To load an ELF binary with DT_TEXTREL tag, the dynamic linker calls
__mprotect on the read-only segment with PROT_READ|PROT_WRITE before
applying dynamic relocation. It leads to segfault when performing
IFUNC relocations since the read-only segment has no execute permission.
This patch changes x86 linker to issue an error for read-only segment
with dynamic IFUNC relocations. Other backends with IFUNC support
may need a similar change.
bfd/
PR ld/18801
* elf32-i386.c (elf_i386_size_dynamic_sections): Issue an error
for read-only segment with dynamic IFUNC relocations.
* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.
ld/testsuite/
PR ld/18801
* ld-i386/i386.exp: Run pr18801.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr18801.d: New file.
* ld-i386/pr18801.s: Likewise.
* ld-x86-64/pr18801.d: Likewise.
* ld-x86-64/pr18801.s: Likewise.
Since the backend elf_add_symbol_hook isn't called on local symbols,
the EI_OSABI field isn't to ELFOSABI_GNU where are local IFUNC symbols.
This patch changes the x86 backends to set has_gnu_symbols if there are
relocations against IFUNC symbols. Other backends with IFUNC support
may need a similar change.
This patch also changes the type of has_gnu_symbols from bfd_boolean to
enum elf_gnu_symbols.
bfd/
PR ld/18815
* elf-bfd.h (elf_gnu_symbols): New enum.
(elf_obj_tdata): Use elf_gnu_symbols on has_gnu_symbols.
* elf-s390-common.c (elf_s390_add_symbol_hook): Set
has_gnu_symbols to elf_gnu_symbol_any.
* elf32-arm.c (elf32_arm_add_symbol_hook): Likewise.
* elf32-m68k.c (elf_m68k_add_symbol_hook): Likewise.
* elf32-ppc.c (ppc_elf_add_symbol_hook): Likewise.
* elf32-sparc.c (elf32_sparc_add_symbol_hook): Likewise.
* elf64-ppc.c (ppc64_elf_add_symbol_hook): Likewise.
* elf64-sparc.c (elf64_sparc_add_symbol_hook): Likewise.
* lfxx-aarch64.c (_bfd_aarch64_elf_add_symbol_hook): Likewise.
* elf32-i386.c (elf_i386_check_relocs): Update has_gnu_symbols
if there are relocations against IFUNC symbols.
(elf_i386_add_symbol_hook): Don't check STT_GNU_IFUNC here.
* elf64-x86-64. (elf_x86_64_check_relocs): Update has_gnu_symbols
if there are relocations against IFUNC symbols.
(elf_x86_64_add_symbol_hook): Don't check STT_GNU_IFUNC here.
ld/testsuite/
PR ld/18815
* ld-i386/i386.exp: Run pr18815.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr18815.d: New file.
* ld-i386/pr18815.s: Likewise.
* ld-x86-64/pr18815.d: Likewise.
* ld-x86-64/pr18815.s: Likewise.
2015-08-11 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): New.
(aarch64_can_relax_tls): Use the new IS_AARCH64_TLS_RELAX_RELOC.
2015-08-11 Jiong Wang <jiong.wang@arm.com>
bfd/
* bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec".
Loose the check for symbol from ABS section.
(elfNN_aarch64_size_stubs): Pass sym_sec.
ld/testsuite/
* ld-aarch64/farcall-b-defsym.s: New test.
* ld-aarch64/farcall-bl-defsym.s: Likewise.
* ld-aarch64/farcall-b-defsym.d: New expectation.
* ld-aarch64/farcall-bl-defsym.d: Likewise.
This patch replaces the "hidden" field with the "versioned" field in
elf_link_hash_entry so that we can avoid calling strchr and strrchr if
the symbol is unversioned.
* elf-bfd.h (elf_symbol_version): New enum.
(elf_link_hash_entry): Replace hidden with versioned.
* elflink.c (_bfd_elf_merge_symbol): Don't look for symbol
version if the symbol is unversioned. Initialize versioned.
(_bfd_elf_add_default_symbol): Don't look for symbol version
if the symbol is unversioned or hidden. Initialize versioned.
(elf_collect_hash_codes): Don't look for symbol version if the
symbol is unversioned.
(elf_collect_gnu_hash_codes): Likewise.
(bfd_elf_gc_mark_dynamic_ref_symbol): Likewise.
(_bfd_elf_link_hash_copy_indirect): Check versioned instead of
hidden.
(elf_link_output_extsym): Likewise.
When copying the sh_link and sh_info fields in stripped section headers,
we also check if the sh_type, sh_flags, /sh_addralign and sh_entsize
fields of the output section match the output. Since --only-keep-debug
turns all non-debug sections into SHT_NOBITS sections, the output
SHT_NOBITS type matches any input type.
bfd/
PR binutils/18785
* elf.c (_bfd_elf_copy_private_bfd_data): When copying the
sh_link and sh_info fields in stripped section headers, we also
check if the sh_type, sh_flags, /sh_addralign and sh_entsize
fields of the output section match the output. Since
--only-keep-debug turns all non-debug sections into SHT_NOBITS
sections, the output SHT_NOBITS type matches any input type.
binutils/testsuite/
PR binutils/18785
* binutils-all/objcopy.exp: Run strip-12.
* binutils-all/strip-12.d: New file.
* binutils-all/strip-12.s: Likewise.
The hidden versioned symbol can only be merged with the versioned
symbol with the same symbol version. _bfd_elf_merge_symbol should
check the symbol version before merging the new hidden versioned
symbol with the existing symbol. _bfd_elf_link_hash_copy_indirect can't
copy any references to the hidden versioned symbol. We need to
bind a symbol locally when linking executable if it is locally defined,
hidden versioned, not referenced by shared library and not exported.
bfd/
PR ld/18720
* elflink.c (_bfd_elf_merge_symbol): Add a parameter to indicate
if the new symbol matches the existing one. The new hidden
versioned symbol matches the existing symbol if they have the
same symbol version. Update the existing symbol only if they
match.
(_bfd_elf_add_default_symbol): Update call to
_bfd_elf_merge_symbol.
(_bfd_elf_link_assign_sym_version): Don't set the hidden field
here.
(elf_link_add_object_symbols): Override a definition only if the
new symbol matches the existing one.
(_bfd_elf_link_hash_copy_indirect): Don't copy any references to
the hidden versioned symbol.
(elf_link_output_extsym): Bind a symbol locally when linking
executable if it is locally defined, hidden versioned, not
referenced by shared library and not exported. Turn on
VERSYM_HIDDEN only if the hidden vesioned symbol is defined
locally.
ld/testsuite/
PR ld/18720
* ld-elf/indirect.exp: Run tests for PR ld/18720.
* ld-elf/pr18720.out: New file.
* ld-elf/pr18720a.c: Likewise.
* ld-elf/pr18720b.c: Likewise.
* ld-elf/pr18720c.c: Likewise.
bfd * elf.c (_bfd_elf_copy_private_bfd_data): Copy the sh_link and
sh_info fields of sections whose type has been changed to
SHT_NOBITS.
bin * doc/binutils.texi: Document that the --only-keep-debug option
to strip and objcopy preserves the section headers of stripped
sections.
tests * binutils-all/objcopy.exp (keep_debug_symbols_and_check_links):
New proc. Checks that debug-info-only binaries retain the
sh_link field in stripped sections.
PR binutils/18750
* ihex.c (ihex_scan): Fixes incorrect escape sequence in error message
and stack overflow when char is signed and \200-\376 was in place of hex
digit; also fixes \377 was handled as EOF instead of "incorrect character".
(ihex_read_section): Changed for consistency.
(ihex_bad_byte): Prevent (now impossible to trigger) stack
overflow and incorrect escape sequence handling.
* srec.c (srec_bad_byte): Likewise.
* readelf.c (process_mips_specific): Fix incorrect escape
sequence handling.
It's bfd_link_info, not elf_link_hash_entry, for the old reference:
* elf32-cris.c (cris_elf_relocate_section)
(elf_cris_finish_dynamic_symbol, cris_elf_check_relocs)
(elf_cris_discard_excess_dso_dynamics): Use SYMBOLIC_BIND, not
just bfd_link_info->symbolic, to check if a symbol should be bound
symbolically.
* elf32-cris.c (cris_elf_relocate_section)
(elf_cris_finish_dynamic_symbol, cris_elf_check_relocs)
(elf_cris_discard_excess_dso_dynamics): Use SYMBOLIC_BIND, not
just h->symbolic, to check if a symbol should be bound
symbolically.
We should change the default symbol for the versioned symbol only when
not performing a relocatable link.
bfd/
PR ld/18735
* elflink.c (_bfd_elf_add_default_symbol): Add the default
symbol if not performing a relocatable link.
(elf_link_add_object_symbols): Adjust the default symbol if
not performing a relocatable link.
ld/testsuite/
PR ld/18735
* ld-elf/pr18735.d: New file.
* ld-elf/pr18735.s: Likewise.
This patch changes "ld -r" not to set link_info.executable. It
removes !info->relocatable check for info->executable and adds it
for !info->executable in elflink.c.
bfd/
* elflink.c (elf_link_add_object_symbols): Remove
!info->relocatable check for info->executable. Add
!info->relocatable check for !info->executable.
(elf_link_output_extsym): Remove
!info->relocatable check for info->executable.
ld/
* lexsup.c (parse_args): Don't set link_info.executable to
TRUE for link_info.relocatable.
Commit 23283c1b changed the layout of some bss style sections on
powerpc64, but neglected to add a page gap before the third PT_LOAD
segment created by this reording. Without a page gap we get two
PT_LOAD headers that overlap by one page in memory. That shouldn't be
allowed because the dynamic loader will load garbage from the first
page of the last segment over the last page of the previous segment.
bfd/
* elf.c (_bfd_elf_map_sections_to_segments): Do not make a new
segment for loaded sections after nonloaded sections if the
sections are on the same page.
ld/testsuite/
* ld-powerpc/elfv2so.d: Update
This should fix some build errors seen on AIX, MinGW, and possibly other
non-GNU systems too due to missing asprintf().
bfd/
* configure.in: Add asprintf and vasprintf to AC_CHECK_DECLS.
* config.in, configure: Regenerate.
Emit *GLOB_DAT instead of *RELATIVE relocs for protected data
in shared objects.
This is needed for the fix of glibc bug 17711:
https://sourceware.org/bugzilla/show_bug.cgi?id=17711
bfd:
PR ld/18705
* elfnn-aarch64.c (elf_backend_extern_protected_data): Define.
ld/testsuite:
PR ld/18705
* ld-aarch64/protected-data.d: New.
* ld-aarch64/protected-data.s: New.
* ld-aarch64/aarch64-elf.exp: Add new test.
Emit *GLOB_DAT instead of *RELATIVE relocs for protected data
in shared objects.
This is needed for the fix of glibc bug 17711:
https://sourceware.org/bugzilla/show_bug.cgi?id=17711
bfd:
PR ld/18705
* elf32-arm.c (elf_backend_extern_protected_data): Define.
ld/testsuite:
PR ld/18705
* ld-arm/protected-data.d: New.
* ld-arm/protected-data.s: New.
* ld-arm/arm-elf.exp: Add new test.
Missing symbol version section is a run-time problem only if it will
be referenced dynamically at run-time. We should skip the check for
locally defined symbol, which isn't referenced by shared library, when
linking executable.
bfd/
PR ld/18718
* elflink.c (elf_link_output_extsym): Check symbol version
section check only if not linking executable, the symbol is
referenced by shared library or not locally defined.
ld/testsuite/
PR ld/18718
* ld-elf/pr18718.c: New file.
* ld-elf/shared.exp: Run tests for PR ld/18718.
For selected targets. The testcase reveals a number of targets that
still need fixing.
bfd/
* elf32-arm.c (elf32_arm_final_link_relocate): Use SYMBOLIC_BIND to
check if a symbol should be bound symbolically.
* elf32-hppa.c (elf32_hppa_check_relocs,
elf32_hppa_adjust_dynamic_symbol, elf32_hppa_relocate_section,
elf32_hppa_finish_dynamic_symbol): Likewise.
* elf32-m68k.c (elf_m68k_check_relocs,
elf_m68k_relocate_section): Likewise.
* elf32-nios2.c (nios2_elf32_relocate_section,
nios2_elf32_check_relocs, allocate_dynrelocs): Likewise.
* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol,
elf32_tic6x_relocate_section): Likewise.
ld/testsuite/
* ld-elf/symbolic-func.s,
* ld-elf/symbolic-func.r: New test.
* ld-elf/elf.exp: Run it.
* elf.c (_bfd_elf_assign_file_positions_for_non_load): Use .rela
prefix for reloc section corresponding to rela section associated
with renamed debug section.
This function stops too soon, as I found when the hash chain happened
to contain two .debug_macro sections and a .bss section:
.debug_macro -> .bss -> .debug_macro
* section.c (bfd_get_section_by_name_if): Iterate over entire hash
chain.
For the case of MIPS n64 target and 32-bit host, the computation of
the DT_MIPS_RLD_MAP_REL tag involves sdyn->output_section->vma +
sdyn->output_offset (64-bit) being added to b (32-bit host pointer),
so losing the high part and resulting in an incorrect
DT_MIPS_RLD_MAP_REL tag, and all dynamically linked glibc tests
failing for n64. This patch fixes this (spot-tested with glibc tests;
however, I don't have a self-contained testcase for this bug).
* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections)
<DT_MIPS_RLD_MAP_REL>: Add target address to host address
difference, not to host pointer.
Bogus assembly can hit an assertion in opd_entry_value when the symbol
referenced by a function descriptor is undefined. Worse, the code
after the assert copies unitialised memory to return the code section.
This uninitialised pointer can later be dereferencd, possibly causing
a linker segmentation fault.
* elf64-ppc.c (opd_entry_value): Remove assertion. Instead,
return -1 if symbol referenced is not defined. Tidy.
We used to generate abort messages like:
internal error, aborting at .../bfd/elf64-x86-64.c line 1554 in elf_x86_64_check_relocs
We can't cut and paste "file line ???" to GDB. This patch changes those
abort messages to
internal error, aborting at .../bfd/elf64-x86-64.c:1554 in elf_x86_64_check_relocs
so that we can cut and paste "file:???" to GDB.
bfd/
* bfd.c (_bfd_abort): Replace " line " with ":" in output
message.
gas/
* messages.c (as_assert): Replace " line " with ":" in output
message.
(as_abort): Likewise.
ld/
* ldmisc.c (ld_abort): Replace " line " with ":" in output
message.
The output SHF_COMPRESSED section size is different from input if
ELF classes of input and output aren't the same. We must adjust
the section sizes as well as the compression headers in
SHF_COMPRESSED sections when converting objects between different
ELF classes.
bfd/
PR binutils/18656
* bfd.c (bfd_convert_section_size): New function.
(bfd_convert_section_contents): Likewise.
* bfd-in2.h: Regenerated.
binutils/
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/18656
* objcopy.c (setup_section): Call bfd_convert_section_size
to get the output section size.
(copy_section): Get the section size from the output section
and call bfd_get_full_section_contents to convert section
contents for output.
binutils/testsuite/
PR binutils/18656
* binutils-all/compress.exp (convert_test): New proc.
Run conversion tests between x86-64 and x32.
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.
bfd/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf32-avr.c: Add 32 bit PC relative relocation for AVR target.
gas/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
32 bit PC relative and update offset if the fixup is pc-relative.
* config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
relocs.
gas/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
* gas/avr/per-function-debugline.s: New test source.
include/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf/avr.h: Add new 32 bit PC relative relocation.
ld/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* ld-avr/gc-section-debugline.d: New test.
* ld-avr/per-function-debugline.s: Source for new test.
bfd/
* elf64-ppc.c (toc_adjusting_stub_needed): Use the symbol value
plus addend rather than the original st_value when looking up
entries in opd->adjust.
ld/testsuite/
* ld-powerpc/tocopt6-inc.s, ld-powerpc/tocopt6a.s,
ld-powerpc/tocopt6b.s, ld-powerpc/tocopt6c.s,
ld-powerpc/tocopt6.d: New test.
* ld-powerpc/powerpc.exp (ppc64elftests): Add it.
_bfd_elf_assign_file_positions_for_non_load will set the sh_size
field for .shstrtab section. There is need to initialize it in
_bfd_elf_compute_section_file_positions.
* elf.c (_bfd_elf_compute_section_file_positions): Don't
initialize sh_size for .shstrtab here.
This patch uses ELF strtab with GC and suffix merging support to create
ELF .strtab section. There is some small memory overhead to use ELF
strtab:
==14928== HEAP SUMMARY:
==14928== in use at exit: 3,276,318 bytes in 679 blocks
==14928== total heap usage: 1,544 allocs, 865 frees, 15,259,146 bytes allocated
vs.
==14936== HEAP SUMMARY:
==14936== in use at exit: 3,276,318 bytes in 679 blocks
==14936== total heap usage: 1,532 allocs, 853 frees, 15,026,402 bytes allocated
when running:
./ld-new -m elf_x86_64 -o tmpdir/ld-partial.o -r ldgram.o ldlex-wrapper.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o plugin.o ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o ldfile.o ldcref.o eelf_x86_64.o eelf32_x86_64.o eelf_i386.o eelf_iamcu.o ei386linux.o eelf_l1om.o eelf_k1om.o ldbuildid.o
The results are
[32] .strtab STRTAB 0+ 3beff8 00407a 00 0 0 1
vs
[32] .strtab STRTAB 0+ 3beff8 0041d8 00 0 0 1
It reduces the .strtab size by 350 bytes, about 2%
Saving on libc.so from glibc is much more since libc.so has many alias
symbols with the same suffix. For x32 glibc,
[82] .strtab STRTAB 0+ 81b348 0159e7 00 0 0 1
vs
[82] .strtab STRTAB 0+ 81b8bc 019e72 00 0 0 1
It reduces the .strtab size by 17547 bytes, about 16%.
bfd/
PR gas/18451
* elf-bfd.h (elf_sym_strtab): New.
(elf_link_hash_table): Add strtabcount, strtabsize and
strtab.
(_bfd_elf_stringtab_init): Removed.
* elf.c (_bfd_elf_stringtab_init): Removed.
(_bfd_elf_compute_section_file_positions): Replace
bfd_strtab_hash/_bfd_elf_stringtab_init/_bfd_stringtab_free/
_bfd_stringtab_size with
elf_strtab_hash/_bfd_elf_strtab_init/_bfd_elf_strtab_free/
_bfd_elf_strtab_size. Use _bfd_elf_strtab_add,
_bfd_elf_strtab_finalize and _bfd_elf_strtab_offset to get
st_name.
(swap_out_syms): Likewise.
* elflink.c (elf_final_link_info): Replace bfd_strtab_hash
with elf_strtab_hash. Remove symbuf, symbuf_count,
symbuf_size and shndxbuf_size.
(elf_link_flush_output_syms): Removed.
(elf_link_output_sym): Renamed to ...
(elf_link_output_symstrtab): This. Replace _bfd_stringtab_add
with _bfd_elf_strtab_add. Don't flush symbols to the file nor
swap out symbols.
(elf_link_swap_symbols_out): New.
(elf_link_output_extsym): Replace elf_link_output_sym with
elf_link_output_symstrtab.
(elf_link_input_bfd): Likewise.
(elf_final_link_free): Replace _bfd_stringtab_free with
_bfd_elf_strtab_free. Remove symbuf.
(bfd_elf_final_link): Replace _bfd_elf_stringtab_init with
_bfd_elf_strtab_init. Don't set symbuf, symbuf_count,
symbuf_size nor shndxbuf_size. Initialize strtabsize and
strtab. Initialize symshndxbuf to -1 when number of sections
>= 64K. Replace elf_link_output_sym/elf_link_output_sym with
elf_link_output_symstrtab/elf_link_output_symstrtab. Don't
call elf_link_flush_output_syms. Call _bfd_elf_strtab_finalize
and elf_link_swap_symbols_out. Replace _bfd_stringtab_size
and _bfd_stringtab_emit with _bfd_elf_strtab_size and
_bfd_elf_strtab_emit.
gas/testsuite/
PR gas/18451
* gas/elf/elf.exp: Run strtab.
* gas/elf/strtab.d: New file.
* gas/elf/strtab.s: Likewise.
ld/testsuite/
PR gas/18451
* ld-elf/strtab.d: New file.
* ld-elf/strtab.s: Likewise.
Since the .plt section and DT_PLTGOT are used by prelink to undo
prelinking for dynamic relocations, we must keep them even if there is
no PLT relocation. This patch reverted commit a3747075a.
bfd/
* elf32-i386.c (elf_i386_allocate_dynrelocs): Always allocate
space for the first .plt entry.
(elf_i386_size_dynamic_sections): Always add DT_PLTGOT for .plt
section. Add DT_PLTRELSZ, DT_PLTREL and DT_JMPREL only if
there are PLT relocations.
* elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Always
allocate space for the first .plt entry.
(elf_x86_64_size_dynamic_sections): Always add DT_PLTGOT for
.plt section. Add DT_PLTRELSZ, DT_PLTREL and DT_JMPREL only if
there are PLT relocations.
ld/testsuite/
* ld-i386/i386.exp: Run pltgot-2 for Linux targets.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pltgot-1.d: Updated.
* ld-x86-64/pltgot-1.d: Likewise.
* ld-i386/pltgot-2.d: New file.
* ld-x86-64/pltgot-2.d: Likewise.
When converting "mov foo@GOTPCREL(%rip), %reg" to "lea foo(%rip), %reg"
with R_X86_64_PC32 relocation, it may overflow if the target section
is more than 2GB away. This patch estimates distance between mov
instruction and the target section. We convert R_X86_64_GOTPCREL to
R_X86_64_PC32 only if their distance is less than 2GB.
PR ld/18591
* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Don't convert
R_X86_64_GOTPCREL to R_X86_64_PC32 if it will cause relocation
overflow.
2015-06-23 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (aarch64_readonly_dynrelocs): New function.
(elfNN_aarch64_size_dynamic_sections): Traverse hash table to check
relocations against read-only sections.
ld/testsuite/
* ld-aarch64/dt_textrel.s: New testcase.
* ld-aarch64/dt_textrel.d: New expectation file.
* ld-aarch64/aarch64-elf.exp: Run new testcase.
PR gas/18481
bfd * elf32-arm.c (R_ARM_TLS_LE32): Set the special function to NULL.
gas * config/tc-arm.c (tc_gen_reloc): Include BFD_RELOC_ARM_TLS_LE32
in the same case as BFD_RELOC_ARM_TLS_IS32.
tests * gas/arm/tls.s: Add tests of the tpoff pseudo with a local
symbol.
* gas/arm/tls.d: Update expected output.
This promotes BFD's struct elf_build_id to the generic struct bfd_build_id,
populated when an ELF or PE BFD is read.
gdb is updated to use that, and to use the build-id to find symbols for PE files
also.
There is currently no generic way to extract the build-id from an object file,
perhaps an option to objdump to do this might make sense?
On x86_64-pc-cygwin, gdb's sepdebug.exp changes:
-# of unsupported tests 1
+# of expected passes 90
I don't seem to get consistent testsuite runs on i686-linux-gnu, but there
don't appear to be any regressions.
bfd/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* elf-bfd.h : Remove struct elf_build_id.
* bfd.c : Add struct bfd_build_id.
* bfd-in2.h: Regenerate.
* elf.c (elfobj_grok_gnu_build_id): Update to use bfd_build_id.
* libpei.h: Add protoype and macros for
bfd_XXi_slurp_codeview_record.
* peXXigen.c (_bfd_XXi_slurp_codeview_record): Make public
* peicode.h (pe_bfd_read_buildid): Add.
(pe_bfd_object_p): Use pe_bfd_read_buildid().
gdb/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* build-id.c: Don't include elf-bfd.h.
(build_id_bfd_get): Use bfd_build_id.
(build_id_verify): Ditto.
* build-id.h: Ditto.
(find_separate_debug_file_by_buildid): Ditto.
* python/py-objfile.c: Don't include elf-bfd.h.
(objfpy_get_build_id) Use bfd_build_id.
(objfpy_build_id_matches, objfpy_lookup_objfile_by_build_id): Ditto.
* coffread.c: Include build-id.h.
(coff_symfile_read): Try find_separate_debug_file_by_buildid.
gdb/doc/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* gdb.texinfo (Separate Debug Files): Document that PE is also
supported.
gdb/testsuite/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* gdb.base/sepdebug.exp: Add EXEEXT where needed.
* lib/gdb.exp (get_build_id): Teach how to extract build-id from a
PE file.
* lib/future.exp (gdb_find_objdump): Add gdb_find_objdump.
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
* cofflink.c (_bfd_coff_generic_relocate_section): Revert
2014-03-26 change. Call _bfd_clear_contents for relocs against
local and global symbols defined in discarded input sections.
* elf32-msp430.c (rl78_sym_diff_handler): New function.
(msp430_howto_table): Use the new function for the SYM_DIFF reloc.
(msp430x_howto_table): Likewise.
When building a shared lib from non-PIC objects, we'll get dynamic
text relocations. These need to move with any insns we move.
Otherwise the dynamic reloc will modify the branch, resulting in
crashes and other unpleasant behaviour.
Also, ld -r --ppc476-workaround used with sufficiently aligned PIC
objects needs a fix for emitted REL16 relocs.
bfd/
* elf64-ppc.c (ppc_elf_relocate_section): Move dynamic text
relocs with insns moved by --ppc476-workaround. Correct
output of REL16 relocs.
ld/testsuite/
* ld-powerpc/ppc476-shared.s,
* ld-powerpc/ppc476-shared.lnk,
* ld-powerpc/ppc476-shared.d,
* ld-powerpc/ppc476-shared2.d: New tests.
* ld-powerpc/powerpc.exp: Run them.
BFD_RELOC_AARCH64_TLSLE_ADD_LO12 is used to generate simplest
one-instruction addressing for TLS LE model when tls size is smaller
4K. Linker need to make sure there is no TLS offset overflow.
2015-06-01 Jiong Wang <jiong.wang@arm.com>
bfd/
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Set overflow type to
complain_overflow_unsigned for BFD_RELOC_AARCH64_TLSLE_ADD_LO12.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Don't use
PGOFF for BFD_RELOC_AARCH64_TLSLE_ADD_LO12, that will mask off all
potential high overflowed bits.
ld/testsuite/
* ld-aarch64/tprel_add_lo12_overflow.s: New testcase.
* ld-aarch64/tprel_add_lo12_overflow.d: Nex expectation file.
* ld-aarch64/aarch64-elf.exp: Run new testcase.
