darkkirb/old-cross-binutils
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Author SHA1 Message Date
Frank Ch. Eigler
702968c54b * ECC (tx39) and sky changes. 
[ChangeLog]
start-sanitize-tx3904
Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: Deschedule timer event after dispatching.
	Reduce unnecessarily high timer event frequency.
	* dv-tx3904cpu.c: Ditto for interrupt event.
end-sanitize-tx3904
start-sanitize-sky
Tue Jun 16 14:12:09 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): Removed COP2 branches.
	* r5900.igen: Moved COP2 branch instructions here.
	* mips.igen: Restricted COPz == COP2 bit pattern to
	exclude COP2 branches.
end-sanitize-sky
 1998-06-16 18:13:47 +00:00
Frank Ch. Eigler
e1b5df344e * Typo fix for tx3904tmr use of configuration parameters. 
(ChangeLog entry coming later.)
 1998-06-10 08:58:42 +00:00
Frank Ch. Eigler
cc9bc93202 * Updates to tx3904 peripheral simulations for ECC. 
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 	register upon non-zero interrupt event level, clear upon zero
 	event value.
	* dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
	by passing zero event value.
	(*_io_{read,write}_buffer): Endianness fixes.
	* dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
	(deliver_*_tick): Reduce sim event interval to 75% of count interval.
	* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
	serial I/O and timer module at base address 0xFFFF0000.
 1998-06-09 16:54:09 +00:00
Frank Ch. Eigler
da040f2a6c * Early check-in of tx3904 timer sim implementation for ECC. 
It is not yet properly tested.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: New file - implements tx3904 timer.
	* dv-tx3904{irc,cpu}.c: Mild reformatting.
	* configure.in: Include tx3904tmr in hw_device list.
	* configure: Rebuilt.
	* interp.c (sim_open): Instantiate three timer instances.
	Fix address typo of tx3904irc instance.
 1998-06-04 12:43:45 +00:00