Nick Clifton
fd99574ba5
Add support for ColdFire MAC instructions and tidy up support for other m68k
...
variants.
2004-04-22 10:33:16 +00:00
Jakub Jelinek
b4781d441c
* sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
...
(fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
suffix. Use fmov*x macros, create all 3 fpsize variants in one
macro. Adjust all users.
2004-04-20 10:23:51 +00:00
Nick Clifton
91809fda2a
Treat adds and subs as a special case
2004-04-15 08:55:27 +00:00
Nick Clifton
f4453dfa0a
Fix bug parsing shigh(0xffff8000)
2004-03-30 09:29:19 +00:00
Stan Shebs
9b0de91afe
* mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
...
used.
2004-03-29 18:09:09 +00:00
Alan Modra
e20c0b3d25
* aclocal.m4: Regenerate.
...
* config.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
2004-03-19 07:02:24 +00:00
Alan Modra
a9c3619ef1
Revert "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns.
2004-03-16 11:46:15 +00:00
Alan Modra
fdd12ef3c6
opcodes/
...
* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
PPC_OPERANDS_GPR_0.
* ppc-opc.c (RA0): Define.
(RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
(RAOPT): Rename from RAO. Update all uses.
(powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi",
"stsdx", "stsdi", "lmd" and "stmd" insns.
include/opcode/
* ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines.
gas/testsuite/
Update gas/ppc/.
ld/testsuite/
Update ld-powerpc/.
2004-03-16 00:58:43 +00:00
Aldy Hernandez
2dc111b3c1
* ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
2004-03-15 19:07:39 +00:00
Alan Modra
7bfeee7be2
* sparc-dis.c (print_insn_sparc): Update getword prototype.
2004-03-15 13:36:28 +00:00
Michal Ludvig
7ffdda930b
2004-03-12 Michal Ludvig <mludvig@suse.cz>
...
* i386-dis.c (GRPPLOCK): Delete.
(grps): Detele GRPPLOCK entry.
2004-03-12 13:38:16 +00:00
Alan Modra
cc0ec05165
* i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
...
(M, Mp): Use OP_M.
(None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
(GRPPADLCK): Define.
(dis386): Use NOP_Fixup on "nop".
(dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
(twobyte_has_modrm): Set for 0xa7.
(padlock_table): Delete. Move to..
(grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
and clflush.
(print_insn): Revert PADLOCK_SPECIAL code.
(OP_E): Delete sfence, lfence, mfence checks.
* gas/i386/katmai.d: Revert last change.
2004-03-12 13:06:50 +00:00
Jakub Jelinek
4fd61dcb07
* i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
...
(INVLPG_Fixup): New function.
(PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
* opcode/i386.h (i386_optab): Remove CpuNo64 from sysenter and
sysexit.
2004-03-12 10:47:49 +00:00
Michal Ludvig
0f10071e3d
2004-03-12 Michal Ludvig <mludvig@suse.cz>
...
* gas/config/tc-i386.c (output_insn): Handle PadLock instructions.
* gas/config/tc-i386.h (CpuPadLock): New define.
(CpuUnknownFlags): Added CpuPadLock.
* include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns.
* opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
(dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
(padlock_table): New struct with PadLock instructions.
(print_insn): Handle PADLOCK_SPECIAL.
2004-03-12 10:14:29 +00:00
Alan Modra
c02908d2c0
opcodes/
...
* i386-dis.c (grps): Use clflush by default for 0x0fae/7.
(OP_E): Twiddle clflush to sfence here.
gas/testsuite/
* gas/i386/katmai.d: Adjust for clflush change.
2004-03-12 07:01:37 +00:00
Nick Clifton
d5bb7600cb
Updated German translation
2004-03-08 10:06:13 +00:00
Joern Rennecke
ae51a426eb
2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
...
opcodes:
* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
accordingly.
bfd:
* archures.c: Add bfd_mach_sh4_nommu_nofpu.
* cpu-sh.c: Ditto.
* elf32-sh.c: Ditto.
* bfd-in2.h: Regenerate.
include/elf:
* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
the most general type or the user specifically requested it.
(md_assemble): Add a new error message for when an instruction
is understood, but is not allowed due to an -isa option.
2004-03-03 18:01:49 +00:00
Richard Sandiford
676a64f422
Add fr450 support.
2004-03-01 10:11:46 +00:00
Richard Sandiford
c7a48b9ac9
cpu/
...
* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
(scutss): Change unit to I0.
(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
(mqsaths): Fix FR400-MAJOR categorization.
(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
combinations.
opcodes/
* frv-desc.c, frv-opc.c: Regenerate.
sim/frv/
* cache.c (frv_cache_init): Change fr400 cache statistics to match
the fr405.
(non_cache_access): Add missing breaks.
* interrupts.c (set_exception_status_registers): Always set EAR15
for data_access_errors.
* memory.c (fr400_check_write_address): Remove redundant alignment
check.
* model.c: Regenerate.
2004-03-01 09:42:33 +00:00
Richard Sandiford
8ae0baa268
cpu/
...
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
(rstb, rsth, rst, rstd, rstq): Delete.
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
gas/testsuite/
* gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
(rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
* gas/frv/allinsn.d: Update accordingly.
opcodes/
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
sim/frv/
* decode.c, decode.h, model.c, sem.c: Regenerate.
sim/testsuite/
* sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
* sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
2004-03-01 09:26:33 +00:00
Joern Rennecke
ce11586c0b
2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
...
* sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
Also correct mistake in the comment.
2004-02-27 14:17:36 +00:00
Joern Rennecke
6a5709a5a1
2004-02-23 Andrew Stubbs <andrew.stubbs@superh.com>
...
gas:
* tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01
nibble types to assembler.
opcodes:
* sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
ensure that double registers have even numbers.
Add REG_N_B01 for nn01 (binary 01) nibble to ensure
that reserved instruction 0xfffd does not decode the same
as 0xfdfd (ftrv).
* sh-opc.h: Add REG_N_D nibble type and use it whereever
REG_N refers to a double register.
Add REG_N_B01 nibble type and use it instead of REG_NM
in ftrv.
Adjust the bit patterns in a few comments.
2004-02-26 16:14:42 +00:00
Aldy Hernandez
e5d2b64f53
* ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
2004-02-26 03:24:44 +00:00
Aldy Hernandez
1f04b05ff5
2004-02-20 Aldy Hernandez <aldyh@redhat.com>
...
* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
2004-02-20 05:10:13 +00:00
Aldy Hernandez
2f3b870051
2004-02-20 Aldy Hernandez <aldyh@redhat.com>
...
* ppc-opc.c (powerpc_opcodes): Add m*ivor35.
2004-02-20 04:56:34 +00:00
Aldy Hernandez
f0b26da617
* ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
...
mtivor32, mtivor33, mtivor34.
2004-02-20 04:45:37 +00:00
Aldy Hernandez
23d59c56c9
2004-02-19 Aldy Hernandez <aldyh@redhat.com>
...
* ppc-opc.c: Add mfmcar.
2004-02-20 00:17:23 +00:00
Nick Clifton
34920d91a5
Apply fixes for Maverick Crunch
2004-02-18 16:28:18 +00:00
Ben Elliston
44d8648176
* m32r-dis.c: Regenerate.
2004-02-13 03:21:49 +00:00
Michael Snyder
17707c23a8
2004-01-27 Michael Snyder <msnyder@redhat.com>
...
* sh-opc.h (sh_table): "fsrra", not "fssra".
2004-01-28 00:05:47 +00:00
Nick Clifton
fe3a9bc403
Tighten constaints on a few sparc instructions
2004-01-23 12:08:24 +00:00
Jakub Jelinek
ff24f1246e
* sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
2004-01-18 23:46:32 +00:00
Alan Modra
a02a862a31
* i386-dis.c (OP_E): Print scale factor on intel mode sib when not
...
1. Don't print scale factor on AT&T mode when index missing.
2004-01-18 23:12:47 +00:00
Alexandre Oliva
d164ea7f0f
* m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
...
when loaded into XR registers.
2004-01-16 03:16:00 +00:00
Richard Sandiford
cb10e79a50
cpu/
...
* frv.cpu (UNIT): Add IACC.
(iacc-multiply-r-r): Use it.
* frv.opc (fr400_unit_mapping): Add entry for IACC.
(fr500_unit_mapping, fr550_unit_mapping): Likewise.
opcodes/
* frv-desc.h: Regenerate.
* frv-desc.c: Regenerate.
* frv-opc.c: Regenerate.
2004-01-14 10:05:00 +00:00
Michael Snyder
f532f3fa70
2004-01-13 Michael Snyder <msnyder@redhat.com>
...
* sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
2004-01-13 19:56:46 +00:00
Paul Brook
e45d06306f
* gas/config/tc-arm.c (do_vfp_reg2_from_sp2): Rename from
...
do_vfp_sp_reg2.
(do_vfp_sp2_from_reg2): New function.
(insns): Use them.
(do_vfp_dp_from_reg2): Check return values properly.
* opcodes/arm-opc.h (arm_opcodes): Move generic mcrr after known
specific opcodes.
* gas/testsuite/gas/arm/vfp2.s, gas/arm/vfp2.d: New test.
* gas/testsuite/gas/arm/arm.exp: Add them.
2004-01-09 11:53:16 +00:00
Daniel Jacobowitz
3ba7a1aacf
* Makefile.am (libopcodes_la_DEPENDENCIES)
...
(libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
comment about the problem.
* Makefile.in: Regenerate.
2004-01-07 18:39:40 +00:00
Alexandre Oliva
ba2d3f07f2
2003-12-19 Alexandre Oliva <aoliva@redhat.com>
...
* frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
cut&paste errors in shifting/truncating numerical operands.
2003-08-04 Alexandre Oliva <aoliva@redhat.com>
* frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
(parse_uslo16): Likewise.
(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
(parse_d12): Parse gotoff12 and gotofffuncdesc12.
(parse_s12): Likewise.
2003-08-04 Alexandre Oliva <aoliva@redhat.com>
* frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
(parse_uslo16): Likewise.
(parse_uhi16): Parse gothi and gotfuncdeschi.
(parse_d12): Parse got12 and gotfuncdesc12.
(parse_s12): Likewise.
2004-01-06 19:18:43 +00:00
Nick Clifton
3ab4893121
Catch a bug in the msp430 disassembler where an add instruction was confused
...
with an rla instruction. Add a test for this to the testsuite.
2004-01-02 17:26:11 +00:00
Alan Modra
c9e214e571
Split ChangeLog files.
2004-01-02 11:16:21 +00:00
Christian Groessler
a0bd404eac
* z8k-dis.c (intr_names): Removed.
...
(print_intr, print_flags): New functions.
(unparse_instr): Use new functions.
2003-12-15 22:01:43 +00:00
Nick Clifton
a711c44f29
Add PIPE_O attribute to "pop" instruction.
2003-12-15 12:19:13 +00:00
Mark Mitchell
1ea5b9f8d1
* arm-opc.h (arm_opcodes): Put V6 instructions before XScale
...
instructions.
2003-12-15 05:01:41 +00:00
Hans-Peter Nilsson
8b1ddfd7d1
* mmix-opc.c (mmix_opcodes): Use GO_INSN_BYTE, PUSHGO_INSN_BYTE,
...
SETL_INSN_BYTE, INCH_INSN_BYTE, INCMH_INSN_BYTE, INCML_INSN_BYTE
and SWYM_INSN_BYTE instead of raw numbers.
2003-12-13 14:56:24 +00:00
Zack Weinberg
1f6c9eb084
opcodes:
...
* ppc-opc.c (MO): Make optional.
(RAO, RSO, SHO): New optional forms of RA, RS, SH operands.
(tlbwe): Accept for both PPC403 and BOOKE. Make all operands optional.
gas:
* tc-ppc.c (md_assemble): Rewrite comment about optional operands
to indicate that 'all or none' is also handled. Pluralize a
word in another comment.
gas/testsuite:
* gas/ppc/booke.s: Add two more forms of the mbar instruction
and three forms of the tlbwe instruction.
* gas/ppc/booke.d: Update to match.
2003-12-10 22:12:50 +00:00
Mark Mitchell
09d92015d3
* gas/arm/arm.exp: Add archv6 and thumbv6.
...
* gas/arm/archv6.d: New file.
* gas/arm/archv6.s: Likewise.
* gas/arm/thumbv6.d: Likewise.
* gas/arm/thumbv6.s: Likewise.
Add V6 support.
* config/tc-arm.c (ARM_EXT_V6): New macro.
(ARM_ARCH_V6): Likewise.
(SHIFT_IMMEDIATE): Likewise.
(SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise.
(SHIFT_ASR_IMMEDIATE): Likewise.
(SHIFT_LSL_IMMMEDIATE): Likewise.
(do_cps): New function.
(do_cpsi): Likewise.
(do_ldrex): Likewise.
(do_pkhbt): Likewise.
(do_pkhtb): Likewise.
(do_qadd16): Likewise.
(do_rev): Likewise.
(do_rfe): Likewise.
(do_sxtah): Likewise.
(do_sxth): Likewise.
(do_setend): Likewise.
(do_smlad): Likewise.
(do_smlald): Likewise.
(do_smmul): Likewise.
(do_ssat): Likewise.
(do_usat): Likewise.
(do_srs): Likewise.
(do_ssat16): Likewise.
(do_usat16): Likewise.
(do_strex): Likewise.
(do_umaal): Likewise.
(do_cps_mode): Likewise.
(do_cps_flags): Likewise.
(do_endian_specifier): Likewise.
(do_pkh_core): Likewise.
(do_sat): Likewise.
(do_sat16): Likewise.
(insns): Add V6 instructions.
(do_t_cps): New function.
(do_t_cpy): Likewise.
(do_t_setend): Likewise.
(THUMB_CPY): New macro.
(tinsns): Add V6 instructions.
(decode_shift): Handle V6 restricted-shift options.
(thumb_mov_compare): Support CPY.
(arm_cores): Add arm1136js and arm1136jfs.
(arm_archs): Add armv6.
(arm_fpus): Add arm1136jfs.
* doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and
armv6 options.
* gas/arm/arm.exp: Add archv6 and thumbv6.
* gas/arm/archv6.d: New file.
* gas/arm/archv6.s: Likewise.
* gas/arm/thumbv6.d: Likewise.
* gas/arm/thumbv6.s: Likewise.
* arm-dis.c (print_arm_insn): Add 'W' macro.
* arm-opc.h (arm_opcodes): Add V6 instructions.
(thumb_opcodes): Likewise.
2003-12-06 01:25:29 +00:00
Michael Snyder
2469ef8b79
2003-12-02 Alexandre Oliva <aoliva@redhat.com>
...
* sh-opc.h: Add support for sh4a and no-fpu variants.
* sh-dis.c: Ditto.
2003-12-05 22:16:11 +00:00
Michael Snyder
aeadede63f
2003-12-02 Alexandre Oliva <aoliva@redhat.com>
...
* sh-opc.h: Add support for sh4a and no-fpu variants.
* sh-dis.c: Ditto.
2003-12-05 02:02:32 +00:00
Alan Modra
8f8077465d
* openrisc-asm.c: Regenerate.
...
* pj-opc.c: Update copyright date.
2003-12-04 11:07:22 +00:00