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4131 commits

Author SHA1 Message Date
Max Filippov
b76f99d702 xtensa: optimize trampolines relaxation
Currently every fixup in the current segment is checked when relaxing
trampoline frag. This is very expensive. Make a searchable array of
fixups pointing at potentially oversized jumps at the beginning of every
relaxation pass and only check subset of this cache in the reach of
single jump from the trampoline frag currently being relaxed.

Original profile:

% time    self  children    called     name
-----------------------------------------
        370.16  593.38 12283048/12283048     relax_segment
  98.4  370.16  593.38 12283048         xtensa_relax_frag
         58.91  269.26 2691463834/2699602236     xtensa_insnbuf_from_chars
         68.35   68.17 811266668/813338977     S_GET_VALUE
         36.85   29.51 2684369246/2685538060     xtensa_opcode_decode
         28.34    8.84 2684369246/2685538060     xtensa_format_get_slot
         12.39    5.94 2691463834/2699775044     xtensa_format_decode
          0.03    4.60 4101109/4101109     relax_frag_for_align
          0.18    1.76  994617/994617      relax_frag_immed
          0.07    0.09 24556277/24851220     new_logical_line
          0.06    0.00 12283048/14067410     as_where
          0.04    0.00 7094588/15460506     xtensa_format_num_slots
          0.00    0.00       1/712477      xtensa_insnbuf_alloc
-----------------------------------------

Same data, after optimization:

% time    self  children    called     name
-----------------------------------------
          0.51    7.47 12283048/12283048     relax_segment
  58.0    0.51    7.47 12283048         xtensa_relax_frag
          0.02    4.08 4101109/4101109     relax_frag_for_align
          0.18    1.39  994617/994617      relax_frag_immed
          0.01    0.98     555/555         xtensa_cache_relaxable_fixups
          0.21    0.25 7094588/16693271     xtensa_insnbuf_from_chars
          0.06    0.12 24556277/24851220     new_logical_line
          0.06    0.00 7094588/15460506     xtensa_format_num_slots
          0.02    0.04 7094588/16866079     xtensa_format_decode
          0.05    0.00 12283048/14067410     as_where
          0.00    0.00       1/712477      xtensa_insnbuf_alloc
          0.00    0.00   93808/93808       xtensa_find_first_cached_fixup
-----------------------------------------

2015-05-02  Max Filippov  <jcmvbkbc@gmail.com>
gas/
	* config/tc-xtensa.c (cached_fixupS, fixup_cacheS): New typedefs.
	(struct cached_fixup, struct fixup_cache): New structures.
	(fixup_order, xtensa_make_cached_fixup),
	(xtensa_realloc_fixup_cache, xtensa_cache_relaxable_fixups),
	(xtensa_find_first_cached_fixup, xtensa_delete_cached_fixup),
	(xtensa_add_cached_fixup): New functions.
	(xtensa_relax_frag): Cache fixups pointing at potentially
	oversized jumps at the beginning of every relaxation pass. Only
	check subset of this cache in the reach of single jump from the
	trampoline frag currently being relaxed.
2015-05-05 07:57:33 +03:00
DJ Delorie
d62de9aa69 Fix typos in previous patch.
* config/rl78-parse.y (MULU): Remove ISA_G14.
(MULH, DIVHU, DIVWU, MACHI, MACH): Update error strings.
2015-05-01 15:08:07 -04:00
H.J. Lu
00923338de Remove i386_elf_emit_arch_note
This x86 assembler patch:

https://sourceware.org/ml/binutils/2001-11/msg00344.html

generates a .note section for .arch directive so that GDB can tell which
architecture an i386 binary belongs:

https://sourceware.org/ml/binutils/2001-11/msg00271.html

However, x86 assembly code can have any instructions.  A .note section
doesn't help.  This patch removes it.

gas/

	* config/tc-i386.c (i386_elf_emit_arch_note): Removed.
	* config/tc-i386.h (md_end): Likewise.
	(i386_elf_emit_arch_note): Likewise.

gas/testsuite/

	* gas/i386/i386.exp: Run note.
	* gas/i386/note.d: New file.
	* gas/i386/note.s: Likewise.
2015-05-01 08:29:16 -07:00
DJ Delorie
0952813b0b Make RL78 disassembler and simulator respect ISA for mul/div
[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
2015-04-30 15:25:49 -04:00
H.J. Lu
b49f93f699 Use "else if" on cpu_arch_isa
* config/tc-i386.c (i386_target_format): Use "else if" on
	cpu_arch_isa.
2015-04-30 08:36:17 -07:00
Nick Clifton
8b2d793ce5 GAS ARM: Warn if the user creates a symbol with the same name as an instruction.
PR gas/18347
gas	* config/tc-arm.c (md_undefined_symbol): Issue a warning message
	(if enabled) when the user creates a symbol with the same name as
	an ARM instruction.
	(flag_warn_syms): New static variable.
	(arm_opts): Add mwarn-syms and mno-warn-syms.
	* doc/c-arm.texi (ARM Options): Document the -m[no-]warn-syms
	options.

tests	* gas/arm/pr18347.s: New file: Test case.
	* gas/arm/pr18347.l: New file: Expected assembler output.
	* gas/arm/pr18347.d: New file: Test driver.
2015-04-30 11:17:55 +01:00
Nick Clifton
99b2a2dd3c Fix an internal error in GAS when assembling a bogus piece of source code.
gas	PR 18256
	* config/tc-arm.c (encode_arm_cp_address): Issue an error message
	if the operand is neither a register nor a vector.

tests	* gas/arm/pr18256.s: New file: Test case.
	* gas/arm/pr18256.l: New file: Expected assembler output.
	* gas/arm/pr18256.d: New file: Test driver.
2015-04-29 17:09:05 +01:00
Renlin Li
f9c1b181a7 [ARM]Positively emit symbols for alignment
2015-04-28  Renlin Li  <renlin.li@arm.com>
  gas/
    * config/tc-arm.c (arm_init_frag): Always emit mapping symbols.

  gas/testsuite/
    * gas/arm/thumb2_vpool_be.d: Adjust the desired output.
    * gas/arm/vldconst_be.d: Ditto.
2015-04-28 17:10:26 +01:00
Renlin Li
eb9d6cc91a [AArch64] Don't try to align insn in non-executale section
2015-04-27  Renlin Li  <renlin.li@arm.com>

  gas/
    * config/tc-aarch64.c (s_aarch64_inst): Don't align code for non-text
    section.
    (md_assemble): Likewise, move the align code outside the loop.
2015-04-27 11:36:12 +01:00
Jim Wilson
faade85139 gas thunderx support
gas/
* config/tc-aarch64.c (aarch64_cpus): Add CRC and CRYPTO features
for thunderx.
2015-04-24 13:44:20 -07:00
Richard Earnshaw
7a5c933c7c [ARM]: Don't tail-pad over-aligned functions to the alignment boundary.
2015-04/24  Richard Earnshaw  <rearnsha@arm.com>

	gas/
	* config/tc-arm.h (arm_min): New function.
	(SUB_SEGMENT_ALIGN): Define.

	gas/testsuite/
	* gas/arm/align64.d: Delete trailing padding NOPs.

	ld/testsuite/
	* ld-arm/armthumb-lib.d: Regenerate expected output.
	* ld-arm/armthumb-lib.d: Likewise.
	* ld-arm/armthumb-lib.sym: Likewise.
	* ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-b-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-b.d: Likewise.
	* ld-arm/cortex-a8-fix-bcc-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-bcc.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-plt.d: Likewise.
	* ld-arm/cortex-a8-fix-bl-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-bl.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-bcond.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-rel-arm.d: Likewise.
	* ld-arm/cortex-a8-fix-blx-rel-thumb.d: Likewise.
	* ld-arm/cortex-a8-fix-blx.d: Likewise.
	* ld-arm/cortex-a8-fix-hdr.d: Likewise.
	* ld-arm/farcall-mixed-app-v5.d: Likewise.
	* ld-arm/farcall-mixed-app.d: Likewise.
	* ld-arm/farcall-mixed-lib-v4t.d: Likewise.
	* ld-arm/farcall-mixed-lib.d: Likewise.
	* ld-arm/mixed-app-v5.d: Likewise.
	* ld-arm/mixed-app.d: Likewise.
	* ld-arm/mixed-lib.d: Likewise.
2015-04-24 15:54:39 +01:00
Matthew Fortune
ece794d9c4 Improve warning messages for la/dla
gas/

	* config/tc-mips.c (macro): State the recommended way of creating
	32-bit or 64-bit addresses.

gas/testsuite/

	* gas/mips/dla-warn.l: New file.
	* gas/mips/dla-warn.s: New file.
	* gas/mips/la-warn.l: New file.
	* gas/mips/la-warn.s: New file.
	* gas/mips/mips.exp: Run new tests.
2015-04-23 22:23:17 +01:00
Jan Beulich
af508cb92f x86: don't require operand size specification for AVX512 broadcasts
Certain conversion operations as well as vfpclassp{d,s} are ambiguous
when the input operand is in memory. That ambiguity, however, doesn't
apply when using broadcasts (the destination operand size can be
induced from the broadcast specifier).

gas/
2015-04-23  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (match_mem_size): Also allow no size
	specification when broadcasting.

gas/testsuite/
2015-04-23  Jan Beulich  <jbeulich@suse.com>

	* gas/i386/avx512dq.s: Drop 'z' suffix from vfpclassp{d,s} in
	some AT&T and all Intel cases.
	* gas/i386/x86-64-avx512dq.s: Likewise.
	* gas/i386/avx512dq_vl.s: Drop 'x' and 'y' suffixes from
	vcvt{,u}qq2ps and vfpclassp{d,s} in some AT&T and all Intel
	cases.
	* gas/i386/x86-64-avx512dq_vl.s: Likewise.
	* gas/i386/avx512f_vl.s: Drop 'x' and 'y' suffixes from
	vcvt{,t}pd2{,u}dq and vcvtpd2ps in some AT&T and all Intel
	cases.
	* gas/i386/x86-64-avx512f_vl.s: Likewise.
2015-04-23 16:41:21 +02:00
Senthil Kumar Selvaraj
ef7a936968 Fix avr compiler warning
declaration of "link" shadows a global declaration

	* config/tc-avr.c (create_record_for_frag): Rename link to
	prop_rec_link.
2015-04-17 21:01:28 +09:30
Nick Clifton
6ff71e7681 Adds support to the RL78 port for linker relaxation affecting .debug sections.
gas	* config/tc-rl78.h (TC_LINKRELAX_FIXUP): Define.
	(TC_FORCE_RELOCATION_SUB_SAME): Define.
	(DWARF2_USE_FIXED_ADVANCE_PC): Define.

	* gas/lns/lns.exp: Add RL78 to list of targets using
	DW_LNS_fixed_advance_pc.

bfd	* elf32-rl78.c (RL78_OP_REL): New macro.
	(rl78_elf_howto_table): Use it for complex relocs.
	(get_symbol_value): Handle the cases when the info or status
	arguments are NULL.
	(get_romstart): Cache the status returned by get_symbol_value.
	(get_ramstart): Likewise.
	(RL78_STACK_PUSH): Generate an error message if the stack
	overflows.
	(RL78_STACK_POP): Likewise for underflows.
	(rl78_compute_complex_reloc): New function.  Contains the basic
	processing code for all RL78 complex relocs.
	(rl78_special_reloc): New function.  Provides special reloc
	handling for complex relocs.
	(rl78_elf_relocate_section): Use rl78_compute_complex_reloc.
	(rl78_offset_for_reloc): Likewise.

binutils* readelf.c (target_specific_reloc_handling): Add code to handle
	RL78 complex relocs.
2015-04-14 16:23:33 +01:00
Nick Clifton
3525236c57 Add support to the RX toolchain to restrict the use of string instructions.
bfd	* elf32-rx.c (describe_flags): Report the settings of the string
	insn using bits.
	(rx_elf_merge_private_bfd_data): Handle merging of the string insn
	using bits.

bin	* readelf.c (get_machine_flags): Report the setting of the string
	insn using bits.

gas	* config/tc-rx.c (enum options): Add OPTION_DISALLOW_STRING_INSNS.
	(md_longopts): Add -mno-allow-string-insns.
	(md_parse_option): Handle -mno-allow-string-insns.
	(md_show_usage): Mention -mno-allow-string-insns.
	(rx_note_string_insn_use): New function.  Produces an error
	message if a string insn is used when it is not allowed.
	* config/rx-parse.y (SCMPU): Call rx_note_string_insn_use.
	(SMOVU, SMOVB, SMOVF, SUNTIL, SWHILE, RMPA): Likewise.
	* config/rx-defs.h (rx_note_string_insn_use): Prototype.
	* doc/c-rx.texi: Document -mno-allow-string-insns.

elf	* rx.h (E_FLAG_RX_SINSNS_SET): New bit in e_flags field.
	(E_FLAG_RX_SINSNS_YES): Likewise.
	(E_FLAG_RX_SINSNS_MASK): New define.
2015-04-09 12:48:37 +01:00
H.J. Lu
151411f8af Add SHF_COMPRESSED support to gas and objcopy
This patch adds --compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}
options to gas and objcopy for ELF files. They control how DWARF debug
sections are compressed.  --compress-debug-sections=none is equivalent to
--nocompress-debug-sections.  --compress-debug-sections=zlib and
--compress-debug-sections=zlib-gnu are equivalent to
--compress-debug-sections.  --compress-debug-sections=zlib-gabi compresses
DWARF debug sections with SHF_COMPRESSED from the ELF ABI.  No linker
changes are required to support SHF_COMPRESSED.

bfd/

	* archive.c (_bfd_get_elt_at_filepos): Also copy BFD_COMPRESS_GABI
	bit.
	* bfd.c (bfd::flags): Increase size to 18 bits.
	(BFD_COMPRESS_GABI): New.
	(BFD_FLAGS_SAVED): Add BFD_COMPRESS_GABI.
	(BFD_FLAGS_FOR_BFD_USE_MASK): Likewise.
	(bfd_update_compression_header): New fuction.
	(bfd_check_compression_header): Likewise.
	(bfd_get_compression_header_size): Likewise.
	(bfd_is_section_compressed_with_header): Likewise.
	* compress.c (MAX_COMPRESSION_HEADER_SIZE): New.
	(bfd_compress_section_contents): Return the uncompressed size if
	the full section contents is compressed successfully.  Support
	converting from/to .zdebug* sections.
	(bfd_get_full_section_contents): Call
	bfd_get_compression_header_size to get compression header size.
	(bfd_is_section_compressed): Renamed to ...
	(bfd_is_section_compressed_with_header): This.  Add a pointer
	argument to return compression header size.
	(bfd_is_section_compressed): Use it.
	(bfd_init_section_decompress_status): Call
	bfd_get_compression_header_size to get compression header size.
	Return FALSE if uncompressed section size is 0.
	* elf.c (_bfd_elf_make_section_from_shdr): Support converting
	from/to .zdebug* sections.
	* bfd-in2.h: Regenerated.

binutils/

	* objcopy.c (do_debug_sections): Add compress_zlib,
	compress_gnu_zlib and compress_gabi_zlib.
	(copy_options): Use optional_argument on compress-debug-sections.
	(copy_usage): Update --compress-debug-sections.
	(copy_file): Handle compress_zlib, compress_gnu_zlib and
	compress_gabi_zlib.
	(copy_main): Handle
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* doc/binutils.texi: Document
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.

binutils/testsuite/

	* compress.exp: Add tests for
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* binutils-all/dw2-3.rS: New file.
	* binutils-all/dw2-3.rt: Likewise.
	* binutils-all/libdw2-compressedgabi.out: Likewise.

gas/

	* as.c (show_usage): Update --compress-debug-sections.
	(std_longopts): Use optional_argument on compress-debug-sections.
	(parse_args): Handle
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* as.h (compressed_debug_section_type): New.
	(flag_compress_debug): Change type to compressed_debug_section_type.
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.
	* write.c (compress_debug): Set BFD_COMPRESS_GABI for
	--compress-debug-sections=zlib-gabi.  Call
	bfd_get_compression_header_size to get compression header size.
	Don't rename section name for --compress-debug-sections=zlib-gabi.
	* config/tc-i386.c (compressed_debug_section_type): Set to
	COMPRESS_DEBUG_ZLIB.
	* doc/as.texinfo: Document
	--compress-debug-sections={none|zlib|zlib-gnu|zlib-gabi}.

gas/testsuite/

	* gas/i386/dw2-compressed-1.d: New file.
	* gas/i386/dw2-compressed-2.d: Likewise.
	* gas/i386/dw2-compressed-3.d: Likewise.
	* gas/i386/x86-64-dw2-compressed-2.d: Likewise.
	* gas/i386/i386.exp: Run dw2-compressed-2, dw2-compressed-1,
	dw2-compressed-3 and x86-64-dw2-compressed-2.

ld/testsuite/

	* ld-elf/compress.exp: Add a test for
	--compress-debug-sections=zlib-gabi.
	(build_tests): Add 2 tests for --compress-debug-sections=zlib-gabi.
	(run_tests): Likewise.
	Verify linker output with zlib-gabi compressed debug input.
	* ld-elf/compressed1a.d: New file.
	* ld-elf/compressed1b.d: Likewise.
	* ld-elf/compressed1c.d: Likewise.
2015-04-08 07:54:09 -07:00
Renlin Li
a97902de74 [AArch64] use subseg_text_p to check .text
2015-04-07  Renlin Li  <renlin.li@arm.com>

gas/
  * config/tc-aarch64.c (mapping_state): Use subseg_text_p.
  (s_aarch64_inst): Likewise.
  (md_assemble): Likewise.
2015-04-07 18:10:33 +01:00
Nick Clifton
f66adc4ead Second fix for microblaze gas port's ability to parse constants.
PR gas/18189
	* config/tc-microblaze.c (parse_imm): Use offsetT as the type for
	min and max parameters.  Sign extend values before testing.
2015-04-02 17:13:12 +01:00
Nick Clifton
03e080386e Fixes a bug in the microblaze assembler where it would not complain about constants larger than 32-bits.
PR gas/18189
	* config/tc-microblaze.c (parse_imm): Use offsetT as the type for
	min and max parameters.
2015-04-02 16:10:06 +01:00
Renlin Li
c1baaddf88 [AArch64] Emit DATA_MAP in order within text section
2015-03-27  Renlin Li  <renlin.li@arm.com>

gas/
  * config/tc-aarch64.c (mapping_state): Emit MAP_DATA within text section in order.
  (mapping_state_2): Don't emit MAP_DATA here.
  (s_aarch64_inst): Align frag during state transition.
  (md_assemble): Likewise.
2015-04-02 14:59:45 +01:00
Ed Maste
726e626a7b Remove unused functions in tc-aarch64.c.
* config/tc-aarch64.c (set_error_kind): Delete.
	(set_error_message): Delete.
2015-04-02 14:44:59 +01:00
Evandro Menezes
2412d87834 [AArch64] Add support for the Samsung Exynos M1 processor
2015-03-26  Evandro Menezes  <e.menezes@samsung.com>

gas/
	* config/tc-aarch64.c: Add support for Samsung Exynos M1.
	* doc/c-aarch64.texi (-mcpu=): Add "exynos-m1".
2015-04-01 21:00:41 +00:00
Evandro Menezes
246496bb65 [ARM] Add support for the Samsung Exynos M1 processor
2015-03-26  Evandro Menezes  <e.menezes@samsung.com>

gas/
	* config/tc-arm.c: Add support for Samsung Exynos M1.
	* doc/c-arm.texi (-mcpu=): Add "exynos-m1".
2015-04-01 20:58:16 +00:00
H.J. Lu
e04de5e3b5 Remove the unused cpu_flags_set
* config/tc-i386.c (cpu_flags_set): Removed.
2015-03-27 09:29:05 -07:00
Renlin Li
bb383c6cf1 [AARCH64]Fix "align directive causes MAP_DATA symbol to be lost"
gas/ChangeLog:

2015-03-25  Renlin Li  <renlin.li@arm.com>

  * config/tc-aarch64.c (mapping_state): Remove first MAP_DATA emitting code.
  (mapping_state_2): Emit first MAP_DATA symbol here.
2015-03-25 12:33:07 +00:00
Terry Guo
823d25713d Extend arm_feature_set struct to provide more bits
gas/ChangeLog:
2015-03-24  Terry Guo  <terry.guo@arm.com>

	* config/tc-arm.c (no_cpu_selected): Use new macro to compare
	features.
	(parse_psr): Likewise.
	(do_t_mrs): Likewise.
	(do_t_msr): Likewise.
	(static const arm_feature_set arm_ext_*): Defined with new
	macros.
	(static const arm_feature_set arm_cext_*): Likewise.
	(static const arm_feature_set fpu_fpa_ext_*): Likewise.
	(static const arm_feature_set fpu_vfp_ext_*): Likewise.
	(deprecated_coproc_regs): Likewise.
	(UL_BARRIER): Likewise.
	(barrier_opt_names): Likewise.
	(arm_cpus): Likewise.
	(arm_extensions): Likewise.

include/opcode/ChangeLog:
2015-03-24  Terry Guo  <terry.guo@arm.com>

	* arm.h (arm_feature_set): Extended to provide more available
	* bits.
	(ARM_ANY): Updated to follow above new definition.
	(ARM_CPU_HAS_FEATURE): Likewise.
	(ARM_CPU_IS_ANY): Likewise.
	(ARM_MERGE_FEATURE_SETS): Likewise.
	(ARM_CLEAR_FEATURE): Likewise.
	(ARM_FEATURE): Likewise.
	(ARM_FEATURE_COPY): New macro.
	(ARM_FEATURE_EQUAL): Likewise.
	(ARM_FEATURE_ZERO): Likewise.
	(ARM_FEATURE_CORE_EQUAL): Likewise.
	(ARM_FEATURE_LOW): Likewise.
	(ARM_FEATURE_CORE_LOW): Likewise.
	(ARM_FEATURE_CORE_COPROC): Likewise.

opcodes/ChangeLog:
2015-03-24  Terry Guo  <terry.guo@arm.com>

	* arm-dis.c (opcode32): Updated to use new arm feature struct.
	(opcode16): Likewise.
	(coprocessor_opcodes): Replace bit with feature struct.
	(neon_opcodes): Likewise.
	(arm_opcodes): Likewise.
	(thumb_opcodes): Likewise.
	(thumb32_opcodes): Likewise.
	(print_insn_coprocessor): Likewise.
	(print_insn_arm): Likewise.
	(select_arm_features): Follow new feature struct.
2015-03-24 14:08:08 +08:00
H.J. Lu
80b8656cba Limit multi-byte nop instructions to 10 bytes
There is no performance advantage to use multi-byte nop instructions
greater than 10 bytes.  This patch limits multi-byte nop instructions
to 10 bytes.  Since there is only one way to encode multi-byte nop
instructions now, it also removed redundant nop tests.

gas/

	* config/tc-i386.c (i386_align_code): Limit multi-byte nop
	instructions to 10 bytes.

gas/testsuite/

	* gas/i386/i386.exp: Don't run nops-1-bdver1, nops-1-bdver2,
	nops-1-bdver3, nops-1-bdver4, nops-1-znver1, nops-1-btver1
	nops-1-btver2, x86-64-nops-1-nocona, x86-64-nops-1-bdver1,
	x86-64-nops-1-bdver2, x86-64-nops-1-bdver3, x86-64-nops-1-bdver4,
	x86-64-nops-1-znver1, x86-64-nops-1-btver1 nor
	x86-64-nops-1-btver2.
	* gas/i386/nops-1-core2.d: Updated.
	* gas/i386/nops-1-k8.d: Likewise.
	* gas/i386/nops-4a-i686.d: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/nops-5.d: Likewise.
	* gas/i386/nops-6.d: Likewise.
	* gas/i386/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/x86-64-nops-1-g64.d: Likewise.
	* gas/i386/x86-64-nops-1-k8.d: Likewise.
	* gas/i386/x86-64-nops-1.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.
	* gas/i386/x86-64-nops-3.d: Likewise.
	* gas/i386/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/x86-64-nops-4-k8.d: Likewise.
	* gas/i386/x86-64-nops-4.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-3.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-4.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-5.d: Likewise.
	* gas/i386/nops-1-bdver1.d: Removed.
	* gas/i386/nops-1-bdver2.d: Likewise.
	* gas/i386/nops-1-bdver3.d: Likewise.
	* gas/i386/nops-1-bdver4.d: Likewise.
	* gas/i386/nops-1-btver1.d: Likewise.
	* gas/i386/nops-1-btver2.d: Likewise.
	* gas/i386/nops-1-znver1.d: Likewise.
	* gas/i386/x86-64-nops-1-bdver1.d: Likewise.
	* gas/i386/x86-64-nops-1-bdver2.d: Likewise.
	* gas/i386/x86-64-nops-1-bdver3.d: Likewise.
	* gas/i386/x86-64-nops-1-bdver4.d: Likewise.
	* gas/i386/x86-64-nops-1-btver1.d: Likewise.
	* gas/i386/x86-64-nops-1-btver2.d: Likewise.
	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/x86-64-nops-1-znver1.d: Likewise.
	* gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise.
2015-03-20 04:49:39 -07:00
Nick Clifton
1740ba0cec Add support for G13 and G14 flag bits in RL78 ELF binaries.
inc	* rl78.h (E_FLAG_RL78_G10): Redefine.
	(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
	E_FLAG_RL78_G14): New flags.

bin	* readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.

gas	* config/tc-rl78.c (enum options): Add G13 and G14.
	(md_longopts): Add -mg13 and -mg14.
	(md_parse_option): Handle -mg13 and -mg14.
	(md_show_usage): List -mg13 and -mg14.
	* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.

bfd	* elf32-rl78.c (rl78_cpu_name): New function.  Prints the name of
	the RL78 core based upon the flags.
	(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
	flags.
	(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
	(elf32_rl78_machine): Always return bfd_mach_rl78.
2015-03-19 15:37:43 +00:00
Ganesh Gopalasubramanian
029f352261 Add znver1 processor 2015-03-17 21:49:15 +05:30
Jiong Wang
4bf8c6e898 [AArch64] Don't warn on XZR/SP overlapping when it's in load/store
2015-03-13  Jiong Wang  <jiong.wang@arm.com>

gas/
   * config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31.

gas/testsuite/
  * gas/aarch64/diagnostic.s: New testcases.
  * gas/aarch64/diagnostic.l: New error match.
2015-03-13 12:02:23 +00:00
Jiong Wang
bc9706f823 [AArch64] Don't tail-pads sections to the alignment
2015-03-13  Jiong Wang  <jiong.wang@arm.com>

gas/
  * config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.

gas/testsuite/
  * gas/aarch64/tail_padding.s: New testcase.
  * gas/aarch64/tail_padding.d: New expectation file.
2015-03-13 12:00:37 +00:00
Andrew Bennett
7ef0d2976a Add i6400 entry to the MIPS CPU table.
gas/

	* config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
	* doc/c-mips.texi: Document i6400 -march option.
2015-03-12 16:37:09 +00:00
Nick Clifton
93ef582deb Fixes a problem generating relocs for thumb function calls to local symbols defined in other sections.
PR gas/17444
	* config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment
	to arm_apply_sym_value.  Update prototype.
	* config/tc-arm.c (arm_apply_sym_value): Add segment argument.
	Do not apply the value if the symbol is in a different segment to
	the current segment.
2015-03-12 15:58:37 +00:00
Alan Modra
f728387b9a Fix powerpc gas abort on invalid instruction fixups
* config/tc-ppc.c (md_assemble): Don't abort on 8 byte insn fixups.
	(md_apply_fix): Report an error on data-only fixups used with insns.
2015-03-11 18:15:31 +10:30
Andreas Krebbel
c683726541 S/390: Add check for length field operand
gas/
2015-03-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gas/config/tc-s390.c (md_gather_operands): Check for valid
	length field operands.
2015-03-10 12:49:34 +01:00
Michael Perkins
5e0d7f77b2 Fixes a bug in the ARM port of GAS when parsing inverted register lists.
* config/tc-arm.c (parse_operands): Fix bug setting writeback
	values for '^' on OP_REGLSTs.
	(do_push_pop): Add new writeback constraint.
2015-03-10 11:47:46 +00:00
Sterling Augustine
4e9aaefbd0 [ARM]Fix "align directive causes MAP_DATA symbol to be lost"
gas/
2015-03-10  Renlin Li  <renlin.li@arm.com>

	* config/tc-arm.c (mapping_state): Remove first MAP_DATA emitting code.
	(mapping_state_2): Emit first MAP_DATA symbol here.

gas/testsuite/
2015-03-05  Renlin Li  <renlin.li@arm.com>

	* gas/arm/dis-data.d: Adjust the desired output.
	* gas/arm/dis-data2.d: Ditto.
2015-03-10 11:34:50 +00:00
Jiong Wang
a578ef7ed4 [AArch64] Set the minimum alignment on code segments
gas/
2015-03-10  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-aarch64.c (mapping_state): Set minimum alignment for
	code sections.

gas/testsuite
2015-03-10  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/codealign.d: Add test for code section alignment.
	* gas/aarch64/codealign.s: New file.
2015-03-10 11:22:15 +00:00
Nick Clifton
73f43896e3 Fixes a bug building the ARM Linux kernel with a toolchain compiled with CPU_DEFAULT set.
PR gas/17852
	* config/tc-arm.c (md_begin): Ensure that selected_cpu is
	initialised when CPU_DEFAULT is defined.
2015-03-10 10:01:45 +00:00
Nick Clifton
a26de52c63 Fixes a thinko in the implementation of the V850 -m8byte-align and -m4byte-align command line options.
* config/tc-v850.c (md_parse_option): Fix code to set or clear
	EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the
	-m8byte-align and -m4byte-align command line options.
2015-03-05 13:04:33 +00:00
Richard Sandiford
e09ab7ac78 Allow MOVK for R_AARCH64_TLSLE_MOVW_TPREL_G{0,1}NC
bfd/
	PR gas/17843
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect
	R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
	to be used with MOVK rather than MOVZ.

gas/
	PR gas/17843
	* config/tc-aarch64.c (process_movw_reloc_info): Allow
	R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
	for MOVK.

gas/testsuite/
	PR gas/17843
	* gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for
	R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
	sequence.

ld/testsuite/
	PR gas/17843
	* ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test.
	* ld-aarch64/aarch64-elf.exp: Run it.
2015-03-04 09:09:05 +00:00
Marcus Shawcroft
1ada945d05 [AArch64] Add support for :tlsdesc: and TLSDESC_LD_PREL19 2015-02-26 22:59:23 +00:00
Marcus Shawcroft
389b8029b6 [AArch64] Add support for :tlsdesc: and TLSDESC_ADR_PREL21 2015-02-26 22:59:16 +00:00
Marcus Shawcroft
3c12b05436 Add ADR :tlsgd: directive and TLSGD_ADR_PREL21 support. 2015-02-26 22:23:09 +00:00
Marcus Shawcroft
043bf05a3d Adding support for TLSIE_LD_GOTTREL_PREL19. 2015-02-26 22:23:09 +00:00
Marcus Shawcroft
74ad790c76 Adding ld_literal_type.
Extend the address modifier parsing to distinguish between the
modifers used in LDR literal and LDR register offset address modes.

The current parser incorrectly accepts the :got: modifier on a
register offset instruction resulting in silent corruption of the
output binary.
2015-02-26 22:23:09 +00:00
Marcus Shawcroft
6f4a313ba4 Adding adr_type and prevent adr :got:
The current implementation of the :got: assembler modifier does not
distinguish the ADR and ADRP instruction.  The :got: modifier does not
make sense on and ADR instruction and should be error'd rather than
the current behavior of applying an inappropriate relocation to the
output and scrambling the underlying instruction silently.
2015-02-26 22:23:09 +00:00
Marcus Shawcroft
1db365dcdf Remove dead code. 2015-02-26 22:23:08 +00:00
Andrew Burgess
fdd410ac7a avr/gas: Write out data to track .org/.align usage.
Adds support to the assembler to write out data for tracking the use of
.org and .align directives.  This data is collected within the assembler
and written out to a section ".avr.prop" (if there's anything to write
out).

This patch does not add any tests.  The next patch in this series will
add a better mechanism for visualising the contents of .avr.prop which
will make writing tests much easier.

This patch also does not make any use of this collected data, that will
also come along in a later patch; the intended consumer is the linker,
during linker relaxation this information will be used to ensure that
the .org and .align directives are honoured.

bfd/ChangeLog:

	* elf32-avr.h (AVR_PROPERTY_RECORD_SECTION_NAME): Define.
	(AVR_PROPERTY_RECORDS_VERSION): Define.
	(AVR_PROPERTY_SECTION_HEADER_SIZE): Define.
	(struct avr_property_record): New structure.

gas/ChangeLog:

	* config/tc-avr.c: Add elf32-avr.h include.
	(struct avr_property_record_link): New structure.
	(avr_output_property_section_header): New function.
	(avr_record_size): New function.
	(avr_output_property_record): New function.
	(avr_create_property_section): New function.
	(avr_handle_align): New function.
	(exclude_section_from_property_tables): New function.
	(create_record_for_frag): New function.
	(append_records_for_section): New function.
	(avr_create_and_fill_property_section): New function.
	(avr_post_relax_hook): New function.
	* config/tc-avr.h (md_post_relax_hook): Define.
	(avr_post_relax_hook): Declare.
	(HANDLE_ALIGN): Define.
	(avr_handle_align): Declare.
	(strut avr_frag_data): New structure.
	(TC_FRAG_TYPE): Define.
2015-02-25 23:15:02 +00:00