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6 commits

Author SHA1 Message Date
David Edelsohn
2356dab3bc * config/tc-arc.c (byte_order): Provide explicit initial value. 1995-07-14 17:31:30 +00:00
David Edelsohn
fa7a56f8dc * config/tc-arc.c (delay_slot_type): New function.
(md_assemble): Use hashed list of insns.
	Print warning if 8 byte insn appears in delay slot.
	(md_operand): Handle %st(sym1-sym2).
	(get_arc_exp_reloc_type): Likewise.
	(md_apply_fix, case BFD_RELOC_ARC_B26): Now using implicit addends
	so must store them here.
1995-04-12 14:41:21 +00:00
Ken Raeburn
9b0da28b13 write.c: Complain about .space or .org moving backwards.
Do generic rs_machine_dependent relaxation only if TC_GENERIC_RELAX_TABLE is
defined.  Use its value as the base of the table, so the actual declaration
can be cpu-specific (and const or not as appropriate).  For other cpus where
this isn't done (the majority), delete md_relax_table altogether.

For machines with WORKING_DOT_WORD, delete md_{short,long}_jump_size.
1995-04-11 06:10:34 +00:00
David Edelsohn
5acf432d3f * config/tc-arc.c (arc_condition_codes): Deleted.
(init_opcode_tables): Delete cpu_type_map, call
	arc_get_opcode_mach instead.
	(arc_common): Delete non-ELF stuff.  Require leading '.' in .data.
	(md_apply_fix): Delete non-ELF stuff.
	Disable special handling of limm values, treat them normally.
	(get_arc_exp_reloc_type): New argument `data_p'.  Callers updated.
	(md_assemble): All limm operands must be output by gas, the opcode
	insertion routines cannot be used (they don't do anything and we're
	using implicit addends now so we need to output something).
	* config/tc-arc.h (FAKE_LABEL_NAME): Define.
1995-04-07 03:13:42 +00:00
David Edelsohn
31add5f0c9 * config/tc-arc.c (md_pseudo_table): Add .cpu.
(comment_chars): Add ';'.
	(arc_mach_type, mach_type_specified, cpu_tables_init_p): New globals.
	(md_parse_option): Delete support for -mmult.  Add -mcpu=xxx.
	(md_begin): Current ARCs are little endian.
	Call bfd_set_arch_mach to set the cpu type.
	(init_opcode_tables): New function.
	(md_begin): Ignore suffixes and registers not supported by cpu.
	(md_assemble): Initialize opcode tables here.
	Ignore opcodes not supported by selected cpu.
	Always ask for more memory in one piece.
	(arc_cpu): New function.
	(md_numbers_to_chars): Support both endians (will probably be needed
	eventually anyway).
	(md_apply_fix): Likewise.
1995-02-10 02:01:01 +00:00
David Edelsohn
49af8f3533 * config/tc-arc.c (arc_insert_operand): Change reg parm to pointer
to table entry.  All callers changed.
	(md_shortopts): New argument -mmult.
	(md_parse_option): Recognize it.
	(md_show_usage): Print it.
	(md_begin): If -mmult, say we have the new multiply and shift insns.
	(md_assemble): Fix reloc generation for 32 bit immediate values.
	Clean up modifier handling.  Try next insn if fake operand says there's
	an error.  Update to new syntax of insertion/extraction fns.
	Recognize predefined aux regs.  Don't abort if insertion fn missing.
1994-12-19 21:05:59 +00:00