Commit graph

22 commits

Author SHA1 Message Date
H.J. Lu
3739860c11 Remove trailing spaces in gas 2015-08-12 04:40:42 -07:00
Nick Clifton
aff1a65ecb Fix the evaluation of RL78 complex relocs, by making immediate values be computed relative to a new absolute symbol.
gas	* config/tc-rl78.c (rl78_abs_sym): New local variable.
	(md_begin): Initialise the new symbol.
	(OPIMM): Define the value to be relative to the new symbol and not
	the absolute section symbol.

ld	* emulparams/elf32rl78.sh (OTHER_SECTIONS): Provide a value for
	the _-rl78_abs__ symbol.

tests	* gas/all/struct.d: Allow for extra symbols in the output.
	* gas/macros/test1.d: Likewise.
	* gas/elf/elf.exp: Add an rl78 machine.
	* gas/elf/sections2e-rl78: New file.

tests	* binutils-all/localize-hidden-1.d: Allow for extra symbols in the
	output.
        * binutils-all/strip-11.d: Skip for the RL78.
2015-07-24 16:44:27 +01:00
Nick Clifton
54f66250d7 Add support for SADDR addressing to the RL78 port.
gas	* config/rl78-parse.y: Tag all saddr expressions throughout.
	(SET_SA): New.
	(expr_is_saddr): Allow symbolic expressions.
	* config/tc-rl78.c (md_apply_fix): Handle SADDR.

bfd	* elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR.
        (rl78_reloc_map): Add R_RL78_RH_SADDR.
	* reloc.c: Add BFD_RELOC_RL78_SADDR.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-06-30 11:25:18 +01:00
DJ Delorie
0952813b0b Make RL78 disassembler and simulator respect ISA for mul/div
[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
2015-04-30 15:25:49 -04:00
Nick Clifton
6ff71e7681 Adds support to the RL78 port for linker relaxation affecting .debug sections.
gas	* config/tc-rl78.h (TC_LINKRELAX_FIXUP): Define.
	(TC_FORCE_RELOCATION_SUB_SAME): Define.
	(DWARF2_USE_FIXED_ADVANCE_PC): Define.

	* gas/lns/lns.exp: Add RL78 to list of targets using
	DW_LNS_fixed_advance_pc.

bfd	* elf32-rl78.c (RL78_OP_REL): New macro.
	(rl78_elf_howto_table): Use it for complex relocs.
	(get_symbol_value): Handle the cases when the info or status
	arguments are NULL.
	(get_romstart): Cache the status returned by get_symbol_value.
	(get_ramstart): Likewise.
	(RL78_STACK_PUSH): Generate an error message if the stack
	overflows.
	(RL78_STACK_POP): Likewise for underflows.
	(rl78_compute_complex_reloc): New function.  Contains the basic
	processing code for all RL78 complex relocs.
	(rl78_special_reloc): New function.  Provides special reloc
	handling for complex relocs.
	(rl78_elf_relocate_section): Use rl78_compute_complex_reloc.
	(rl78_offset_for_reloc): Likewise.

binutils* readelf.c (target_specific_reloc_handling): Add code to handle
	RL78 complex relocs.
2015-04-14 16:23:33 +01:00
Nick Clifton
1740ba0cec Add support for G13 and G14 flag bits in RL78 ELF binaries.
inc	* rl78.h (E_FLAG_RL78_G10): Redefine.
	(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
	E_FLAG_RL78_G14): New flags.

bin	* readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.

gas	* config/tc-rl78.c (enum options): Add G13 and G14.
	(md_longopts): Add -mg13 and -mg14.
	(md_parse_option): Handle -mg13 and -mg14.
	(md_show_usage): List -mg13 and -mg14.
	* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.

bfd	* elf32-rl78.c (rl78_cpu_name): New function.  Prints the name of
	the RL78 core based upon the flags.
	(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
	flags.
	(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
	(elf32_rl78_machine): Always return bfd_mach_rl78.
2015-03-19 15:37:43 +00:00
Alan Modra
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Nick Clifton
3ce3a066e1 This fixes the processing of BFD_RELOC_RL78_DIFF fixups when the size is less
than 4.  This affects DWARF debug info generation in particular.

	* config/tc-rl78.c (md_apply_fix): Correct handling of small sized
	RELOC_RL78_DIFF fixups.
2014-08-18 17:34:03 +01:00
Alan Modra
e57e6ddc2e Prepare gas for 64-bit obstacks
Use size_t in a few places involved with obstacks, and don't include
obstack.h in files that don't use obstacks.

gas/
	* config/bfin-parse.y: Don't include obstack.h.
	* config/obj-aout.c: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-som.c: Likewise.
	* config/tc-bfin.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-rl78.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* expr.c: Likewise.
	* listing.c: Likewise.
	* config/obj-elf.c (elf_file_symbol): Make name_length a size_t.
	* config/tc-aarch64.c (symbol_locate): Likewise.
	* config/tc-arm.c (symbol_locate): Likewise.
	* config/tc-mmix.c (mmix_handle_mmixal): Make len_0 a size_t.
	* config/tc-score.c (s3_build_score_ops_hsh): Make len a size_t.
	(s3_build_dependency_insn_hsh): Likewise.
	* config/tc-score7.c (s7_build_score_ops_hsh): Likewise.
	(s7_build_dependency_insn_hsh): Likewise.
	* frags.c (frag_grow): Make parameter a size_t, and use size_t locals.
	(frag_new): Make parameter a size_t.
	(frag_var_init): Make max_chars and var parameters size_t.
	(frag_var, frag_variant): Likewise.
	(frag_room): Return a size_t.
	(frag_align_pattern): Make n_fill parameter a size_t.
	* frags.h: Update function prototypes.
	* symbols.c (save_symbol_name): Make name_length a size_t.
2014-07-26 21:00:50 +09:30
Kaushik Phata
856ea05ccf This adds support for marking RL78 binaries as either supporting 32-bit
or 64-bit doubles.  It also makes the linker complain if the user attempts
to link together binaries with different sized doubles.

	* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if
	64-bit doubles objects mix with 32-bit doubles objects.
	(rl78_elf_print_private_bfd_data): Describe 64-bit doubles flag.

	* readelf.c (get_machine_flags): Handle RL78 64-bit doubles flag.

	* config/tc-rl78.c (enum options): Add OPTION_32BIT_DOUBLES
	and OPTION_64BIT_DOUBLES.
	(md_longopts): Add -m32bit-doubles and -m64bit-doubles.
	(md_parse_option): Parse -m32bit-doubles and -m64bit-doubles.
	(md_show_usage): Show all of the RL78 options.
	(rl78_float_cons): New static functions.
	(md_pseudo_table): Update handler for "double".
2014-05-16 14:57:10 +01:00
DJ Delorie
0a899fd5ac Add checks for overfar branches
Check 8 and 16 bit PCREL fixes for overflow, since we bypass the
later overflow checks in write.c.  Direct relocs are left alone,
as gcc has been known to take advantage of the silent overflows
when comparing addresses to constant ranges.
2014-04-02 16:50:29 -04:00
Nick Clifton
b3fe4307a6 Add support for %hi8, %hi16 and %lo16 being used when relocation are necessary.
* config/tc-rl78.c (rl78_op): Issue an error message if a 16-bit
	relocation is used on an 8-bit operand or vice versa.
	(tc_gen_reloc): Use the RL78_16U relocation for RL78_CODE.
	(md_apply_fix): Add support for RL78_HI8, RL78_HI16 and RL78_LO16.
2014-03-26 16:34:04 +00:00
DJ Delorie
0c315784bf Add opcode relaxation for rl78-elf
This patch adds initial in-gas opcode relaxation for the rl78
backend.  Specifically, it checks for conditional branches that
are too far and replaces them with inverted branches around longer
fixed branches.
2014-03-20 17:56:01 -04:00
Alan Modra
4b95cf5c0c Update copyright years 2014-03-05 22:16:15 +10:30
DJ Delorie
c9d665580e Ensure that %func() expressions are outermost terms
This is to avoid expressions like:  %hi(foo) + 1, which will
not do what you expect.  The complex relocations can handle it,
but the internal fixups can't.
2014-01-21 15:12:19 -05:00
Nick Clifton
4046d87a36 * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10
flag bits do not match.
	(rl78_elf_print_private_bfd_data): Describe G10 flag.

	* readelf.c (get_machine_flags): Handle RL78 G10 flag.

	* config/tc-rl78.c (elf_flags): New variable.
	(enum options): Add OPTION_G10.
	(md_longopts): Add mg10.
	(md_parse_option): Parse -mg10.
	(rl78_elf_final_processing): New function.
	* config/tc-rl78.c (tc_final_processing): Define.
	* doc/c-rl78.texi: Document -mg10 option.

	* rl78.c (E_FLAG_RL78_G10): Define.

	* lib/ld-lib.exp (check_shared_lib_support): Note that the RL78
	does not support shared library generation.
2013-08-09 10:40:04 +00:00
DJ Delorie
4107ae2218 * reloc.c (BFD_RELOC_RL78_CODE): Add.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* elf32-rl78.c (rl78_elf_relocate_section): Handle weak code
references in compuated relocs.

* config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
(rl78_op): Handle %code().
(rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
(tc_gen_reloc): Likwise; convert to a computed reloc.
(md_apply_fix): Likewise.
2013-02-27 21:39:20 +00:00
DJ Delorie
392ca75208 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
relocs in .word/.etc statements.
2013-01-29 22:17:53 +00:00
DJ Delorie
cbf1fdc93b * config/tc-rl78.c: Change line_separator to '@' so that '|' can
be used in expressions.
2012-10-03 20:48:13 +00:00
DJ Delorie
9cea966c22 [bfd]
* elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX.
	(rl78_reloc_map): Add BFD_RELOC_RL78_RELAX.
	(rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR,
	and R_RL78_RH_SADDR.
	(rl78_elf_finish_dynamic_sections): Only validate PLT section if
	we didn't relax anything, as relaxing might remove a PLT reference
	after we've set up the table.
	(elf32_rl78_relax_delete_bytes): New.
	(reloc_bubblesort): New.
	(rl78_offset_for_reloc): New.
	(relax_addr16): New.
	(rl78_elf_relax_section): Add support for relaxing long
	instructions into short ones.

[gas]
	* config/rl78-defs.h (rl78_linkrelax_addr16): Add.
	(rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove.
	* config/rl78-parse.y: Tag all addr16 and branch patterns with
	relaxation markers.
	* config/tc-rl78.c (rl78_linkrelax_addr16): New.
	(rl78_linkrelax_branch): New.
	(OPTION_RELAX): New.
	(md_longopts): Add relax option.
	(md_parse_option): Add OPTION_RELAX.
	(rl78_frag_init): Support relaxation.
	(rl78_handle_align): New.
	(md_assemble): Support relaxation.
	(md_apply_fix): Likewise.
	(md_convert_frag): Likewise.
	* config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
	(HANDLE_ALIGN): New.
	(rl78_handle_align): Declare.

	* config/rl78-parse.y (rl78_bit_insn): New.  Set it for all bit
	insn patterns.
	(find_bit_index): New.  Strip .BIT suffix off relevent
	expressions for bit insns.
	(rl78_lex): Exclude bit suffixes from expression parsing.

[include/elf]
	* rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New.
	(RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 01:49:37 +00:00
DJ Delorie
6652d298c0 [bfd]
* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Delete unused
	variable.

[gas]
	* config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
2011-11-02 20:40:22 +00:00
DJ Delorie
99c513f6ac [.]
* configure.ac (rl78-*-*) New case.
	* configure: Regenerate.

[bfd]
	* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
	(ALL_MACHINES_CFILES): Add cpu-rl78.c.
	(BFD32_BACKENDS): Add elf32-rl78.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
	(Makefile.in): Regenerate.
	* archures.c (bfd_architecture): Define bfd_arch_rl78.
	(bfd_archures_list): Add bfd_rl78_arch.
	* config.bfd: Add rl78-*-elf.
	* configure.in: Add bfd_elf32_rl78_vec.
	* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
	* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* cpu-rl78.c: New file.
	* elf32-rl78.c: New file.

[binutils]
	* readelf.c: Include elf/rl78.h
	(guess_is_rela): Handle EM_RL78.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(is_32bit_abs_reloc): Likewise.
	* NEWS: Mention addition of RL78 support.
	* MAINTAINERS: Add myself as RL78 port maintainer.

[gas]
	* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
	(TARGET_CPU_HFILES): Add rc-rl78.h.
	(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
	(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
	* Makefile.in: Regenerate.
	* configure.in: Add rl78 case.
	* configure: Regenerate.
	* configure.tgt: Add rl78 case.
	* config/rl78-defs.h: New file.
	* config/rl78-parse.y: New file.
	* config/tc-rl78.c: New file.
	* config/tc-rl78.h: New file.
	* NEWS: Add Renesas RL78.

	* doc/Makefile.am (c-rl78.texi): New.
	* doc/Makefile.in: Likewise.
	* doc/all.texi: Enable it.
	* doc/as.texi: Add it.

[include]
	* dis-asm.h (print_insn_rl78): Declare.

[include/elf]
	* common.h (EM_RL78, EM_78K0R): New.
	* rl78.h: New.

[include/opcode]
	* rl78.h: New file.

[ld]
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
	(+eelf32rl78.c): New rule.
	* Makefile.in: Regenerate.
	* configure.tgt: Add rl78-*-* case.
	* emulparams/elf32rl78.sh: New file.
	* NEWS: Mention addition of Renesas RL78 support.

[opcodes]
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
	rl78-dis.c.
	(MAINTAINERCLEANFILES): Add rl78-decode.c.
	(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
	* Makefile.in: Regenerate.
	* configure.in: Add bfd_rl78_arch case.
	* configure: Regenerate.
	* disassemble.c: Define ARCH_rl78.
	(disassembler): Add ARCH_rl78 case.
	* rl78-decode.c: New file.
	* rl78-decode.opc: New file.
	* rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00