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Author SHA1 Message Date
Alan Modra
a7f2871e66 include/elf/ 
* ppc.h (DT_PPC_TLSOPT): Define.
	* ppc64.h (DT_PPC64_TLSOPT): Define.
bfd/
	* elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define.
	(ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define.
	(MR_0_3, MR_3_0): Define.
	(struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt.
	(ppc_elf_select_plt_layout): Save emit_stub_syms param earlier.
	(ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash
	table.  Check for presense of __tls_get_addr_opt
	(allocate_dynrelocs): Increase glink entry size for __tls_get_addr.
	(ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag.
	(write_glink_stub): Add param p.
	(ppc_elf_relocate_section): Adjust write_glink_stub call.
	(ppc_elf_finish_dynamic_symbol): Emit special glink call stub for
	__tls_get_addr.
	* elf32-ppc.h (ppc_elf_tls_setup): Update prototype.
	* elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt.
	(ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash
	table.  Check for presense of __tls_get_addr_opt.
	(ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag.
	(LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13,
	BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1,
	LD_R2_0R1, MTLR_R11): Define.
	(build_tls_get_addr_stub): New function.
	(ppc_build_one_stub): Call it.
	(ppc_size_one_stub): Add extra size for __tls_get_addr stub.
	(ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for
	__tls_get_addr plt call.
	* elf64-ppc.h (ppc64_elf_tls_setup): Update prototype.
binutils/
	* readelf.c (get_ppc_dynamic_type): Add TLSOPT.
	(get_ppc64_dynamic_type): Likewise.
ld/
	* emultempl/ppc32elf.em (no_tls_get_addr_opt): New var.
	(ppc_before_allocation): Pass to ppc_elf_tls_setup.
	(OPTION_NO_TLS_GET_ADDR_OPT): Define.  Redefine other options in
	terms of previous option.
	(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add
	--no-tls-get-addr-optimize.
	(PARSE_AND_LIST_ARGS_CASES): Handle it.
	* emultempl/ppc64elf.em (no_tls_get_addr_opt): New var.
	(ppc_before_allocation): Pass to ppc64_elf_tls_setup.
	(OPTION_NO_TLS_GET_ADDR_OPT): Define.
	(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add
	--no-tls-get-addr-optimize.
	(PARSE_AND_LIST_ARGS_CASES): Handle it.
ld/testsuite/
	* ld-powerpc/tlslib.s: Delete dot-symbol entry syms.  Add
	__tls_get_addr_opt.
	* ld-powerpc/tlslib32.s: Add __tls_get_addr_opt.
	* ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s.
	* ld-powerpc/powerpc.exp: Build old-abi library and use it in
	two new link tests.
	* ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub.
	* ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d,
	* ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r,
	* ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g,
	* ld-powerpc/tlsexetoc.r: Likewise.
 2009-09-21 11:51:02 +00:00
Richard Sandiford
a3de5ef5a4 ld/testsuite/ 
* ld-mips-elf/elf-rel-got-n64-linux.d: Expect BALs.
	* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
 2009-09-20 11:11:37 +00:00
Richard Sandiford
18e04883d0 bfd/ 
* elf-bfd.h (eh_cie_fde): Add personality_offset and
	make_per_encoding_relative to the CIE structure.  Add a padding field.
	* elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Use 0x70
	rather than 0xf0 when masking out the base address encoding
	Record the offset of personality data from the start of the CIE.
	Remove a repeated elf_backend_can_make_relative_eh_frame check.
	(find_merged_cie): Take an info argument.  If the personality
	binds locally, try converting an absolute personality into
	a local one.
	(_bfd_elf_discard_section_eh_frame): Use 0x70 rather than 0xf0
	when masking out the base address encoding.  Update the call to
	find_merged_cie.
	(_bfd_elf_eh_frame_section_offset): Discard relocations against
	the personality data if we are converting into PC-relative form.
	(_bfd_elf_write_section_eh_frame): Use 0x70 rather than 0xf0
	when masking out the base address encoding.  Handle
	make_per_encoding_relative.

ld/testsuite/
	* ld-mips-elf/eh-frame5.s, ld-mips-elf/eh-frame5.ld,
	ld-mips-elf/eh-frame5.d: New test.
	* ld-mips-elf/mips-elf.exp: Run it.
 2009-09-19 08:06:11 +00:00
Alan Modra
b31867b61a bfd/ 
* elf64-ppc.c (follow_link, elf_follow_link, ppc_follow_link): New
	functions.  Use throughout.
	(ppc64_elf_copy_indirect_symbol): Set direct symbol "oh" field
	from indirect symbol.
	(lookup_fdh): Rename from get_fdh.  Follow indirect sym links.
	(add_symbol_adjust): Simplify.
	(defined_code_entry, defined_func_desc): New functions.
	(ppc64_elf_gc_keep): Follow indirect sym links.  Use defined_code_entry.
	(ppc64_elf_gc_mark_dynamic_ref): Use defined_func_desc and
	defined_code_entry to follow indirect sym links.
	(ppc64_elf_gc_mark_hook, func_desc_adjust): Likewise.
	(ppc_type_of_stub): Follow indirect sym links.
	(toc_adjusting_stub_needed): Likewise.
	(ppc_build_one_stub): Likewise.  Make undefined dot-symbols weak
	rather than defining them at stub.
	(ppc64_elf_relocate_section): Rewrite call test to avoid multiple
	assignments in test.
ld/testsuite/
	* ld-powerpc/tlsso.d: Update.
	* ld-powerpc/tlsso.r: Update.
	* ld-powerpc/tlstocso.d: Update.
	* ld-powerpc/tlstocso.r: Update.
 2009-09-18 03:30:34 +00:00
Kaz Kojima
22fe6da0f9 * ld-elfcomm/elfcomm.exp: Add appropriate emulation option 
for sh64*-*-*.
	* ld-gc/gc.exp (test_gc): Likewise.
 2009-09-15 02:02:48 +00:00
H.J. Lu
6f81fc8bdf 2009-09-14 H.J. Lu <hongjiu.lu@intel.com> 
* ld-undefined/entry-7.d: New.
 2009-09-14 14:07:26 +00:00
Richard Sandiford
3c0bfb2a23 gas/testsuite/ 
* gas/mips/mips16-dwarf2-n32.d: Expect odd addresses.

ld/testsuite/
	* ld-mips-elf/eh-frame1-n32.d: Change "the section \.eh_frame"
	to "the \.eh_frame section".
	* ld-mips-elf/eh-frame1-n64.d: Likewise.
	* ld-mips-elf/eh-frame2-n32.d: Likewise.
	* ld-mips-elf/eh-frame2-n64.d: Likewise.
	* ld-mips-elf/eh-frame3.d: Likewise.
	* ld-mips-elf/eh-frame4.d: Likewise.
	* ld-mips-elf/elf-rel-got-n32.d: Expect bals.
	* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
	* ld-mips-elf/mips-elf.exp: Force the MIPS16 PIC tests to use -mips1.
 2009-09-13 18:56:03 +00:00
Jie Zhang
28c2608723 * ld-elf/warn2.d: `Foo' appears in section 3 when target 
is bfin-*-linux-uclibc.
 2009-09-11 03:40:19 +00:00
Daniel Jacobowitz
67d74e430e bfd/ 
* elf32-arm.c (elf32_arm_final_link_relocate): Set sym_flags
	for the mode of target PLT entries.
	(allocate_dynrelocs): Only adjust symbol type if setting its
	value.

	ld/testsuite/
	* ld-arm/farcall-mixed-lib.d: Update.
 2009-09-09 18:36:11 +00:00
Alan Modra
53b0eb27a9 * ld-elf/sec64k.exp: For frv-linux use "aw" sections. 
* ld-elf/seg.d: Cater for GNU_STACK segment.
	* ld-elf/symbol1ref.s: Use data section.
	* ld-elf/symbol2ref.s: Likewise.
	* ld-scripts/empty-address-1.d: Don't run on frv-linux.
	* ld-scripts/empty-address-2a.d: Likewise.
	* ld-scripts/empty-address-2b.d: Likewise.
	* ld-scripts/empty-aligned.d: Likewise.
	* ld-elf/extract-symbol-1sym.d: Tolerate extra target supplied syms.
	* ld-scripts/sort_b_a-1.d: Likewise.
	* ld-scripts/sort_b_a.d: Likewise.
	* ld-scripts/sort_b_a_a-1.d: Likewise.
	* ld-scripts/sort_b_a_a-2.d: Likewise.
	* ld-scripts/sort_b_a_a-3.d: Likewise.
	* ld-scripts/sort_b_a_n-1.d: Likewise.
	* ld-scripts/sort_b_a_n-2.d: Likewise.
	* ld-scripts/sort_b_a_n-3.d: Likewise.
	* ld-scripts/sort_b_n-1.d: Likewise.
	* ld-scripts/sort_b_n.d: Likewise.
	* ld-scripts/sort_b_n_a-1.d: Likewise.
	* ld-scripts/sort_b_n_a-2.d: Likewise.
	* ld-scripts/sort_b_n_a-3.d: Likewise.
	* ld-scripts/sort_b_n_n-1.d: Likewise.
	* ld-scripts/sort_b_n_n-2.d: Likewise.
	* ld-scripts/sort_b_n_n-3.d: Likewise.
	* ld-scripts/sort_no-1.d: Likewise.
	* ld-scripts/sort_no-2.d: Likewise.
 2009-09-09 12:13:42 +00:00
M R Swami Reddy
8a7e4aa012 2009-09-08 M R Swami Reddy <MR.Swami.Reddy@nsc.com> 
* ld-elf/merge.d: xfail cr16-*-*.
 2009-09-08 10:05:04 +00:00
Alan Modra
d981b346f0 * ld-elf/eh5.d: Don't run on hppa64. Allow non-pcrel encoding. 
Skip extra CIEs emitted on embedded targets and adjust FDE
	matches to suit.
 2009-09-08 01:15:50 +00:00
Jie Zhang
f8739b83b9 gas/ 
* doc/as.texinfo: Document that Blackfin GAS does not
	accept SYMBOL = VALUE.

	ld/testsuite/
	* ld-elf/sec64k.exp: Use ".set" instead of "=" for bfin-*-*.
 2009-09-05 15:00:09 +00:00
Dave Korn
032f3e01ca ld/ChangeLog: 
* scripttempl/pe.sc (.text): Add "*(.text.*)" in order to catch
	new GCC hot/cold/unlikely partitions.
	* scripttempl/pep.sc: Likewise.
	* scripttempl/epocpe.sc: Likewise.
	* scripttempl/mcorepe.sc: Likewise.
	* scripttempl/ppcpe.sc: Likewise.

ld/testsuite/ChangeLog:

	* ld-pe/longsecn.d: Adjusted to match new .text section merging
	in default PE linker scripts.
	* ld-pe/longsecn-1.d: Likewise.
	* ld-pe/longsecn-2.d: Likewise.
 2009-09-03 18:04:35 +00:00
Jie Zhang
ead0c8f37c * lib/ld-lib.exp (is_elf_format): Return 1 for bfin-*-uclinux. 2009-08-31 11:02:54 +00:00
Alan Modra
425621e75f * ld-ifunc/ifunc.exp: Match R_PPC64_JUMP_IREL. 2009-08-31 06:18:17 +00:00
Alan Modra
3021a72335 PR ld/10569 
* ld-elf/commonpage2.d: New.
	* ld-elf/maxpage4.d: Likewise.
	* ld-elf/maxpage4.t: Likewise.
 2009-08-30 05:48:56 +00:00
Nick Clifton
e5f2b1de7c * elf32-m68k.c (elf_m68k_copy_indirect_symbol): Propagate non_got_ref 
value.
        (elf_m68k_check_relocs): Handle dynamic TLS relocations.
        Handle non_got_ref field.
        (elf_m68k_adjust_dynamic_symbol): Handle non_got_ref field.

        * tls-def-1.s, tls-def-1.d, tls-gd-1.d2, tls-gd-1.d3, tls-main-1.s,
        * tls-main-1.d: New files.
        * m68k.exp: Run new TLS tests.
 2009-08-26 13:35:37 +00:00
Andreas Schwab
9853c09956 * ld-powerpc/powerpc.exp: Move relaxing and relocatable relaxing 
tests from ppc64elftest to ppcelftest and pass -a32 to assembler.
 2009-08-23 14:38:31 +00:00
Andreas Schwab
411a491999 * ld-powerpc/relax.d: Fix whitespace. 
* ld-powerpc/relaxr.d: Likewise.
 2009-08-23 09:43:35 +00:00
Daniel Gutson
cd1dac3d4a 2S09-08-21 Daniel Gutson <dgutson@codesourcery.com> 
ld/
        * ld-arm/callweak.d: Opcodes updated.
        * ld-arm/callweak.s: Architecture specified.
        * ld-arm/callweak-2.d: New test case.
        * ld-arm/callweak-2.s: New file.

	bfd/
	* elf32-arm.c (arch_has_thumb2_nop): New function.
	(arch_has_arm_nop): New function.
	(elf32_arm_final_link_relocate): NOP opcodes changed.

SVS: ----------------------------------------------------------------------
 2009-08-21 23:38:07 +00:00
Nick Clifton
ed4e4aa28d * ld-elf/linkonce1.d: Accept "UNUSED" as part of the name of an 
unused reloc.
        * ld-elf/linkonce2.d: Likewise.
 2009-08-17 09:22:18 +00:00
Jan Kratochvil
e39e47bd25 bfd/ 
Fix go32 stub preservation by objcopy.
	* coff-stgo32.c (adjust_filehdr_in_post): Use bfd_malloc.
	(go32_stubbed_coff_bfd_copy_private_bfd_data): Optionally allocate OBFD
	go32stub.

ld/testsuite/
	Test go32 stub preservation by objcopy.
	* ld-i386/i386.exp (go32 stub, go32 stub patch the source)
	(go32 stub objcopy, go32 stub comparison after objcopy): New.
 2009-08-10 21:38:36 +00:00
Nathan Sidwell
01017ef89a bfd/ 
* elf32-ppc.c (shared_stub_entry, stub_entry): Use r12, not r11.
	(ppc_elf_relax_section): Use symbol index to distinguish
	relocatable stubs.

	ld/testsuite/
	* ld-powerpc/relax.s: New.
	* ld-powerpc/relax.d: New.
	* ld-powerpc/relaxr.d: New.
	* ld-powerpc/powerpc.exp: Add new tests.
 2009-08-10 13:38:44 +00:00
Nathan Sidwell
3ae046ccd3 bfd/ 
* elf32-arm.c (elf32_arm_size_stubs): Call layout_sections_again
	at least once when fixing cortex-a8.

	ld/testsuite/
	* ld-arm/arm-elf.exp: Add new test.
	* ld-arm/cortex-a8-fix-hdr.d: New.
	* ld-arm/cortex-a8-fix-hdr.s: New.
	* ld-arm/cortex-a8-fix-hdr.t: New.
 2009-08-06 13:05:24 +00:00
Trevor Smigiel
9cc305ec20 bfd/ 
* elf32-spu.h (spu_elf_params): Add member emit_fixups.
	(spu_elf_size_sections): Declare prototype.
	* elf32-spu.c (spu_link_hash_table): Add member sfixup.
	(FIXUP_RECORD_SIZE, FIXUP_GET, FIXUP_PUT): New macros.
	(spu_elf_emit_fixup): New function.
	(spu_elf_relocate_section): Emit fixup for each SPU_ADDR32.
	(spu_elf_size_sections): New function.
ld/
	* emulparams/elf32_spu.sh (OTHER_READONLY_SECTIONS): Add .fixup
	section and __fixup_start symbol.
	* emultempl/spuelf.em (params): Initialize emit_fixups member.
	(spu_before_allocation): Call spu_elf_size_sections.
	(OPTION_SPU_EMIT_FIXUPS): Define.
	(PARSE_AND_LIST_LONGOPTS): Add --emit-fixups.
	(PARSE_AND_LIST_ARGS_CASES): Handle --emit-fixups.
	* ld.texinfo (--emit-fixups): Document.
ld/testsuite/
	* ld-spu/fixup.d: New.
	* ld-spu/fixup.s: New.
 2009-08-05 20:40:34 +00:00
Nathan Sidwell
eb7c4339fa bfd/ 
* elf32-arm.c (elf32_arm_stub_type): Add arm_stub_a8_veneer_lwm.
	(arm_build_one_stub): Build a8 veneers as a separate pass.
	(cortex_a8_erratum_scan): Add prev_num_a8_fixes and stub_changed_p
	parameters.  Use them to check if we create a different a8 fixup
	than the previous pass.
	(elf32_arm_size_stubs): Move scope of stub_changed and
	prev_num_a8_fixes into main loop.
	(elf32_arm_build_stubs): Build a8 veneers in a second pass.

	ld/testsuite/
	* ld-arm/cortex-a8-far-1.s: New.
	* ld-arm/cortex-a8-far-2.s: New.
	* ld-arm/cortex-a8-far.d: New.
	* ld-arm/arm-elf.exp: Add new test.
 2009-08-05 12:36:14 +00:00
H.J. Lu
1d85728fd7 2009-08-02 H.J. Lu <hongjiu.lu@intel.com> 
Jakub Jelinek  <jakub@redhat.com>

	PR ld/6443
	* elf32-i386.c (elf_i386_tls_transition): Check executable
	instead of shared for TLS when building PIE.
	(elf_i386_check_relocs): Likewise.
	(elf_i386_allocate_dynrelocs): Likewise.
	(elf_i386_relocate_section): Likewise.

	* elf64-x86-64.c (elf64_x86_64_tls_transition): Check executable
	instead of shared for TLS when building PIE.
	(elf64_x86_64_check_relocs): Likewise.
	(elf64_x86_64_allocate_dynrelocs): Likewise.
	(elf64_x86_64_relocate_section): Likewise.

ld/testsuite/

2009-08-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/6443
	* ld-i386/i386.exp: Run tlspie1.
	* ld-x86-64/x86-64.exp: tlspie1.

	* ld-i386/tlspie1.d: New.
	* ld-i386/tlspie1.s: Likewise.
	* ld-x86-64/tlspie1.d: Likewise.
	* ld-x86-64/tlspie1.s: Likewise.
 2009-08-02 23:55:49 +00:00
Hans-Peter Nilsson
dd52c6dee2 * ld-mmix/x.s, ld-mmix/y.s, ld-mmix/zeroeh.ld, 
ld-mmix/zeroehelf.d, ld-mmix/zeroehmmo.d: Use .gcc_except_table,
	not .eh_frame.
 2009-07-31 04:55:48 +00:00
H.J. Lu
b37470e428 2009-07-30 H.J. Lu <hongjiu.lu@intel.com> 
* ld-elf/shared.exp: Comment out dl3b.
 2009-07-30 15:55:59 +00:00
Hans-Peter Nilsson
cfdf6d77ef * ld-scripts/empty-address-3a.d, ld-scripts/empty-address-3b.d: 
Skip for mmix-knuth-mmixware.
 2009-07-30 00:13:55 +00:00
Hans-Peter Nilsson
2a1314ce69 * ld-scripts/default-script.s (text): Globalize. 
* ld-scripts/default-script1.d, ld-scripts/default-script2.d,
	ld-scripts/default-script3.d, ld-scripts/default-script4.d: Adjust
	accordingly.
 2009-07-29 06:47:48 +00:00
H.J. Lu
8a9036a406 bfd/ 
2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_architecture): Add bfd_arch_l1om.
	(bfd_l1om_arch): New.
	(bfd_archures_list): Add &bfd_l1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_l1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-l1om.c: New.

	* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
	(bfd_elf64_l1om_vec): Likewise.
	(bfd_elf64_l1om_freebsd_vec): Likewise.

	* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-l1om.c.
	* Makefile.in: Regenerated.

	* targets.c (bfd_elf64_l1om_vec): New.
	(bfd_elf64_l1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.

binutils/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c (guess_is_rela): Handle EM_L1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

gas/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add l1om.
	(check_cpu_arch_compatible): New.
	(set_cpu_arch): Use it.
	(i386_arch): New.
	(i386_mach): Return bfd_mach_l1om for Intel L1OM.
	(md_show_usage): Display l1om.
	(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
	cpu_arch_isa_flags.bitfield.cpul1om is set.

	* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
	(i386_arch): New.
	(ELF_TARGET_L1OM_FORMAT): Likewise.

	* doc/c-i386.texi: Document l1om.

gas/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: New.
	* gas/i386/l1om-inval.l: Likewise.
	* gas/i386/l1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run l1om-inval and l1om.

include/elf/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_L1OM): New.

ld/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
	is supported.  Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
	eelf_l1om_fbsd.o
	(eelf_l1om.c): New.
	(eelf_l1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* emulparams/elf_l1om.sh: New.
	* emulparams/elf_l1om_fbsd.sh: Likewise.

ld/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-l1om.d: New.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
	protected3-l1om.

opcodes/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_l1om_arch.
	* disassemble.c (disassembler): Likewise.

	* configure: Regenerated.

	* i386-dis.c (print_insn): Handle bfd_mach_l1om and
	bfd_mach_l1om_intel_syntax.  Use 8 bytes per line for Intel L1OM.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
	Add CPU_L1OM_FLAGS.
	(cpu_flags): Add CpuL1OM.
	(set_bitfield): Take an argument to set the value field.
	(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
	(process_i386_opcode_modifier): Updated.
	(process_i386_operand_type): Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuL1OM): New.
	(CpuXsave): Updated.
	(i386_cpu_flags): Add cpul1om.
 2009-07-25 14:58:58 +00:00
Trevor Smigiel
8fdcc58daa include/elf/ 
* spu.h (R_SPU_ADD_PIC): New.
bfd/
        * reloc.c (BFD_RELOC_SPU_ADD_PIC): Define.
        * bfd-in2.h: Regenerate.
        * libbfd.h: Regenerate.
        * elf32-spu.c (elf_howto_table): Add entries SPU_ADD_PIC.
        (spu_elf_bfd_to_reloc_type): Handle SPU_ADD_PIC.
        (spu_elf_relocate_section): Patch instructions marked by SPU_ADD_PIC.
gas/
        * config/tc-spu.c (md_apply_fix): Handle SPU_ADD_PIC.
        * config/tc-spu.h (tc_fix_adjustable): Don't adjust for SPU_ADD_PIC.
        (TC_FORCE_RELOCATION): Emit relocs for SPU_ADD_PIC.
ld/testsuite/
        * ld-spu/pic.d: New.
        * ld-spu/pic.s: New.
        * ld-spu/picdef.s: New.
 2009-07-24 19:51:27 +00:00
H.J. Lu
9b769489c6 bfd/ 
2009-07-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10434
	* elf64-x86-64.c (elf64_x86_64_check_relocs): Check executable
	instead of shared for R_X86_64_TPOFF32.
	(elf64_x86_64_relocate_section): Likewise.

ld/testsuite/

2009-07-23  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10434
	* ld-x86-64/tlsle1.d: New.
	* ld-x86-64/tlsle1.s: Likewise.

	* ld-x86-64/x86-64.exp: Run tlsle1.
 2009-07-23 21:22:20 +00:00
H.J. Lu
2955ec4c12 bfd/ 
2009-07-21  H.J. Lu  <hongjiu.lu@intel.com>

	 PR ld/10426
	 * elflink.c (elf_link_add_object_symbols): Turn an IFUNC symbol
	 from a DSO into a normal FUNC symbol.
	 (elf_link_output_extsym): Turn an undefined IFUNC symbol into
	 a normal FUNC symbol.

ld/testsuite/

2009-07-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10426
	* ld-ifunc/ifunc.exp: Check test-1 and libtest-2.so.  Updated.

	* ld-ifunc/test-1.c: New.
	* ld-ifunc/test-2.c: Likewise.
 2009-07-21 21:37:26 +00:00
Nick Clifton
1c4c13cd94 * ld-mips-elf/pic-and-nonpic-3b.dd: Updated to use new PLT 
entries.
        * ld-mips-elf/pic-and-nonpic-5b.dd: Likewise.
        * ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
        * ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
        * ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
 2009-07-17 13:36:16 +00:00
Nick Clifton
6d30f5b2dc * elfxx-mips.c (LOAD_INTERLOCKS_P): New define. 
(_bfd_mips_elf_size_dynamic_sections): For CPUs without load
        interlocking, the last PLT entry needs a nop in the branch delay slot.
        (_bfd_mips_elf_finish_dynamic_symbol): For CPUs with load itnerlocking,
        output the last two PLT entries in reverse order.

        * ld-mips-elf/pic-and-nonpic-3b.dd,
        ld-mips-elf/pic-and-nonpic-5b.dd,
        ld-mips-elf/pic-and-nonpic-6-o32.dd: Updated to use new PLT entries.
 2009-07-17 09:46:00 +00:00
H.J. Lu
1f85278f17 bfd/ 
2009-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* elf32-i386.c (elf_i386_relocate_section): Don't get local
	STT_GNU_IFUNC symbol for relocatable link.
	* elf64-x86-64.c (elf64_x86_64_relocate_section): Likewise.

ld/testsuite/

2009-07-16  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-ifunc/ifunc-5r-local-i386.d: New.
	* ld-ifunc/ifunc-5r-local-x86-64.d: Likewise.
 2009-07-16 14:23:12 +00:00
Nathan Sidwell
9a6f4e976d gas/ 
* config/tc-arm.c (md_apply_fix <BFD_RELOC_ARM_TARGET2>): Write
	the offset for REL targets here.

	gas/testsuite/
	* gas/arm/target-reloc-1.s: New.
	* gas/arm/target-reloc-1.d: New.

	ld/testsuite/
	* ld-arm/arm-target2.s: Add addend cases.
	* ld-arm/arm-target2-rel.d: Adjust.
	* ld-arm/arm-target2-abs.d: Adjust.
	* ld-arm/arm-target2-got-rel.d: Adjust.
 2009-07-16 13:18:52 +00:00
H.J. Lu
37bbf52bcd Fix a typo. 2009-07-13 16:55:09 +00:00
H.J. Lu
be19bd519b 2009-07-13 H.J. Lu <hongjiu.lu@intel.com> 
* ld-ifunc/ifunc.exp: Don't use -shared/-static to build object
	files.  Use ld_simple_link to build static non-ifunc-using
	executable.  Re-enable static non-ifunc-using executable check.
 2009-07-13 16:52:37 +00:00
H.J. Lu
552deff831 2009-07-10 H.J. Lu <hongjiu.lu@intel.com> 
* ld-ifunc/ifunc.exp: Don't chck static non-ifunc-using
	executable.
 2009-07-10 19:31:54 +00:00
H.J. Lu
e697f5a267 2009-07-10 H.J. Lu <hongjiu.lu@intel.com> 
* ld-ifunc/ifunc-1-local-x86.d: Updated.
	* ld-ifunc/ifunc-1-x86.d: Likewise.
	* ld-ifunc/ifunc-3a-x86.d: Likewise.
 2009-07-10 14:30:21 +00:00
H.J. Lu
1d77084592 bfd/ 
2009-07-10  H.J. Lu  <hongjiu.lu@intel.com>

	* elf.c (_bfd_elf_get_synthetic_symtab): Remove leading zeros
	when reporting  addends.


ld/testsuite/

2009-07-10  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-ifunc/ifunc-1-local-x86.d: Updated.
	* ld-ifunc/ifunc-1-x86.d: Likewise.Likewise.
	* ld-ifunc/ifunc-2-local-x86-64.d: Likewise.Likewise.
	* ld-ifunc/ifunc-2-x86-64.d: Likewise.
	* ld-ifunc/ifunc-3a-x86.d: Likewise.Likewise.
 2009-07-10 14:03:03 +00:00
Alan Modra
e054468f6c STT_GNU_IFUNC support for PowerPC. 2009-07-10 12:19:58 +00:00
Alan Modra
466a53e020 * ld-selective/selective.exp: Remove check that $CC contains the 
string "gcc".  Do -dumpversion for $CXX.
 2009-07-08 03:09:13 +00:00
Nick Clifton
fe56b6cece PR 10288 
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
        LFM and SFM instructions as comments,.
        Improve consistency of formatting for instructions displayed as
        comments and decimal values displayed with their hexadecimal
        equivalents.
        Formatting tidy ups.

        Updated expected disassembler regexps.
 2009-06-30 11:57:05 +00:00
Nick Clifton
05413229fd PR 10288 
* arm-dis.c (enum opcode_sentinels): New:  Used to mark the
        boundary between variaant and generic coprocessor instuctions.
        (coprocessor): Use it.
        Fix architecture version of MCRR and MRRC instructions.
        (arm_opcdes): Fix patterns for STRB and STRH instructions.
        (print_insn_coprocessor): Check architecture and extension masks.
        Print a hexadecimal version of any decimal constant that is
        outside of the range of -16 to +32.
        (print_arm_address): Add a return value of the offset used in the
        adress, if it is worth printing a hexadecimal version of it.
        (print_insn_neon): Print a hexadecimal version of any decimal
        constant that is outside of the range of -16 to +32.
        (print_insn_arm): Likewise.
        (print_insn_thumb16): Likewise.
        (print_insn_thumb32): Likewise.

        PR 10297
        * arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
        of an undefined instruction.
        (arm_opcodes): Use it.
        (thumb_opcod): Use it.
        (thumb32_opc): Use it.

        Update expected disassembly regrexps in GAS and LD testsuites.
 2009-06-29 08:08:15 +00:00
H.J. Lu
83b89087cf bfd/ 
2009-06-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10337
	* elf.c (bfd_section_from_shdr): Don't change sh_link for
	SHT_REL/SHT_RELA sections on executable nor shared library.
	Treat SHT_REL/SHT_RELA sections with sh_link set to SHN_UNDEF
	as a normal section.

ld/testsuite/

2009-06-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/10337
	* ld-ifunc/binutils.exp: New.
 2009-06-27 16:07:10 +00:00