darkkirb/old-cross-binutils
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57 commits

Author SHA1 Message Date
Nick Clifton
86e0da7a81 Use GPR_CLEAR instead of GPR_SET 2000-05-29 19:28:53 +00:00
Andrew Cagney
eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Stan Shebs
cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Andrew Cagney
33ccdb1b97 * gen-engine.c (print_run_body): Prefix instruction_address. 1998-12-04 04:45:05 +00:00
Andrew Cagney
8d3580d090 Fix incorrect calculation of conditional field when being extracted 
from a previous decode.
 1998-07-29 00:14:29 +00:00
Andrew Cagney
07c2bd1455 Problems with conditional instruction-table fields (N!M, N=M, ...). 
Was restricting `M' to opcode fields in the current word.
 1998-07-28 08:08:54 +00:00
Tom Tromey
b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes. 
* config.in: Ditto.
	* configure.in: Don't call sinclude.
 1998-04-24 20:39:48 +00:00
Andrew Cagney
e9164db545 * ld-insn.c (load_insn_table): Terminate error with NL. 
* gen.c (insns_bit_useless): Perform unsigned bit comparisons.
* filter.c (is_filtered_out, filter_parse): Pacify GCC, len is unsigned.
* gen-icache.c (print_icache_extraction): Do not type cast pointers.
 1998-04-24 09:52:25 +00:00
Michael Meissner
d865fb6e56 Regenerate configure 1998-04-22 18:29:57 +00:00
Andrew Cagney
98f5dae13b * gen-icache.c (print_icache_extraction): When generating #define 
force the expression to the correct type.
 1998-04-21 00:11:40 +00:00
Andrew Cagney
13eaae2fd0 Broke parsing of !<val>!<val> when adding support for =<field>. Fix. 
Add support for the -S<suffix> option.
 1998-04-14 04:24:47 +00:00
Andrew Cagney
346a3d6c11 Add support for instruction word conditionals of the form `XXX!YYY' 
and XXX=YYY'.  See mn10300 for examples.
 1998-04-14 00:00:15 +00:00
Andrew Cagney
278bda4050 Cleanup INLINE support for simulators using common framework. 
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
 1998-04-04 12:33:11 +00:00
Andrew Cagney
72a08ce565 Don't bother generating trace prefix string when not tracing. 1998-04-03 17:13:40 +00:00
Andrew Cagney
d797f46f3c * gen-engine.c (print_run_body): Re-extract the CIA after 
processing any events.  Events may not restart the simulator.
 1998-03-24 21:30:00 +00:00
Stu Grossman
753ad2d3c5 * Makefile.in: Get SHELL from configure. 
* configure:  Regenerate with autoconf 2.12.1 to fix shell issues for
	NT native builds.
 1998-03-24 17:50:09 +00:00
Andrew Cagney
2c3c3f790d Generate ENGINE_ISSUE hooks as part of SMP simulator. 1998-02-23 14:43:13 +00:00
Andrew Cagney
3c1e924307 * ld-insn.c (parse_function_record): When -Wnodiscard, suppress 
discarded function warning.
        * igen.c (main): Clarify -Wnodiscard.
        * ld-insn.c (parse_function_record): For functions, allow use of
        instruction style function model records
 1998-02-23 08:55:41 +00:00
Andrew Cagney
c4db5b04f8 mips - for r5900 generate igen simulator. 
igen - stop crash when simulator isn't multi-sim'ed
 1998-01-31 06:56:13 +00:00
Andrew Cagney
9ec6741b17 igen: Fix SMP simulator generator support. 
Use the bfd-processor name in the sim-engine switch.
	Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
	Update
mips:	Fill in bfd-processor field of model records so that
	they match ../bfd/archures.
 1998-01-31 06:23:41 +00:00
Andrew Cagney
2d44e12a27 Use macro GPR_SET(N,VAL) to clear zero registers. 1998-01-21 22:08:37 +00:00
Brendan Kehoe
3b5bd034f5 * gen-idecode.c (print_jump_until_stop_body): Use `#if 0' instead of 
`#ifdef 0' around this.
 1997-11-04 17:36:37 +00:00
Michael Meissner
5aa52e3d26 do not assume NULL is an integer constant 1997-11-04 13:19:49 +00:00
Andrew Cagney
01b9cd49ca common/sim-bits.h: Document ROTn macro. 
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
 1997-10-29 04:02:30 +00:00
Andrew Cagney
89d0973831 Add support for 16 byte quantities to sim-endian macro H2T. 
Add model-filter field to option, include, model anf function igen records
 1997-10-28 07:10:36 +00:00
Andrew Cagney
e2880fadf3 Add include-file support to igen. 1997-10-27 06:30:35 +00:00
Andrew Cagney
eaa202ddd4 * gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape 
newlines at end of generated call to sim_engine_abort.
 1997-10-16 03:19:41 +00:00
Andrew Cagney
d5cecca93c Output line-ref to original igen source file when generating trace 
statements.
Define NIA macro (dependant on gen-delayed-branch).
Verify opening/closing quote in input assembler strings.
 1997-10-14 02:54:08 +00:00
Andrew Cagney
8782bfcfc4 Add -Wnodiscard option so that warning about discarded instructions 
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
 1997-10-09 08:35:33 +00:00
Andrew Cagney
6a4c8f1e29 Change semantic function name to semantic_<INSN>_<FMT> instead of 
semantic_<FMT>_<INSN>.
 1997-09-19 00:50:24 +00:00
Andrew Cagney
3484de0091 Differentiate between a non-zero string and a constant zero field. 1997-09-16 02:14:18 +00:00
Andrew Cagney
0604253676 * igen.c (gen_run_c): Handle non-multi-sim case. 1997-09-15 22:40:14 +00:00
Andrew Cagney
a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common 
directory to specify its own unqiue config.h file).
 1997-09-15 08:25:04 +00:00
Andrew Cagney
cf5c6e6e5d Generate instruction profile call with each instruction. 1997-09-12 02:26:31 +00:00
Andrew Cagney
8f050205eb (gen_itable_h): Output an enum defining the max size of the itable 
string members.
 1997-09-10 22:07:06 +00:00
Andrew Cagney
687f3f1cef Add multi-sim support to simulator. 1997-09-08 17:40:24 +00:00
Andrew Cagney
0bdfae1167 Clean up formatting of instruction traces. 1997-06-06 00:31:08 +00:00
Andrew Cagney
efe4f1cbf8 Add a simple dissasembler to igen 1997-05-29 07:06:41 +00:00
Andrew Cagney
2f2e6c5d5b Extend xor-endian and per-cpu support in core module. 
Allow negated test when watching value within core.
 1997-05-27 06:48:20 +00:00
Andrew Cagney
b526378484 Incorrect test for zero-r0 code gen. 1997-05-23 02:01:04 +00:00
Andrew Cagney
37a684b84d o Make tic80 insn file more `cache ready' 
o	Have igen always zero r0 instead of constantly checking if
	the designated register is r0.
 1997-05-16 03:27:40 +00:00
Andrew Cagney
381f42ef5d o Clean-up tic80 fp tracing 
o	Fill in more tic80 insns
 1997-05-07 13:58:52 +00:00
Michael Meissner
a77241718f Enable --trace-linenum support 1997-05-06 10:21:57 +00:00
Michael Meissner
d23af88239 Fix problems -Wall found 1997-05-05 18:16:10 +00:00
Andrew Cagney
255925e912 Tidy code gen. 1997-04-30 08:39:51 +00:00
Andrew Cagney
abe293a0c6 Enable more instructions. 1997-04-24 12:06:27 +00:00
Andrew Cagney
480e740cc1 More Tic80 instructions. 1997-04-23 13:56:14 +00:00