Commit graph

12 commits

Author SHA1 Message Date
Andrew Cagney
1bba340afe Redo watchpoint code so that it target can specify interrupt names.
Replace v850 interrupt code with this common watchpoint code.
Other minor fixes to core.
1997-09-05 08:16:23 +00:00
Andrew Cagney
30efae3acd Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue. 1997-09-05 00:30:38 +00:00
Andrew Cagney
a34abff813 o Add modulo argument to sim_core_attach
o	Add sim-memopt module - memory option processing.
1997-09-04 03:47:39 +00:00
Andrew Cagney
80c651f02d Stanify error reporting memory overlaps. 1997-09-03 04:06:27 +00:00
Andrew Cagney
f90b720ba1 Passify GCC. Convert 0x0LL to something more portable in the FP code. 1997-08-30 00:02:19 +00:00
Andrew Cagney
cd0d873d0f Preliminary suport for xor-endian suport in core module. 1997-05-23 09:19:43 +00:00
Andrew Cagney
50a2a69182 Watchpoint interface. 1997-05-21 06:54:13 +00:00
Andrew Cagney
c445af5a2b c80 simulator fixes. 1997-05-12 04:57:49 +00:00
Andrew Cagney
7a418800c1 Start of implementation of a distributed (between processors)
simulator core object.
1997-05-05 13:21:04 +00:00
Andrew Cagney
1fe052808a Update devo version of m32r sim to build with recent sim/common changes. 1997-05-02 08:41:15 +00:00
David Edelsohn
c967f1874a * Makefile.in (sim-options_h): Define.
(sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
	(sim-model.o): Add new rule.
	(cgen-{scache,trace,utils}.o): Add new rules.
	* aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
	* cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
	Indent output by 2 spaces.
	* cgen-scache.h (scache_print_profile): Update.
	* cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
	Use trace_printf, not fprintf.
	(trace_extract): Use trace_printf, not cgen_trace_printf.
	* genmloop.sh (!FAST case): Increment `insn_count'.
	* sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
	(sim_cpu_base): Rename member `sd' to `state' to be consistent with
	access macro's name.
	* sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
	Change return type to SIM_RC.
	(sim_core_{install,uninstall}): New functions.
	* sim-core.h (sim_core_{install,uninstall}): Declare.
	(sim_core_init): Use EXTERN_SIM_CORE to define it.
	Change return type to SIM_RC.
	* sim-model.h (models,machs,model_install): Declare.
	* sim-module.c (modules): Add scache_install, model_install.
	(sim_post_argv_init): Set cpu->state backlinks.
	* sim-options.c (standard_options): Delete --simcache-size,--max-insns.
	(standard_option_handler): Likewise.
	* sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
	sim-profile.h.
	(*): Assume ANSI C.
	(profile_options): Delete --profile-simcache.
	(profile_option_handler): Likewise.
	(profile_print_insn): Change `sd' arg to `cpu'.  Indent output 2
	spaces.
	(profile_print_{memory,model}): Likewise.
	(profile_print_simcache): Delete.
	(profile_print_speed): New function.
	(profile_print): Rewrite.
	* sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
	(WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
	(PROFILE_DATA): Delete members simcache_{hits,misses}.
	(PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
	(PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
	(profile_print): Update prototype.
1997-05-01 18:05:37 +00:00
Andrew Cagney
f2de7dfd8c Add a number of per-simulator options: hostendian, endian, inline, warnings.
Rename *-n.h files to be dos compatible
1997-03-14 15:13:58 +00:00