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Author SHA1 Message Date
Michael Snyder
9142f946a7 2003-07-08 Michael Snyder <msnyder@redhat.com> 
* allinsn.exp, testutils.inc, add.s, fabs.s, fadd.s, fcmpeq.s,
        fcmpgt.s, fcnvds.s, fcnvsd.s, fdiv.s, fldi0.s, fldi1.s, flds.s,
        float.s, fmac.s, fmov.s, fmul.s, fneg.s, frchg.s, fschg.s,
        fsqrt.s, fsub.s, ftrc.s, shll16.s, shll2.s, shll8.s, shll.s,
        shlr16.s, shlr2.s, shlr8.s, shlr.s, swap.s: New files.
 2003-07-26 00:54:58 +00:00
Michael Snyder
b2bc310144 2003-07-23 Michael Snyder <msnyder@redhat.com> 
* pmuls.s: New	file.
 2003-07-23 21:45:36 +00:00
Michael Snyder
b7c7b62431 2003-07-09 Michael Snyder <msnyder@redhat.com> 
* sim/sh: New directory.  Tests for Renesas sh family.
 2003-07-23 21:41:09 +00:00
Michael Snyder
20358547b7 2003-07-08 Michael Snyder <msnyder@redhat.com> 
* allinsn.exp, testutils.inc, add.s, fabs.s, fadd.s, fcmpeq.s,
	fcmpgt.s, fcnvds.s, fcnvsd.s, fdiv.s, fldi0.s, fldi1.s, flds.s,
	float.s, fmac.s, fmov.s, fmul.s, fneg.s, frchg.s, fschg.s,
	fsqrt.s, fsub.s, ftrc.s, shll16.s, shll2.s, shll8.s, shll.s,
	shlr16.s, shlr2.s, shlr8.s, shlr.s, swap.s: New files.
 2003-07-23 21:40:43 +00:00
Michael Snyder
3df3a316d3 2003-05-30 Alexandre Oliva <aoliva@redhat.com> 
* allinsn.exp: Fix typos introduced on 2003-05-27.

2003-05-29  Michael Snyder  <msnyder@redhat.com>

	* tas.s: Use er4 for h8h and h8s, er3 for h8sx.

2003-05-28  Michael Snyder  <msnyder@redhat.com>

	* subs.s: New file.
	* subx.s: New file.
	* allinsn.exp: Add new subs and subx tests.
	* testutils.inc: Simplify (and fix) set_carry_flag.
	(clear_carry_flag, set_zero_flag, clear_zero_flag...): New macros.
	* addx.s: Use simplified set_carry_flag.

2003-05-27  Michael Snyder  <msnyder@redhat.com>

	* tas.s: New file.
	* band.s: New file.
	* biand.s: New file.
	* allinsn.exp: Add tas, band, biand tests.
	* brabc.s: Add abs8 test.
	* bset.s: Add bset/ne, bclr/ne tests.

2003-05-23  Michael Snyder  <msnyder@redhat.com>

	* and.b.s: Add andc exr.
	* or.b.s: Add orc.exr.
	* xor.b.s: Add xor exr.

	* jmp.s: Fix 8-bit indirect test.  Add 7-bit vector test.

2003-05-22  Michael Snyder  <msnyder@redhat.com>

	* stack.s: Add rte/l and rts/l tests.
	* allinsn.exp: Add stack tests.

2003-05-21  Michael Snyder  <msnyder@redhat.com>

	* stack.s: New file: test stack operations.
	* stack.s: Add bsr, jsr tests.
	* stack.s: Add trapa, rte tests.

	* div.s: Corrections for size of dividend.

2003-05-20  Michael Snyder  <msnyder@redhat.com>

	* mul.s: Corrections for unsigned multiply.

	* div.s: New file, test div instructions.
	* allinsn.exp: Add div test.

2003-05-19  Michael Snyder  <msnyder@redhat.com>

	* mul.s: New file, test mul instructions.
	* allinsn.exp: Add mul test.
 2003-06-19 02:40:12 +00:00
Michael Snyder
a27a0651eb 2003-04-13 Michael Snyder <msnyder@redhat.com> 
* sim/h8300: New directory.  Tests for Renesas h8/300 family.
 2003-05-14 22:59:12 +00:00
Michael Snyder
cd44367114 New ChangeLog 2003-05-14 21:08:29 +00:00
Michael Snyder
32ebdc4ce3 2003-05-14 Michael Snyder <msnyder@redhat.com> 
* addb.s, addw.s, addl.s, addw.s, addx.s, andb.s, andw.s, andl.s,
        bfld.s, brabc.s, bra.s, bset.s, cmpb.s, cmpw.s, cmpl.s, daa.s,
        das.s, dec.s, extw.s, extl.s, inc.s, jmp.s, ldc.s, ldm.s, mac.s,
        mova.s, movb.s, movw.s, movl.s, movmd.s, movsd.s, neg.s, nop.s,
        not.s, orb.s, orw.s, orl.s, rotl.s, rotr.s, rotxl.s, rotxr.s,
        shal.s, shar.s, shll.s, shlr.s, stc.s,	subb.s, subw.s, subl.s,
        xorb.s,	xorw.s, xorl.s: New files.
        * allinsn.exp: New file.
 2003-05-14 21:07:55 +00:00
Michael Snyder
105e800205 Remove for renaming with 8.3 dos-compatible names. 2003-05-14 20:58:21 +00:00
Michael Snyder
ab12e95ba6 Remove, rename using dos-compatible 8.3 names. 2003-05-14 20:01:55 +00:00
Michael Snyder
5fe8b0dfe1 2003-04-13 Michael Snyder <msnyder@redhat.com> 
* configure.in: Add testsuite to extra_subdirs.
	* configure: Regenerate.

2003-04-13  Michael Snyder  <msnyder@redhat.com>

	* sim/h8300: New directory.  Tests for Hitachi h8/300 family.
 2003-04-13 16:44:57 +00:00
Nick Clifton
49634642a5 Add tests for ARM simulator. 2003-04-01 11:07:58 +00:00
Andrew Cagney
c8cca39f98 Import current --enable-gdb-build-warnings. 2002-06-16 16:33:35 +00:00
Ben Elliston
cbb38b47b3 * Contribute Hitachi SH5 simulator. 2002-02-01 11:44:32 +00:00
Ben Elliston
f18ee7ef71 2001-07-31 Ben Elliston <bje@redhat.com> 
* lib/sim-defs.exp (run_sim_test): Include a description such as
	"assembling" or "linking" that identifies the phase a test fails
	in, for easier analysis of failures.
 2001-07-31 04:59:59 +00:00
Andrew Cagney
bf1bef8f1c Regenerate using autoconf 2.13. 2001-07-18 06:20:29 +00:00
Dave Brolley
0ab7df8a89 2000-11-01 Dave Brolley <brolley@cygnus.com> 
* lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
	"xerror" options do not use a list of machines. Clear options from
	previous test case. Use "$cpu_option"  to identify the machine to the
	assembler, if specified.
 2000-11-01 15:40:35 +00:00
Andrew Cagney
eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Andrew Cagney
27842f65f2 Add support for SIGILL (reserved-instruction-exception). 2000-04-18 07:55:35 +00:00
Frank Ch. Eigler
58fddbac5a * whitespace correction 2000-03-02 18:12:44 +00:00
Andrew Cagney
baa7ae6f10 When SIM_HAVE_ENVIRONMENT: use sim_set_trace() to enable tracing 
instead of sim_trace() to run the program; include support for ``-o''
option (operating environment); when a signal occurs, only continue
execution when operating environment mode.
Update d10v.
 2000-02-22 08:52:21 +00:00
Jason Molenda
c3f6f71df3 import gdb-2000-01-05 snapshot 2000-01-06 03:07:20 +00:00
Jason Molenda
4ce44c668d import gdb-1999-11-16 snapshot 1999-11-17 02:31:06 +00:00
Jason Molenda
c2c6d25f0d import gdb-1999-09-21 1999-09-22 03:28:34 +00:00
Jason Molenda
cff3e48be7 import gdb-1999-09-13 snapshot 1999-09-13 21:40:00 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda
104c1213b4 import gdb-1999-08-30 snapshot 1999-08-31 01:14:27 +00:00
Jason Molenda
adf40b2e16 import gdb-1999-07-19 snapshot 1999-07-19 23:30:11 +00:00
Stan Shebs
7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Jeff Law
579d9a9749 m32rx -> cygnus sanitization change. 1999-02-05 17:39:42 +00:00
Jason Molenda
984b70f0c8 1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com) 
* t-sadd.s: New file.
	* Makefile.in (TESTS): Add t-sadd.

PR 18438.
 1999-01-14 00:46:01 +00:00
Dave Brolley
e1ef54a703 Add new test cases to the list of files to be kept. 1999-01-12 16:27:49 +00:00
Doug Evans
e5e95c7d80 keep fr30 1999-01-11 23:16:57 +00:00
Doug Evans
b83dc7fc11 keep fr30-elf 1999-01-11 23:15:16 +00:00
Doug Evans
5759b13198 fix typo in comment 1999-01-11 23:14:23 +00:00
Frank Ch. Eigler
3372836e0d * Test for PR 18288 and its predecessors. 
1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
	* do-flags.S: New test for parallel PSW update conflicts.
	* Makefile.in (TESTS): Run it.
 1999-01-11 14:48:48 +00:00
Frank Ch. Eigler
0d320ebfc9 * Test for PR 18679. 
1999-01-07  Frank Ch. Eigler  <fche@cygnus.com>
	* do-2wordops.S: New test for sign-extension by ld2h.
 1999-01-07 08:55:49 +00:00
Frank Ch. Eigler
ba50f16ab7 * sky test case updates for MTIR insn PR 
1998-12-31  Frank Ch. Eigler  <fche@cygnus.com>
	* sim/sky/t-cop2.s: Adjust vmtir instruction tests for new syntax.
	* sim/sky/t-cop2.vuexpect: Matching changes.
 1998-12-31 06:00:29 +00:00
Felix Lee
d98ee4f5af * sim/sky/sky-defs.tcl: various changes for remote host testing. 
* sim/sky/mload.exp: ditto.
        * sim/sky/sky_sce.exp: ditto.
        * sim/sky/sky_sce_accurate.exp: ditto.
        * sim/sky/sky_sce_fast.exp: ditto.
        * sim/sky/mload.exp: mark as unresolved on error.
 1998-12-31 01:07:51 +00:00
Dave Brolley
27f6ea6995 New testcase. 1998-12-18 22:22:55 +00:00
Dave Brolley
f45ee50714 Fri Dec 18 17:09:34 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/ldres.cgs: New testcase.
	* sim/fr30/stres.cgs: New testcase.
	* sim/fr30/copop.cgs: New testcase.
	* sim/fr30/copld.cgs: New testcase.
	* sim/fr30/copst.cgs: New testcase.
	* sim/fr30/copsv.cgs: New testcase.
	* sim/fr30/nop.cgs: New testcase.
	* sim/fr30/andccr.cgs: New testcase.
	* sim/fr30/orccr.cgs: New testcase.
	* sim/fr30/addsp.cgs: New testcase.
	* sim/fr30/stilm.cgs: New testcase.
	* sim/fr30/extsb.cgs: New testcase.
	* sim/fr30/extub.cgs: New testcase.
	* sim/fr30/extsh.cgs: New testcase.
	* sim/fr30/extuh.cgs: New testcase.
	* sim/fr30/enter.cgs: New testcase.
	* sim/fr30/leave.cgs: New testcase.
	* sim/fr30/xchb.cgs: New testcase.
	* sim/fr30/dmovb.cgs: New testcase.
	* sim/fr30/dmov.cgs: New testcase.
	* sim/fr30/dmovh.cgs: New testcase.
 1998-12-18 22:15:44 +00:00
Dave Brolley
de6fb7e775 Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
	* sim/fr30/ret.cgs: Add tests fir ret:d.
	* sim/fr30/inte.cgs: New testcase.
	* sim/fr30/reti.cgs: New testcase.
	* sim/fr30/bra.cgs: New testcase.
	* sim/fr30/bno.cgs: New testcase.
	* sim/fr30/beq.cgs: New testcase.
	* sim/fr30/bne.cgs: New testcase.
	* sim/fr30/bc.cgs: New testcase.
	* sim/fr30/bnc.cgs: New testcase.
	* sim/fr30/bn.cgs: New testcase.
	* sim/fr30/bp.cgs: New testcase.
	* sim/fr30/bv.cgs: New testcase.
	* sim/fr30/bnv.cgs: New testcase.
	* sim/fr30/blt.cgs: New testcase.
	* sim/fr30/bge.cgs: New testcase.
	* sim/fr30/ble.cgs: New testcase.
	* sim/fr30/bgt.cgs: New testcase.
	* sim/fr30/bls.cgs: New testcase.
	* sim/fr30/bhi.cgs: New testcase.
 1998-12-17 22:25:05 +00:00
Doug Evans
f7fb02ba10 More sce_testNN cases updated, pr 18402. 1998-12-17 22:21:31 +00:00
Doug Evans
331a809018 * sim/sky/sce_test58.vuasm: Update syntax of MTIR insn. 
PR 18402
 1998-12-17 21:29:06 +00:00
Frank Ch. Eigler
0615cacf10 * Sanitization fixes to retain new files. 1998-12-16 16:10:16 +00:00
Doug Evans
b58ffc7b4e * sim/m32r/uread16.ms: New testcase. 
* sim/m32r/uread32.ms: New testcase.
	* sim/m32r/uwrite16.ms: New testcase.
	* sim/m32r/uwrite32.ms: New testcase.
 1998-12-14 23:31:28 +00:00
Doug Evans
71d0d0a788 * sim/fr30/hello.ms: Add trailing \n to expected output. 
* sim/m32r/hello.ms: Ditto.
	* sim/m32r/hw-trap.ms: Ditto.
 1998-12-14 23:28:41 +00:00
Doug Evans
ebc5ff70a2 lib/sim-defs.exp (sim_run): Look for board_info sim,options. 1998-12-14 23:22:25 +00:00